CTCaer
502fc1ed50
bdk: sdmmc: rename ddr100 to the actual HS100 name
2023-03-31 08:15:40 +03:00
CTCaer
107fbd1d24
bdk: gpio: add debounce set function
...
The debounce time is not per pin but per bank. So software should manage proper time for sibling pins
2023-03-31 07:43:16 +03:00
CTCaer
1edb6583ac
bdk: gpio: reorder gpio config
...
Since there are some bootloaders that mess with the states of some power gpios, reorder gpio configuration for input/output in order to prevent power pin glitches.
2023-03-31 07:41:50 +03:00
CTCaer
17cdd5af0d
bdk: hwdeinit: restore order of bpmp clock set
...
Restore order of bpmp clock scale down in deinit, in order to decrease pressure on clock deinits.
2023-02-22 14:48:43 +02:00
CTCaer
9a98c1afb9
bdk: stylistic corrections
...
And update copyrights
2023-02-11 23:46:38 +02:00
CTCaer
72abe60a3b
bdk: hw init: remove support for broken hwinits
...
It's 2023 already.
2023-02-11 23:19:56 +02:00
CTCaer
114abba815
bdk: hw init: do not touch audio clocks on t210b01
2023-02-11 23:13:41 +02:00
CTCaer
ec8c04db8a
bdk: bpmp: add 563MHz clock for worst binnings
2023-02-11 23:12:14 +02:00
CTCaer
4d7eb6a647
bdk: clock: improve pllc deinit
2023-02-11 23:11:24 +02:00
CTCaer
5bb9a244ea
bdk: utilize new gpio functions
2023-02-11 23:08:32 +02:00
CTCaer
05b5e4f297
bdk: gpio: add simple gpio direction functions
2023-02-11 22:55:22 +02:00
CTCaer
0e1eece04f
bdk: hw-init: remove charger forced enable
...
Anything that doesn't manage it properly should fix itself.
(Like for example disabling charging on sleep or something. They should use the gpio equivalent.)
2022-12-19 05:35:04 +02:00
CTCaer
4d823d5909
bdk: slight refactor
2022-12-19 05:22:55 +02:00
CTCaer
d0b22bf374
bdk: manage host1x only in hw init
2022-12-19 05:14:39 +02:00
CTCaer
fe0bd89c4c
bdk: pmc: extend pmc scratch locker
2022-10-11 14:41:42 +03:00
CTCaer
f534d5e316
bdk: i2c: fix send packet mode
2022-10-11 14:40:58 +03:00
CTCaer
2ea595e98d
bdk: sdram: add new dram ids/configs
...
On T210B01 dram ids 7 and 16 got removed.
29 to 34 were added.
Additionally, remove all deprecated and unused dram id enums.
2022-10-11 10:38:43 +03:00
CTCaer
9d889e2c3e
bdk: Add driver for VIC
...
VIC is a HW engine that allows for frame/texture buffer manipulation.
2022-10-11 06:41:38 +03:00
CTCaer
bfad719fcd
bdk: small refactor
2022-10-11 06:16:38 +03:00
CTCaer
197ce4c76f
bdk: sdmmc: timing changes
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- Correct HS102 naming to DDR100
- Fix clock for DDR50 (even if it's unused)
2022-10-11 04:05:12 +03:00
CTCaer
d259d6f6d6
bdk: watchdog: clear timer interrupt also in handling
2022-07-11 22:10:41 +03:00
CTCaer
70523e404f
bdk: whitespace refactor
2022-07-11 22:10:11 +03:00
CTCaer
57c8fd1f8c
bdk: fiq: watchdog handling
...
`BDK_WATCHDOG_FIQ_ENABLE` enables watchdog handling.
`BDK_RESTART_BL_ON_WDT` causes a reload of bootloader on FIQ
These 2 are useful when wanting to detect and handle hangs.
2022-06-29 12:12:03 +03:00
CTCaer
b0c0a86108
bdk: migrate timers/sleeps to timer driver
2022-06-27 10:22:19 +03:00
CTCaer
061e10152f
bdk: timer: add timer/watchdog driver
2022-06-27 10:20:25 +03:00
CTCaer
16af97c79a
uart: rename print to printf
2022-06-25 05:42:42 +03:00
CTCaer
bdb8f6d352
ccplex: name some flow control values
2022-06-25 05:42:19 +03:00
CTCaer
e9587a325c
bdk: fuse: add ipatch support for T210B01
2022-05-16 13:05:12 +03:00
CTCaer
87fe374b3b
bdk: uart: use 2 STOP bits based on baudrate
2022-05-14 12:25:02 +03:00
CTCaer
b56e788d12
bdk: pinmux: more proper uart pinmuxing
2022-05-14 12:20:57 +03:00
CTCaer
9e613a7600
bdk: hwinit: simplify uart debug port paths
2022-05-13 03:56:59 +03:00
CTCaer
f452d916c9
bdk: clock: add ext peripheral clock control
2022-05-09 06:08:39 +03:00
CTCaer
12aac3a0fc
bdk: clock: add 3 megabaud support for UART
2022-05-09 05:47:08 +03:00
CTCaer
f7bf4af3ec
bdk: uart: refactor and add new functionality
...
- Allow to set CTS/RTS mode (only specific combos supported for now)
- Support the above modes in receiving
- Set 2 stop bits to decreases errors on high baudrates
2022-05-08 05:45:16 +03:00
CTCaer
81730c5f7e
bdk: pinmux/pmc: add more defines
2022-05-08 05:22:41 +03:00
CTCaer
b9f40fed7a
bdk: di: move plld setup code out of display obj
2022-05-08 04:41:05 +03:00
CTCaer
3f65a30b2e
bdk: more atf prep
2022-02-15 00:14:53 +02:00
CTCaer
3fdb72ce37
bdk: i2c: correct order of spinlock wait
2022-01-29 01:34:01 +02:00
CTCaer
8327de8e2e
bdk: replace NYX flag with proper flags
...
- BDK_MINERVA_CFG_FROM_RAM: enables support for getting minerva configuration from nyx storage
- BDK_HW_EXTRA_DEINIT: enables extra deinit in hw_reinit_workaround
- BDK_SDMMC_OC_AND_EXTRA_PRINT: enables eMMC OC support (533 MB/s) and extra error printing
2022-01-20 13:19:48 +02:00
CTCaer
39d411dc68
bdk: uart: add uart va print
2022-01-20 12:39:32 +02:00
CTCaer
10b479dc1c
bdk: clock: add apb/ahb clock control
2022-01-20 12:32:57 +02:00
CTCaer
3dd12321f8
bdk: add activity monitor driver
2022-01-20 12:32:02 +02:00
CTCaer
853f10f774
bdk: pmc: update tzram defines
2022-01-20 12:13:35 +02:00
CTCaer
5e6a7c486b
bdk: btn: enable HOME button as input
2022-01-16 01:05:42 +02:00
CTCaer
1a9c6bf983
bdk: correct reg init as per TRM
2022-01-16 01:04:52 +02:00
CTCaer
70504c295e
bdk: various functionality independent changes
2022-01-16 01:03:24 +02:00
CTCaer
a5cd962f99
bdk: add global header
2022-01-15 23:58:27 +02:00
CTCaer
c801ef8dda
bdk: use size defines where applicable
2021-10-01 15:03:18 +03:00
CTCaer
a1910156d8
bdk: hwinit: save boot reason for later usage
2021-10-01 14:32:42 +03:00
CTCaer
bcec028b0f
clock: update device frequency getter function
...
- Add missing write commits
- Remove hardcoded values
2021-09-17 23:16:43 +03:00