mirror of
https://github.com/CTCaer/hekate
synced 2024-11-08 04:46:35 +00:00
bdk: migrate timers/sleeps to timer driver
This commit is contained in:
parent
061e10152f
commit
b0c0a86108
35 changed files with 71 additions and 76 deletions
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@ -51,6 +51,7 @@
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#include <soc/kfuse.h>
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#include <soc/pinmux.h>
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#include <soc/pmc.h>
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#include <soc/timer.h>
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#include <soc/t210.h>
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#include <soc/uart.h>
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#include <storage/emmc.h>
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@ -28,6 +28,7 @@
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#include <soc/i2c.h>
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#include <soc/pinmux.h>
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#include <soc/pmc.h>
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#include <soc/timer.h>
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#include <soc/t210.h>
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#include <utils/util.h>
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@ -1,7 +1,7 @@
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/*
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* Joy-Con UART driver for Nintendo Switch
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*
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* Copyright (c) 2019-2021 CTCaer
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* Copyright (c) 2019-2022 CTCaer
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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@ -27,9 +27,9 @@
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#include <soc/fuse.h>
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#include <soc/gpio.h>
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#include <soc/pinmux.h>
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#include <soc/timer.h>
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#include <soc/uart.h>
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#include <soc/t210.h>
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#include <utils/util.h>
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// For disabling driver when logging is enabled.
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#include <libs/lv_conf.h>
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@ -82,9 +82,9 @@
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#define JC_BTN_MASK_L 0xFF2900 // 0xFFE900: with charge status.
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#define JC_BTN_MASK_R 0x0056FF
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#define JC_ID_L 0x01
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#define JC_ID_R 0x02
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#define JC_ID_HORI 0x20
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#define JC_ID_L 0x01 // Joycon (L). Mask for Hori (L).
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#define JC_ID_R 0x02 // Joycon (R). Mask for Hori (R).
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#define JC_ID_HORI 0x20 // Mask for Hori. Actual ids: 0x21, 0x22.
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#define JC_CRC8_POLY 0x8D
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@ -24,9 +24,9 @@
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#include <soc/pinmux.h>
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#include <power/max7762x.h>
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#include <soc/gpio.h>
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#include <soc/timer.h>
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#include <soc/t210.h>
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#include <utils/btn.h>
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#include <utils/util.h>
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#include "touch.h"
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@ -35,12 +35,12 @@
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static touch_panel_info_t _panels[] =
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{
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{ 0, 1, 1, 1, "NISSHA NFT-K12D" },
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{ 1, 0, 1, 1, "GiS GGM6 B2X" },
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{ 2, 0, 0, 0, "NISSHA NBF-K9A" },
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{ 3, 1, 0, 0, "GiS 5.5\"" },
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{ 4, 0, 0, 1, "Samsung BH2109" },
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{ -1, 1, 0, 1, "GiS VA 6.2\"" }
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{ 0, 1, 1, 1, "NISSHA NFT-K12D" },// 0.
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{ 1, 0, 1, 1, "GiS GGM6 B2X" },// 1.
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{ 2, 0, 0, 0, "NISSHA NBF-K9A" },// 3.
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{ 3, 1, 0, 0, "GiS 5.5\"" },// 4.
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{ 4, 0, 0, 1, "Samsung BH2109" },// 5?
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{ -1, 1, 0, 1, "GiS VA 6.2\"" } // 2.
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};
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static int touch_command(u8 cmd, u8 *buf, u8 size)
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@ -17,7 +17,7 @@
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#ifndef LV_CONF_H
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#define LV_CONF_H
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#include <utils/types.h>
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#include <soc/timer.h>
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#include <memory_map.h>
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/*===================
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Dynamic memory
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@ -1,6 +1,6 @@
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/*
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* Copyright (c) 2018 naehrwert
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* Copyright (c) 2018-2021 CTCaer
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* Copyright (c) 2018-2022 CTCaer
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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@ -17,9 +17,9 @@
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#include <memory_map.h>
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#include <mem/mc.h>
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#include <soc/timer.h>
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#include <soc/t210.h>
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#include <soc/clock.h>
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#include <utils/util.h>
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void mc_config_tsec_carveout(u32 bom, u32 size1mb, bool lock)
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{
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@ -1,7 +1,7 @@
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/*
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* Copyright (c) 2018 naehrwert
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* Copyright (c) 2018 balika011
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* Copyright (c) 2019-2021 CTCaer
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* Copyright (c) 2019-2022 CTCaer
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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@ -31,8 +31,8 @@
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#include <soc/hw_init.h>
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#include <soc/i2c.h>
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#include <soc/pmc.h>
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#include <soc/timer.h>
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#include <soc/t210.h>
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#include <utils/util.h>
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#define CONFIG_SDRAM_KEEP_ALIVE
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@ -1,6 +1,6 @@
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/*
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* Copyright (c) 2018 naehrwert
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* Copyright (c) 2020-2021 CTCaer
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* Copyright (c) 2020-2022 CTCaer
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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@ -1,6 +1,6 @@
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/*
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* Copyright (c) 2018 naehrwert
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* Copyright (c) 2020-2021 CTCaer
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* Copyright (c) 2020-2022 CTCaer
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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@ -541,8 +541,12 @@ static const sdram_params_t210_t _dram_cfg_0_samsung_4gb = {
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.mc_video_protect_bom = 0xFFF00000,
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.mc_video_protect_bom_adr_hi = 0x00000000,
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.mc_video_protect_size_mb = 0x00000000,
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// AFI, BPMP, HC, ISP2, CCPLEX, PPCS (AHB), SATA, VI, XUSB_HOST, XUSB_DEV, ADSP, PPCS1 (AHB), DC1, SDMMC1A, SDMMC2A, SDMMC3A.
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.mc_video_protect_vpr_override = 0xE4BAC343,
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// SDMMC4A, ISP2B, PPCS2 (AHB), APE, SE, HC1, SE1, AXIAP, ETR.
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.mc_video_protect_vpr_override1 = 0x00001ED3,
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.mc_video_protect_gpu_override0 = 0x00000000,
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.mc_video_protect_gpu_override1 = 0x00000000,
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.mc_sec_carveout_bom = 0xFFF00000,
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2020-2021 CTCaer
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* Copyright (c) 2020-2022 CTCaer
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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@ -594,8 +594,12 @@ static const sdram_params_t210b01_t _dram_cfg_08_10_12_14_samsung_hynix_4gb = {
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.mc_video_protect_bom = 0xFFF00000,
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.mc_video_protect_bom_adr_hi = 0x00000000,
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.mc_video_protect_size_mb = 0x00000000,
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// AFI, BPMP, HC, ISP2, CCPLEX, PPCS (AHB), SATA, VI, XUSB_HOST, XUSB_DEV, ADSP, PPCS1 (AHB), DC1, SDMMC1A, SDMMC2A, SDMMC3A.
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.mc_video_protect_vpr_override = 0xE4BAC343,
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.mc_video_protect_vpr_override1 = 0x06001ED3, // Add SE2, SE2B.
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// SDMMC4A, ISP2B, PPCS2 (AHB), APE, SE, HC1, SE1, AXIAP, ETR. Plus SE2, SE2B.
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.mc_video_protect_vpr_override1 = 0x06001ED3,
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.mc_video_protect_gpu_override0 = 0x00000000,
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.mc_video_protect_gpu_override1 = 0x00000000,
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.mc_sec_carveout_bom = 0xFFF00000,
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@ -1,6 +1,7 @@
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/*
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* Copyright (c) 2018 naehrwert
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* Copyright (c) 2018 balika011
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* Copyright (c) 2018-2022 CTCaer
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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#include <string.h>
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#include <soc/ccplex.h>
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#include <soc/timer.h>
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#include <soc/t210.h>
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#include <mem/mc_t210.h>
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#include <mem/smmu.h>
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#include <utils/util.h>
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#include <utils/aarch64_util.h>
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bool smmu_used = false;
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@ -28,7 +28,7 @@
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// REG 1 masks.
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#define BQ24193_PORCONFIG_BOOST_MASK (1<<0)
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#define BQ24193_PORCONFIG_SYSMIN_MASK (7<<1)
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#define BQ24193_PORCONFIG_SYSMIN_MASK (7<<1) // 3000uV HOS default.
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#define BQ24193_PORCONFIG_CHGCONFIG_MASK (3<<4)
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#define BQ24193_PORCONFIG_CHGCONFIG_CHARGER_EN (1<<4)
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#define BQ24193_PORCONFIG_I2CWATCHDOG_MASK (1<<6)
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#include "max17050.h"
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#include <soc/i2c.h>
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#include <utils/util.h>
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#include <soc/timer.h>
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#define BASE_SNS_UOHM 5000
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#include <power/max77812.h>
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#include <soc/fuse.h>
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#include <soc/i2c.h>
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#include <soc/timer.h>
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#include <soc/t210.h>
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#include <utils/util.h>
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#define REGULATOR_SD 0
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#define REGULATOR_LDO 1
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#include <soc/bpmp.h>
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#include <soc/hw_init.h>
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#include <soc/pmc.h>
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#include <soc/timer.h>
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#include <soc/t210.h>
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#include <utils/util.h>
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typedef struct _se_ll_t
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{
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#include <soc/clock.h>
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#include <soc/kfuse.h>
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#include <soc/pmc.h>
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#include <soc/timer.h>
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#include <soc/t210.h>
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#include <mem/heap.h>
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#include <mem/mc.h>
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#include <mem/smmu.h>
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#include <utils/util.h>
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// #include <gfx_utils.h>
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/*
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* BPMP-Lite Cache/MMU and Frequency driver for Tegra X1
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*
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* Copyright (c) 2019-2021 CTCaer
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* Copyright (c) 2019-2022 CTCaer
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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#include <soc/bpmp.h>
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#include <soc/clock.h>
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#include <soc/timer.h>
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#include <soc/t210.h>
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#include <memory_map.h>
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#include <utils/util.h>
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#define BPMP_MMU_CACHE_LINE_SIZE 0x20
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/*
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* Copyright (c) 2018 naehrwert
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* Copyright (c) 2018-2020 CTCaer
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* Copyright (c) 2018-2022 CTCaer
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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#include <soc/clock.h>
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#include <soc/hw_init.h>
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#include <soc/pmc.h>
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#include <soc/timer.h>
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#include <soc/t210.h>
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#include <storage/sdmmc.h>
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#include <utils/util.h>
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typedef struct _clock_osc_t
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{
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@ -351,7 +351,7 @@ void clock_disable_actmon()
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void clock_enable_extperiph1()
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{
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clock_enable(&_clock_extperiph1);
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PMC(APBDEV_PMC_CLK_OUT_CNTRL) |= PMC_CLK_OUT_CNTRL_CLK1_SRC_SEL(OSC_CAR) | PMC_CLK_OUT_CNTRL_CLK1_FORCE_EN;
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usleep(5);
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}
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CLOCK(CLK_RST_CONTROLLER_PLLU_BASE) = pllu_cfg | PLLCX_BASE_ENABLE; // Enable.
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// Wait for PLL to stabilize.
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u32 timeout = (u32)TMR(TIMERUS_CNTR_1US) + 1300;
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u32 timeout = get_tmr_us() + 1300;
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while (!(CLOCK(CLK_RST_CONTROLLER_PLLU_BASE) & PLLCX_BASE_LOCK)) // PLL_LOCK.
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if ((u32)TMR(TIMERUS_CNTR_1US) > timeout)
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if (get_tmr_us() > timeout)
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break;
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usleep(10);
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#define CLK_RST_CONTROLLER_LVL2_CLK_GATE_OVRD 0x3A4
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#define CLK_RST_CONTROLLER_CLK_SOURCE_MSELECT 0x3B4
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#define CLK_RST_CONTROLLER_CLK_SOURCE_I2C4 0x3C4
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#define CLK_RST_CONTROLLER_CLK_SOURCE_AHUB 0x3D0
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#define CLK_RST_CONTROLLER_CLK_SOURCE_ACTMON 0x3E8
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#define CLK_RST_CONTROLLER_CLK_SOURCE_EXTPERIPH1 0x3EC
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#define CLK_RST_CONTROLLER_CLK_SOURCE_EXTPERIPH2 0x3F0
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#define CLK_RST_CONTROLLER_CLK_SOURCE_UART_FST_MIPI_CAL 0x66C
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#define CLK_RST_CONTROLLER_CLK_SOURCE_SDMMC_LEGACY_TM 0x694
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#define CLK_RST_CONTROLLER_CLK_SOURCE_NVENC 0x6A0
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#define CLK_RST_CONTROLLER_CLK_SOURCE_APE 0x6C0
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#define CLK_RST_CONTROLLER_CLK_SOURCE_USB2_HSIC_TRK 0x6CC
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#define CLK_RST_CONTROLLER_SE_SUPER_CLK_DIVIDER 0x704
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#define CLK_RST_CONTROLLER_CLK_SOURCE_UARTAPE 0x710
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#include <soc/pinmux.h>
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#include <soc/pmc.h>
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#include <soc/uart.h>
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#include <soc/timer.h>
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#include <soc/t210.h>
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#include <mem/mc.h>
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#include <mem/minerva.h>
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@ -1,6 +1,6 @@
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/*
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* Copyright (c) 2018 naehrwert
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* Copyright (c) 2018-2020 CTCaer
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* Copyright (c) 2018-2022 CTCaer
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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@ -18,7 +18,7 @@
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#include <string.h>
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#include <soc/i2c.h>
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#include <utils/util.h>
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#include <soc/timer.h>
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#define I2C_PACKET_PROT_I2C BIT(4)
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#define I2C_HEADER_CONT_XFER BIT(15)
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#include <string.h>
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#include "irq.h"
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#include <soc/timer.h>
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#include <soc/t210.h>
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#include <gfx_utils.h>
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#include <mem/heap.h>
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@ -16,8 +16,8 @@
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#include <soc/hw_init.h>
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#include <soc/pmc.h>
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#include <soc/timer.h>
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#include <soc/t210.h>
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#include <utils/util.h>
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void pmc_scratch_lock(pmc_sec_lock_t lock_mask)
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{
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@ -1,5 +1,6 @@
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/*
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* Copyright (c) 2018 naehrwert
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* Copyright (c) 2018-2022 CTCaer
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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@ -244,28 +245,6 @@
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#define SYSCTR0_COUNTERID10 0xFF8
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#define SYSCTR0_COUNTERID11 0xFFC
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/*! TMR registers. */
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#define TIMERUS_CNTR_1US (0x10 + 0x0)
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#define TIMERUS_USEC_CFG (0x10 + 0x4)
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#define TIMER_TMR8_TMR_PTV 0x78
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#define TIMER_TMR9_TMR_PTV 0x80
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#define TIMER_PER_EN BIT(30)
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#define TIMER_EN BIT(31)
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#define TIMER_TMR8_TMR_PCR 0x7C
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#define TIMER_TMR9_TMR_PCR 0x8C
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#define TIMER_INTR_CLR BIT(30)
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#define TIMER_WDT4_CONFIG (0x100 + 0x80)
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#define TIMER_SRC(TMR) ((TMR) & 0xF)
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#define TIMER_PER(PER) (((PER) & 0xFF) << 4)
|
||||
#define TIMER_SYSRESET_EN BIT(14)
|
||||
#define TIMER_PMCRESET_EN BIT(15)
|
||||
#define TIMER_WDT4_COMMAND (0x108 + 0x80)
|
||||
#define TIMER_START_CNT BIT(0)
|
||||
#define TIMER_CNT_DISABLE BIT(1)
|
||||
#define TIMER_WDT4_UNLOCK_PATTERN (0x10C + 0x80)
|
||||
#define TIMER_MAGIC_PTRN 0xC45A
|
||||
|
||||
/*! I2S registers. */
|
||||
#define I2S1_CG 0x88
|
||||
#define I2S1_CTRL 0xA0
|
||||
|
|
|
@ -1,6 +1,6 @@
|
|||
/*
|
||||
* Copyright (c) 2018 naehrwert
|
||||
* Copyright (c) 2019-2020 CTCaer
|
||||
* Copyright (c) 2019-2022 CTCaer
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms and conditions of the GNU General Public License,
|
||||
|
@ -17,8 +17,8 @@
|
|||
|
||||
#include <soc/uart.h>
|
||||
#include <soc/clock.h>
|
||||
#include <soc/timer.h>
|
||||
#include <soc/t210.h>
|
||||
#include <utils/util.h>
|
||||
|
||||
/* UART A, B, C, D and E. */
|
||||
static const u32 uart_baseoff[5] = { 0, 0x40, 0x200, 0x300, 0x400 };
|
||||
|
|
|
@ -16,6 +16,9 @@
|
|||
*/
|
||||
|
||||
#include <string.h>
|
||||
|
||||
#include <mem/heap.h>
|
||||
#include <soc/timer.h>
|
||||
#include <storage/emmc.h>
|
||||
#include <storage/sdmmc.h>
|
||||
#include <storage/mmc.h>
|
||||
|
@ -23,8 +26,6 @@
|
|||
#include <storage/sd_def.h>
|
||||
#include <memory_map.h>
|
||||
#include <gfx_utils.h>
|
||||
#include <mem/heap.h>
|
||||
#include <utils/util.h>
|
||||
|
||||
//#define DPRINTF(...) gfx_printf(__VA_ARGS__)
|
||||
#define DPRINTF(...)
|
||||
|
|
|
@ -27,8 +27,8 @@
|
|||
#include <soc/hw_init.h>
|
||||
#include <soc/pinmux.h>
|
||||
#include <soc/pmc.h>
|
||||
#include <soc/timer.h>
|
||||
#include <soc/t210.h>
|
||||
#include <utils/util.h>
|
||||
|
||||
//#define DPRINTF(...) gfx_printf(__VA_ARGS__)
|
||||
//#define ERROR_EXTRA_PRINTING
|
||||
|
|
|
@ -1,7 +1,7 @@
|
|||
/*
|
||||
* Fan driver for Nintendo Switch
|
||||
*
|
||||
* Copyright (c) 2018-2021 CTCaer
|
||||
* Copyright (c) 2018-2022 CTCaer
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms and conditions of the GNU General Public License,
|
||||
|
@ -24,8 +24,8 @@
|
|||
#include <soc/gpio.h>
|
||||
#include <soc/hw_init.h>
|
||||
#include <soc/pinmux.h>
|
||||
#include <soc/timer.h>
|
||||
#include <soc/t210.h>
|
||||
#include <utils/util.h>
|
||||
|
||||
void set_fan_duty(u32 duty)
|
||||
{
|
||||
|
|
|
@ -1,7 +1,7 @@
|
|||
/*
|
||||
* USB Gadget HID driver for Tegra X1
|
||||
*
|
||||
* Copyright (c) 2019-2020 CTCaer
|
||||
* Copyright (c) 2019-2022 CTCaer
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms and conditions of the GNU General Public License,
|
||||
|
@ -23,8 +23,8 @@
|
|||
#include <input/joycon.h>
|
||||
#include <input/touch.h>
|
||||
#include <soc/hw_init.h>
|
||||
#include <soc/timer.h>
|
||||
#include <soc/t210.h>
|
||||
#include <utils/util.h>
|
||||
|
||||
#include <memory_map.h>
|
||||
|
||||
|
|
|
@ -24,13 +24,13 @@
|
|||
#include <usb/usbd.h>
|
||||
#include <gfx_utils.h>
|
||||
#include <soc/hw_init.h>
|
||||
#include <soc/timer.h>
|
||||
#include <soc/t210.h>
|
||||
#include <storage/sd.h>
|
||||
#include <storage/sdmmc.h>
|
||||
#include <storage/sdmmc_driver.h>
|
||||
#include <utils/btn.h>
|
||||
#include <utils/sprintf.h>
|
||||
#include <utils/util.h>
|
||||
|
||||
#include <memory_map.h>
|
||||
|
||||
|
|
|
@ -1,7 +1,7 @@
|
|||
/*
|
||||
* Enhanced USB Device (EDCI) driver for Tegra X1
|
||||
*
|
||||
* Copyright (c) 2019-2021 CTCaer
|
||||
* Copyright (c) 2019-2022 CTCaer
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms and conditions of the GNU General Public License,
|
||||
|
@ -30,9 +30,9 @@
|
|||
#include <soc/gpio.h>
|
||||
#include <soc/pinmux.h>
|
||||
#include <soc/pmc.h>
|
||||
#include <soc/timer.h>
|
||||
#include <soc/t210.h>
|
||||
#include <utils/btn.h>
|
||||
#include <utils/util.h>
|
||||
|
||||
#include <memory_map.h>
|
||||
|
||||
|
|
|
@ -1,7 +1,7 @@
|
|||
/*
|
||||
* eXtensible USB Device driver (XDCI) for Tegra X1
|
||||
*
|
||||
* Copyright (c) 2020-2021 CTCaer
|
||||
* Copyright (c) 2020-2022 CTCaer
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms and conditions of the GNU General Public License,
|
||||
|
@ -28,9 +28,9 @@
|
|||
#include <soc/clock.h>
|
||||
#include <soc/fuse.h>
|
||||
#include <soc/pmc.h>
|
||||
#include <soc/timer.h>
|
||||
#include <soc/t210.h>
|
||||
#include <utils/btn.h>
|
||||
#include <utils/util.h>
|
||||
|
||||
#include <memory_map.h>
|
||||
|
||||
|
|
|
@ -18,8 +18,8 @@
|
|||
#include "btn.h"
|
||||
#include <soc/i2c.h>
|
||||
#include <soc/gpio.h>
|
||||
#include <soc/timer.h>
|
||||
#include <soc/t210.h>
|
||||
#include <utils/util.h>
|
||||
#include <power/max77620.h>
|
||||
|
||||
u8 btn_read()
|
||||
|
|
|
@ -1,6 +1,6 @@
|
|||
/*
|
||||
* Copyright (c) 2018 naehrwert
|
||||
* Copyright (c) 2018-2021 CTCaer
|
||||
* Copyright (c) 2018-2022 CTCaer
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms and conditions of the GNU General Public License,
|
||||
|
@ -100,7 +100,7 @@ typedef unsigned long uptr;
|
|||
|
||||
#define byte_swap_16(num) ((((num) >> 8) & 0xff) | (((num) << 8) & 0xff00))
|
||||
#define byte_swap_32(num) ((((num) >> 24) & 0xff) | (((num) << 8) & 0xff0000) | \
|
||||
(((num) >> 8 )& 0xff00) | (((num) << 24) & 0xff000000))
|
||||
(((num) >> 8 ) & 0xff00) | (((num) << 24) & 0xff000000))
|
||||
|
||||
|
||||
/* Bootloader/Nyx */
|
||||
|
|
Loading…
Reference in a new issue