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1230 commits 2 branches 75 tags 7 MiB
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242 commits

Author SHA1 Message Date
CTCaer
9f30c51bd1 bdk: joycon: refactor driver 2022-05-09 05:32:32 +03:00
CTCaer
f7bf4af3ec bdk: uart: refactor and add new functionality 
- Allow to set CTS/RTS mode (only specific combos supported for now)
- Support the above modes in receiving
- Set 2 stop bits to decreases errors on high baudrates
 2022-05-08 05:45:16 +03:00
CTCaer
ebe7b5a603 bdk: utils: add approx. square root calc for u64 2022-05-08 05:27:05 +03:00
CTCaer
ebf0db77ee bdk: sprintf: add negative number support for %d 
This will now force a number as negative if bit31 is set and properly create the relevant string.

That means that external handling in order to show sign is now not needed.
 2022-05-08 05:26:01 +03:00
CTCaer
81730c5f7e bdk: pinmux/pmc: add more defines 2022-05-08 05:22:41 +03:00
CTCaer
76d1b4e221 bdk: sdmmc: refactor defines 
And fix a bug with tuning trim values
 2022-05-08 05:21:29 +03:00
CTCaer
4a1cb1f2ea bdk: fan: add Hoag and Aula SKUs support 
Now that what was hanging Aula is found (using PWM with its clock disabled), add full support for fan control on both SKUs.
 2022-05-08 05:07:38 +03:00
CTCaer
58a2094448 bdk: reg 5v: add support for Hoag and Aula SKUs 
Add support back and make it more proper.
Also add fan regulator support also.
 2022-05-08 05:05:39 +03:00
CTCaer
37de367fef bdk: sdram: deduplicate dram configs 
Additionally add info about new hynix chip and correct ids 3 and 5 on T210B01 based Switch.
 2022-05-08 04:58:36 +03:00
CTCaer
450d95e573 bdk: di: correct samsung backlight set 
Now that vblank writes are fixed we can return to proper backlight set.

Additionally, account for the pwm smoothing when backlight is turned off. That's to avoid visible green tint glitches when display is also turned off.
 2022-05-08 04:53:13 +03:00
CTCaer
969a49edba bdk: di: reselect winA when done with winD config 2022-05-08 04:49:28 +03:00
CTCaer
9908eb8bb3 bdk: di: samsung panel: better init 
- Set display color profile to natural (it's still vivid but not overblown.)
- Enable PWM slope and set it to 6 frames in order to have smooth backlight transitions
 2022-05-08 04:48:55 +03:00
CTCaer
56dcbb2b23 bdk: di: cleanup configs 
Nintendo or Nvidia copied pasted the dynamic display code into static arrays in order to do the static hw init in bootloader and boot sysmodule.

Ofc that does double the work that is not needed at all, making it suboptimal.

Clean up every single config based on how tegra display interface hw works in order to save up space and make the process a bit faster.
 2022-05-08 04:45:03 +03:00
CTCaer
b9f40fed7a bdk: di: move plld setup code out of display obj 2022-05-08 04:41:05 +03:00
CTCaer
6ae4904c8f bdk: di: make dsi normal/vblank writes more robust 2022-05-08 04:36:20 +03:00
CTCaer
dd2bb0f555 bdk: di: refractor configs 2022-05-08 04:34:44 +03:00
CTCaer
0b8cdaf0ea bdk: di: split normal and vblank dsi reads 
And also make vblank reads more robust
 2022-05-08 04:23:31 +03:00
CTCaer
83c95d8a3b bdk: sdram: update 20/21/22 ids for new dram 
Dram chip is Samsung 4GB built on 1z-nm that allows for 40% lower power usage.
 2022-03-23 02:20:55 +02:00
CTCaer
ff214f25c1 bdk: update l4t hekatf prep functions 2022-03-23 00:58:20 +02:00
CTCaer
0fef90dc4c bdk: sd: return proper error for sd file save 2022-02-15 00:36:23 +02:00
CTCaer
ee465b98af bdk: sdmmc correct exit on eMMC < 4.0 modules 2022-02-15 00:24:53 +02:00
CTCaer
83b895a062 bdk: heap: improvements 
Correct types everywhere.
Add BDK_MALLOC_NO_DEFRAG that disables defragmentation on the heap.
 2022-02-15 00:22:38 +02:00
CTCaer
ce8d1eca91 bdk: remove sd mounts from ianos and check if sd is mounted in sd ops 2022-02-15 00:17:53 +02:00
CTCaer
3f65a30b2e bdk: more atf prep 2022-02-15 00:14:53 +02:00
CTCaer
7c74391754 bdk: bpmp: do not use full maintenance 
Instead use proper clean/invalidation of dcache.
 2022-02-15 00:14:14 +02:00
CTCaer
52bb6a96e5 bdk: nx emmc bis: fix out of cluster bounds accesses 2022-01-29 01:40:38 +02:00
CTCaer
6666dd4b46 bdk: fatfs: better PrFILE2 SAFE record creation 2022-01-29 01:40:05 +02:00
CTCaer
3fdb72ce37 bdk: i2c: correct order of spinlock wait 2022-01-29 01:34:01 +02:00
CTCaer
9a80f8b4b5 bdk: minerva: fix fsp op/wr check for l4t 2022-01-29 01:31:28 +02:00
CTCaer
ef5790cc2c bdk: mc: always on ahb arbitration 
- Removed disables
- SDMMC code now just checks if it has access
 2022-01-29 01:29:02 +02:00
CTCaer
7bb8b1da62 di: restore window config wait for inv pitch and block linear 2022-01-29 01:26:00 +02:00
CTCaer
192a936a31 bdk: add NX eMMC BIS driver 2022-01-20 13:21:04 +02:00
CTCaer
8327de8e2e bdk: replace NYX flag with proper flags 
- BDK_MINERVA_CFG_FROM_RAM: enables support for getting minerva configuration from nyx storage
- BDK_HW_EXTRA_DEINIT: enables extra deinit in hw_reinit_workaround
- BDK_SDMMC_OC_AND_EXTRA_PRINT: enables eMMC OC support (533 MB/s) and extra error printing
 2022-01-20 13:19:48 +02:00
CTCaer
960f3b23e7 bdk: ums: adhere to emmc ops changes also 2022-01-20 13:17:55 +02:00
CTCaer
b08e36a7b0 bdk: add emmc ops 
- Add support for lower eMMC bus speed init in case of failures
- Add error count reporting
- Function names and defines changed from nx_emmc to emmc (except autorcm helper function)
- Enabling emuMMC support needs BDK_EMUMMC_ENABLE flag passed over
 2022-01-20 13:14:38 +02:00
CTCaer
00110a8863 bdk: move sd ops into bdk 2022-01-20 12:48:41 +02:00
CTCaer
7ae4fd03c2 bdk: minerva: prep for ATF direct boot support 2022-01-20 12:43:24 +02:00
CTCaer
e071fe44b0 bdk: ini: reduce heap fragmentation/pressure 2022-01-20 12:41:20 +02:00
CTCaer
39d411dc68 bdk: uart: add uart va print 2022-01-20 12:39:32 +02:00
CTCaer
82f90fae28 bdk: utils: add vprintf 2022-01-20 12:37:41 +02:00
CTCaer
10e1f67dc5 bdk: utils: add strcpy with head/tail whitespace removal 2022-01-20 12:36:25 +02:00
CTCaer
10b479dc1c bdk: clock: add apb/ahb clock control 2022-01-20 12:32:57 +02:00
CTCaer
3dd12321f8 bdk: add activity monitor driver 2022-01-20 12:32:02 +02:00
CTCaer
c1441a64c7 bdk: se: expose xts functions and add nx xts 2022-01-20 12:28:26 +02:00
CTCaer
0e35e68fd5 bdk: se: add t210b01 data coherency WAR 2022-01-20 12:27:25 +02:00
CTCaer
853f10f774 bdk: pmc: update tzram defines 2022-01-20 12:13:35 +02:00
CTCaer
4628ee6dc5 bdk: di: window fb changes 
- Get fb address from in window regs
- Remove 2 frames wait
 2022-01-20 12:12:19 +02:00
CTCaer
3bb46c6470 bdk: di: allocate fifo buffer once 2022-01-20 12:09:29 +02:00
CTCaer
5e6a7c486b bdk: btn: enable HOME button as input 2022-01-16 01:05:42 +02:00
CTCaer
1a9c6bf983 bdk: correct reg init as per TRM 2022-01-16 01:04:52 +02:00