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1399 commits 2 branches 75 tags 6.9 MiB
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25 commits

Author SHA1 Message Date
CTCaer
9a98c1afb9 bdk: stylistic corrections 
And update copyrights
 2023-02-11 23:46:38 +02:00
CTCaer
4d7eb6a647 bdk: clock: improve pllc deinit 2023-02-11 23:11:24 +02:00
CTCaer
9d889e2c3e bdk: Add driver for VIC 
VIC is a HW engine that allows for frame/texture buffer manipulation.
 2022-10-11 06:41:38 +03:00
CTCaer
197ce4c76f bdk: sdmmc: timing changes 
- Correct HS102 naming to DDR100
- Fix clock for DDR50 (even if it's unused)
 2022-10-11 04:05:12 +03:00
CTCaer
70523e404f bdk: whitespace refactor 2022-07-11 22:10:11 +03:00
CTCaer
b0c0a86108 bdk: migrate timers/sleeps to timer driver 2022-06-27 10:22:19 +03:00
CTCaer
f452d916c9 bdk: clock: add ext peripheral clock control 2022-05-09 06:08:39 +03:00
CTCaer
12aac3a0fc bdk: clock: add 3 megabaud support for UART 2022-05-09 05:47:08 +03:00
CTCaer
b9f40fed7a bdk: di: move plld setup code out of display obj 2022-05-08 04:41:05 +03:00
CTCaer
3f65a30b2e bdk: more atf prep 2022-02-15 00:14:53 +02:00
CTCaer
10b479dc1c bdk: clock: add apb/ahb clock control 2022-01-20 12:32:57 +02:00
CTCaer
3dd12321f8 bdk: add activity monitor driver 2022-01-20 12:32:02 +02:00
CTCaer
70504c295e bdk: various functionality independent changes 2022-01-16 01:03:24 +02:00
CTCaer
bcec028b0f clock: update device frequency getter function 
- Add missing write commits
- Remove hardcoded values
 2021-09-17 23:16:43 +03:00
CTCaer
8f9d52aa89 clock: move pllx enable to clock object 2021-09-17 23:13:53 +03:00
CTCaer
11ca6caf5f clock: Add more defines and simplify some logic 2020-12-26 17:28:08 +02:00
CTCaer
15afdf53e4 clock: Add module actual frequency getter 2020-12-26 17:25:23 +02:00
CTCaer
a36fec5696 clock: Lock clock to always enabled for SE in T210B01 2020-07-04 21:07:25 +03:00
CTCaer
cabaa6cfb8 Utilize BIT macro everywhere 2020-11-26 01:41:45 +02:00
CTCaer
0b314d7f21 clock: Move UTMIPLL init from USB to clock 2020-11-15 14:43:36 +02:00
CTCaer
8305058cf5 clock: Move PLLU init/deinit from USB to clock 2020-11-15 14:42:01 +02:00
CTCaer
638a3909c5 Refactor various variables and names 2020-07-17 18:00:32 +03:00
CTCaer
e158d9bc00 clk: Refactor CLK devices bits 2020-07-17 16:50:17 +03:00
CTCaer
6e256d29c7 Utilize hekate's BDK for hekate main and Nyx 2020-06-14 16:45:45 +03:00
CTCaer
185526d134 Introducing Bootloader Development Kit (BDK) 
BDK will allow developers to use the full collection of drivers,
with limited editing, if any, for making payloads for Nintendo Switch.

Using a single source for everything will also help decoupling
Switch specific code and easily port it to other Tegra X1/X1+ platforms.
And maybe even to lower targets.

Everything is now centrilized into bdk folder.
Every module or project can utilize it by simply including it.

This is just the start and it will continue to improve.
 2020-06-14 15:25:21 +03:00
Renamed from bootloader/soc/clock.c (Browse further)