CTCaer
9d889e2c3e
bdk: Add driver for VIC
...
VIC is a HW engine that allows for frame/texture buffer manipulation.
2022-10-11 06:41:38 +03:00
CTCaer
bfad719fcd
bdk: small refactor
2022-10-11 06:16:38 +03:00
CTCaer
197ce4c76f
bdk: sdmmc: timing changes
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- Correct HS102 naming to DDR100
- Fix clock for DDR50 (even if it's unused)
2022-10-11 04:05:12 +03:00
CTCaer
d259d6f6d6
bdk: watchdog: clear timer interrupt also in handling
2022-07-11 22:10:41 +03:00
CTCaer
70523e404f
bdk: whitespace refactor
2022-07-11 22:10:11 +03:00
CTCaer
57c8fd1f8c
bdk: fiq: watchdog handling
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`BDK_WATCHDOG_FIQ_ENABLE` enables watchdog handling.
`BDK_RESTART_BL_ON_WDT` causes a reload of bootloader on FIQ
These 2 are useful when wanting to detect and handle hangs.
2022-06-29 12:12:03 +03:00
CTCaer
b0c0a86108
bdk: migrate timers/sleeps to timer driver
2022-06-27 10:22:19 +03:00
CTCaer
061e10152f
bdk: timer: add timer/watchdog driver
2022-06-27 10:20:25 +03:00
CTCaer
16af97c79a
uart: rename print to printf
2022-06-25 05:42:42 +03:00
CTCaer
bdb8f6d352
ccplex: name some flow control values
2022-06-25 05:42:19 +03:00
CTCaer
e9587a325c
bdk: fuse: add ipatch support for T210B01
2022-05-16 13:05:12 +03:00
CTCaer
87fe374b3b
bdk: uart: use 2 STOP bits based on baudrate
2022-05-14 12:25:02 +03:00
CTCaer
b56e788d12
bdk: pinmux: more proper uart pinmuxing
2022-05-14 12:20:57 +03:00
CTCaer
9e613a7600
bdk: hwinit: simplify uart debug port paths
2022-05-13 03:56:59 +03:00
CTCaer
f452d916c9
bdk: clock: add ext peripheral clock control
2022-05-09 06:08:39 +03:00
CTCaer
12aac3a0fc
bdk: clock: add 3 megabaud support for UART
2022-05-09 05:47:08 +03:00
CTCaer
f7bf4af3ec
bdk: uart: refactor and add new functionality
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- Allow to set CTS/RTS mode (only specific combos supported for now)
- Support the above modes in receiving
- Set 2 stop bits to decreases errors on high baudrates
2022-05-08 05:45:16 +03:00
CTCaer
81730c5f7e
bdk: pinmux/pmc: add more defines
2022-05-08 05:22:41 +03:00
CTCaer
b9f40fed7a
bdk: di: move plld setup code out of display obj
2022-05-08 04:41:05 +03:00
CTCaer
3f65a30b2e
bdk: more atf prep
2022-02-15 00:14:53 +02:00
CTCaer
3fdb72ce37
bdk: i2c: correct order of spinlock wait
2022-01-29 01:34:01 +02:00
CTCaer
8327de8e2e
bdk: replace NYX flag with proper flags
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- BDK_MINERVA_CFG_FROM_RAM: enables support for getting minerva configuration from nyx storage
- BDK_HW_EXTRA_DEINIT: enables extra deinit in hw_reinit_workaround
- BDK_SDMMC_OC_AND_EXTRA_PRINT: enables eMMC OC support (533 MB/s) and extra error printing
2022-01-20 13:19:48 +02:00
CTCaer
39d411dc68
bdk: uart: add uart va print
2022-01-20 12:39:32 +02:00
CTCaer
10b479dc1c
bdk: clock: add apb/ahb clock control
2022-01-20 12:32:57 +02:00
CTCaer
3dd12321f8
bdk: add activity monitor driver
2022-01-20 12:32:02 +02:00
CTCaer
853f10f774
bdk: pmc: update tzram defines
2022-01-20 12:13:35 +02:00
CTCaer
5e6a7c486b
bdk: btn: enable HOME button as input
2022-01-16 01:05:42 +02:00
CTCaer
1a9c6bf983
bdk: correct reg init as per TRM
2022-01-16 01:04:52 +02:00
CTCaer
70504c295e
bdk: various functionality independent changes
2022-01-16 01:03:24 +02:00
CTCaer
a5cd962f99
bdk: add global header
2022-01-15 23:58:27 +02:00
CTCaer
c801ef8dda
bdk: use size defines where applicable
2021-10-01 15:03:18 +03:00
CTCaer
a1910156d8
bdk: hwinit: save boot reason for later usage
2021-10-01 14:32:42 +03:00
CTCaer
bcec028b0f
clock: update device frequency getter function
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- Add missing write commits
- Remove hardcoded values
2021-09-17 23:16:43 +03:00
CTCaer
8f9d52aa89
clock: move pllx enable to clock object
2021-09-17 23:13:53 +03:00
CTCaer
e9edcfeeb0
bdk: remove all references and defines to sept
2021-08-28 17:10:21 +03:00
CTCaer
70a06a6cae
sdram: add support for missing new dram ids
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In preparation of dram chip shortages, add missing new ids that are now confirmed that they will be in mass usage
2021-08-28 16:56:49 +03:00
CTCaer
7c72c9777a
fuse/hwinit: move automatic SBK set into fuse
2021-08-28 16:46:15 +03:00
CTCaer
73df5e6743
fuse: add nx aula hw type
2021-08-28 16:44:16 +03:00
CTCaer
ce6926c36c
fuse: remove fuse counting, bit count will be used instead
2021-06-08 05:53:31 +03:00
CTCaer
c29db97f73
hwinit/joycon: move uart clock deinits to joycon driver
2021-05-11 10:24:48 +03:00
CTCaer
d7ce2a81db
bpmp: return previous fid when setting a new one
2021-05-11 09:21:12 +03:00
CTCaer
28008ac7ac
hwinit: add seamless display (L4T Linux/Android)
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Initial support is for coreboot based preloading.
2021-04-11 09:18:55 +03:00
CTCaer
513f77a2ad
uart: use proper interrupt decoding
2021-03-17 08:51:49 +02:00
CTCaer
a7bf8bf118
se: Refactor with proper names
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Additionally fix some bugs in rsa access control
2021-02-06 02:55:58 +02:00
CTCaer
8fc5267110
tmp451: Show correct temperature for T210B01
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The thermal measurement substrate transistor was changed in Mariko SoCs.
This ensures that it's properly offset by -12.5 °C.
2021-01-14 17:58:23 +02:00
CTCaer
c6c396ce2a
reg5V: Manage battery source based on charger status
2021-01-11 21:30:59 +02:00
CTCaer
1f37b96359
coreboot mitigation: Reinstate SD controller power
2021-01-04 19:03:50 +02:00
CTCaer
83ab79c51e
fuse: Return the proper dram id when raw is requested
2021-01-04 02:41:55 +02:00
CTCaer
745ac609d2
max7762x: Update everything to use the improved pmic management
2021-01-04 02:41:15 +02:00
CTCaer
60b629e57f
Move display related objects to display parrent
2020-12-28 05:19:23 +02:00