nold/hekate
1
0
Fork 0
mirror of https://github.com/CTCaer/hekate synced 2024-09-19 22:29:00 +00:00
Code Issues Packages Projects Releases Wiki Activity
1671 commits 2 branches 74 tags 6.5 MiB
Commit graph

56 commits

Author SHA1 Message Date
CTCaer e47b6ec19b bdk: hwinit: display changes 
Do not display ldo0 if enabled here as it's not needed.
Make sure PLLP_OUTB is properly reset in case of coming out of warmboot.
 2024-07-02 17:59:14 +03:00
CTCaer acb3997a7d bdk: hwinit: reorder no io power 
And make sure sdmmc iopower is not enabled after vdd disable.
 2024-07-02 17:56:20 +03:00
CTCaer 054c68f251 bdk: hwinit: power on all relevant rails 
Since that doesn't happen via sdram init anymore, do it in hwinit.
It only matters if we came out of warmboot.
 2024-06-08 12:21:15 +03:00
CTCaer 85eb5489fe bdk: pmc: rename io/det power defines 2024-06-08 12:16:07 +03:00
CTCaer 8b4f776c9d bdk: fan: rename functions and add set from temp 
- Rename functions to proper style (drivername_)
- Add fan_set_from_temp for managing the fan with passed SoC temperature.
 2024-06-07 17:14:05 +03:00
CTCaer 14c482ddce bdk: display: remove max77620 gpio 7 enable 
It is actually not used at all.
So do not configure it to save power.
 2024-06-05 15:20:27 +03:00
CTCaer 8d49bc3c33 bdk: hwinit: move LDO8 init in regulators init 
And also reorder it above I2C1 init (because of HOAG).
 2024-06-05 01:35:05 +03:00
CTCaer 39c614a3ab bdk: hwinit: move sd2 to hw init 
SD2 powers LDO0/1/8 on T210B01 so there's no need to be in display init.
Also there's not need to power it down first so configure it in one go.
 2024-06-05 01:33:15 +03:00
CTCaer 05db43a97c bdk: hwinit: move down debug uart init 2024-06-02 07:44:22 +03:00
CTCaer ae29f359ee bdk: hwinit: rename reinit_workaround to deinit 2024-05-19 10:49:25 +03:00
CTCaer 985c513770 bdk: hwinit: add arbiter config 2024-05-19 10:07:06 +03:00
CTCaer 7f98fb736a bdk: hwinit: reorder sdmmc1 reg disable 2023-12-25 04:07:26 +02:00
CTCaer ce137852b7 bdk: change some defines and comments 2023-10-12 06:59:15 +03:00
CTCaer b674624ad0 bdk: timer: add instruction sleep 
usage:
`isleep(ILOOP(instructions))`

Each loop is 3 cycles, or approximately 7.35ns on 408MHz CPU clock.
 2023-06-09 10:33:11 +03:00
CTCaer 27ae312227 bdk: minor naming edits 2023-03-31 09:11:55 +03:00
CTCaer 17cdd5af0d bdk: hwdeinit: restore order of bpmp clock set 
Restore order of bpmp clock scale down in deinit, in order to decrease pressure on clock deinits.
 2023-02-22 14:48:43 +02:00
CTCaer 9a98c1afb9 bdk: stylistic corrections 
And update copyrights
 2023-02-11 23:46:38 +02:00
CTCaer 72abe60a3b bdk: hw init: remove support for broken hwinits 
It's 2023 already.
 2023-02-11 23:19:56 +02:00
CTCaer 114abba815 bdk: hw init: do not touch audio clocks on t210b01 2023-02-11 23:13:41 +02:00
CTCaer 5bb9a244ea bdk: utilize new gpio functions 2023-02-11 23:08:32 +02:00
CTCaer 0e1eece04f bdk: hw-init: remove charger forced enable 
Anything that doesn't manage it properly should fix itself.
(Like for example disabling charging on sleep or something. They should use the gpio equivalent.)
 2022-12-19 05:35:04 +02:00
CTCaer 4d823d5909 bdk: slight refactor 2022-12-19 05:22:55 +02:00
CTCaer d0b22bf374 bdk: manage host1x only in hw init 2022-12-19 05:14:39 +02:00
CTCaer 9d889e2c3e bdk: Add driver for VIC 
VIC is a HW engine that allows for frame/texture buffer manipulation.
 2022-10-11 06:41:38 +03:00
CTCaer bfad719fcd bdk: small refactor 2022-10-11 06:16:38 +03:00
CTCaer 70523e404f bdk: whitespace refactor 2022-07-11 22:10:11 +03:00
CTCaer b0c0a86108 bdk: migrate timers/sleeps to timer driver 2022-06-27 10:22:19 +03:00
CTCaer 9e613a7600 bdk: hwinit: simplify uart debug port paths 2022-05-13 03:56:59 +03:00
CTCaer f7bf4af3ec bdk: uart: refactor and add new functionality 
- Allow to set CTS/RTS mode (only specific combos supported for now)
- Support the above modes in receiving
- Set 2 stop bits to decreases errors on high baudrates
 2022-05-08 05:45:16 +03:00
CTCaer 8327de8e2e bdk: replace NYX flag with proper flags 
- BDK_MINERVA_CFG_FROM_RAM: enables support for getting minerva configuration from nyx storage
- BDK_HW_EXTRA_DEINIT: enables extra deinit in hw_reinit_workaround
- BDK_SDMMC_OC_AND_EXTRA_PRINT: enables eMMC OC support (533 MB/s) and extra error printing
 2022-01-20 13:19:48 +02:00
CTCaer 853f10f774 bdk: pmc: update tzram defines 2022-01-20 12:13:35 +02:00
CTCaer 5e6a7c486b bdk: btn: enable HOME button as input 2022-01-16 01:05:42 +02:00
CTCaer 1a9c6bf983 bdk: correct reg init as per TRM 2022-01-16 01:04:52 +02:00
CTCaer a5cd962f99 bdk: add global header 2022-01-15 23:58:27 +02:00
CTCaer c801ef8dda bdk: use size defines where applicable 2021-10-01 15:03:18 +03:00
CTCaer a1910156d8 bdk: hwinit: save boot reason for later usage 2021-10-01 14:32:42 +03:00
CTCaer 7c72c9777a fuse/hwinit: move automatic SBK set into fuse 2021-08-28 16:46:15 +03:00
CTCaer c29db97f73 hwinit/joycon: move uart clock deinits to joycon driver 2021-05-11 10:24:48 +03:00
CTCaer 28008ac7ac hwinit: add seamless display (L4T Linux/Android) 
Initial support is for coreboot based preloading.
 2021-04-11 09:18:55 +03:00
CTCaer a7bf8bf118 se: Refactor with proper names 
Additionally fix some bugs in rsa access control
 2021-02-06 02:55:58 +02:00
CTCaer 8fc5267110 tmp451: Show correct temperature for T210B01 
The thermal measurement substrate transistor was changed in Mariko SoCs.
This ensures that it's properly offset by -12.5 °C.
 2021-01-14 17:58:23 +02:00
CTCaer c6c396ce2a reg5V: Manage battery source based on charger status 2021-01-11 21:30:59 +02:00
CTCaer 1f37b96359 coreboot mitigation: Reinstate SD controller power 2021-01-04 19:03:50 +02:00
CTCaer 745ac609d2 max7762x: Update everything to use the improved pmic management 2021-01-04 02:41:15 +02:00
CTCaer 60b629e57f Move display related objects to display parrent 2020-12-28 05:19:23 +02:00
CTCaer b6ec217484 exo: Support uart logging 
This can be enabled via compile time flags or exosphere.ini.
Compile time flags override exosphere.ini
 2020-12-11 18:14:00 +02:00
CTCaer 5b8fb9fb6b Various refactoring and addition of comments 2020-12-11 17:25:59 +02:00
CTCaer 795ed8aadc hwinit: Add T210B01 support 2020-06-26 18:42:31 +03:00
CTCaer cabaa6cfb8 Utilize BIT macro everywhere 2020-11-26 01:41:45 +02:00
CTCaer ce156ab4e7 hos: Automate some eks and bis checks 2020-10-20 11:53:28 +03:00