Commit graph

160 commits

Author SHA1 Message Date
CTCaer
23e246f224 i2c: Add missing clocks + more refactoring 2019-09-12 23:11:17 +03:00
CTCaer
3028568019 pmc-ccplex: Have proper Power Domain toggling 2019-09-12 23:09:38 +03:00
CTCaer
a8d529cf6a Refactoring and comment adding 2019-09-12 23:08:38 +03:00
CTCaer
c5b64a2b58 tsec: Don't disable HOST1x clock because it's used
Tsec keys function always disabled host1x clock after running.
This interferes with display interface and disables further window frame syncing.
Display_end code already handles disable and reset of said clock.

It also fixes an ancient bug that was mitigated by removing the 5 frame sync on HOST1X_SYNC_SYNCPT_9 at channel 0:
5fd9daa364 (diff-6b0c56eab8515465d559ff0ea73a22c3L152)
2019-09-11 02:19:41 +03:00
Kostas Missos
b74b449601 hos: Add exosphere no user exceptions handle cfg 2019-09-09 17:00:13 +03:00
Kostas Missos
718e502983 Add more register names + refactoring 2019-09-09 16:56:37 +03:00
Kostas Missos
c1e072986d Fix build issues 2019-09-09 15:48:49 +03:00
CTCaer
8045d7992b hwinit: FIx CPU/GPU on warmboot reboot from Linux
Thanks @Stary2001 for all the testing!
2019-09-01 03:55:43 +03:00
CTCaer
02826dd9a6 sdmmc: Streamline power cycle wait for Sandisks U1 2019-08-28 02:39:43 +03:00
CTCaer
d0b0164077 ianos: Remove error unneeded printing 2019-08-28 02:09:05 +03:00
CTCaer
f3d071ca69 mem: Remove memalign
It doesn't do what it should anyway.
2019-08-28 02:08:12 +03:00
CTCaer
565956482a hos: Fix SaltyNX on emuMMC
This actually fixes the send process id patch that SaltyNX depends on.

Why it only breaks on emuMMC is unknown.
2019-08-28 01:55:19 +03:00
CTCaer
f622d57f6b utils: Fix ms timer accuracy
Additionally add BPMP delay timers for future use.
2019-08-28 01:33:38 +03:00
CTCaer
6cc0711382 autoboot: Fix force boot from ID 2019-08-28 01:12:34 +03:00
CTCaer
3472e7e7fb Various bugfixes 2019-08-28 01:08:57 +03:00
CTCaer
31db2735ce autoboot: Add forced boot from ID
By using the key `id=` with a max 7 ASCII id, hekate will search all inis automatically and pinpoint the boot entry with that id.
After that it forces a boot from this one.
2019-08-16 22:00:32 +03:00
ctcaer@gmail.com
101c8bc1d0 Bump hekate to v5.0.1 and Nyx to v0.8.1 2019-07-06 22:43:53 +03:00
ctcaer@gmail.com
2bb0dba724 [Nyx] Add button to force HOS boot screen logs 2019-07-06 22:34:03 +03:00
ctcaer@gmail.com
078ef1c4f1 Remove backup hash mode from main to reduce bin size. 2019-07-06 22:32:49 +03:00
ctcaer@gmail.com
c40c125462 [emuMMC] Disable stock emuMMC unti it's fixed 2019-07-06 22:30:22 +03:00
ctcaer@gmail.com
138da26a9a [BPMP] Fix cache coherency issues
+ Fix framebuffer memfetcher for some SoC revisions.
2019-07-06 22:22:47 +03:00
ctcaer@gmail.com
18a29c641c [HOS] Easier kip patching update from release
Kip patches will be loaded from patches.ini.
If that's not found, then patches_template.ini will be used.
2019-07-06 22:18:32 +03:00
ctcaer@gmail.com
0862cb1e7e [HOS] Fixed 6.0.x/6.1.0 stock 2019-07-06 22:16:42 +03:00
ctcaer@gmail.com
f26cfac10d [HOS] Add CFW custom keygen for 6.2.0 2019-07-06 22:10:23 +03:00
ctcaer@gmail.com
08b84384a6 Bugfixes and cleanup 2019-07-06 22:08:37 +03:00
ctcaer@gmail.com
01e2302f84 Bump version to v5.0.0 2019-06-30 04:03:42 +03:00
ctcaer@gmail.com
a1a0d8db49 [Exo] Add support for new panic format 2019-06-30 03:55:52 +03:00
ctcaer@gmail.com
03872e814a [Nyx] Prep hekate main for nyx 2019-06-30 03:55:19 +03:00
ctcaer@gmail.com
52478833de [MTC] Utilize Minerva Training Cell 2019-06-30 03:49:33 +03:00
ctcaer@gmail.com
ba0f29bc5c [PKG2] Add external kip1 patches support via .ini
The format is described in patches.ini.
For now it only supports the kips defined in hekate's code.

Next versions will add support for defining other kips.
2019-06-30 03:45:18 +03:00
ctcaer@gmail.com
f3dcfab095 More bugfixes 2019-06-30 03:40:37 +03:00
ctcaer@gmail.com
12f8f055eb [HOS] Add 8.1.0 support 2019-06-30 03:29:46 +03:00
ctcaer@gmail.com
bd7f572989 [emuMMC] Add support 2019-06-30 03:24:58 +03:00
ctcaer@gmail.com
8101fd3f7f Various bugfixes 2019-06-30 03:15:46 +03:00
CTCaer
c5ab4d6abd
Merge pull request #216 from speed47/se_sha1_parts
[Tools] implement hash file generation on backup (#101).
2019-05-19 22:36:55 +03:00
Stéphane Lesimple
ee884add8c [Tools] implement hashfile generation on backup
Add a configuration option "Full w/ hashfile" to
the "verification" option menu, to enable hashfile
generation when doing full verification of a backup.

When enabled, during full backup verification we save the
chunk's SHA256 digest in a hashfile next to the output file
we're currently verifying.

The performance impact is negligible between "Full verify"
and "Full verify w/ hashfile", because we already
compute the SHA256 of the chunks when verifying.

We save the SHA256 per chunks (4 MB) because due to
SE limitations, we can't compute the SHA256 of the
whole partition (or rawnand).

On the other hand a pure software implementation
is way too slow to be bearable, even asm-optimized:
between 15 and 90 seconds per 4 MB chunk for
crc32/sha1/sha256, depending on the optimizations
and the actual algorithm.

The output hash file format is as follows:
 # chunksize: <CHUNKSIZE_IN_BYTES>
 sha256_of_chunk_1
 sha256_of_chunk_2
 ...
 sha256_of_chunk_N
2019-04-26 17:53:24 +02:00
ctcaer@gmail.com
03268c4655 Bump version to v4.10.1 2019-04-23 18:23:17 +03:00
ctcaer@gmail.com
072bbcabf4 [HOS] Use sha256 for kernel hashing 2019-04-23 18:17:55 +03:00
ctcaer@gmail.com
7c877c5bce [HOS] Normalize new pkg2 identification 2019-04-23 03:41:07 +03:00
ctcaer@gmail.com
6aa1bdd1c6 [HOS] Fix pk2 decr after running 2nd time on 7.x+
This could happen after a pkg1/2 dump or a failed hos launch.

The 2nd time a dump or launch would be attempted, it would fail.
2019-04-23 03:38:35 +03:00
ctcaer@gmail.com
91606334c4 [sdmmc] Revert 204MHz sd device clock
Again some Sandisk U1 cards do not behave at all at speeds like that (204MHz / 102MB/s).

Revert back to 163.2MHz / 81.6MB/s.
2019-04-23 03:34:39 +03:00
ctcaer@gmail.com
25f6e91677 [sdmmc] Fix Sandisk U1 fast power cycle
Some Sandisk U1 sd cards do not behave nicely if they power cycle too fast. A min 100ms wait, is enough to mitigate that.

Fortunately, because of how the code paths are structured, this was never hit.
2019-04-23 03:31:16 +03:00
ctcaer@gmail.com
36d2da5d79 Bump version to v4.10.0 2019-04-21 17:38:29 +03:00
ctcaer@gmail.com
fd0dc04953 [HOS] Add full 8.0.0 support
Additionally, allow pkg1 to be dumped if unknown fw version.
2019-04-21 17:37:12 +03:00
ctcaer@gmail.com
8eb5ee867d [GFX] Finish ctxt global usage
Plus:
- Some whitespace fixes
- Allow UHS bus to reach max 102MB/s from 81.6MB/s
2019-04-21 17:33:39 +03:00
shchmue
e34a7543b1 [TSEC] Fix tsec timeout
Without increasing probability of a race condition
2019-04-19 11:54:09 -04:00
ctcaer@gmail.com
c80fecd080 [main] Add brick protection for RCM patched units
- If AutoRCM was found enabled, force disable it.
 (In case of chainloading.)
- Additionally disable AutoRCM function.
2019-04-16 20:09:04 +03:00
ctcaer@gmail.com
ed047ef5f5 [Tool] Support AutoRCM on devkits 2019-04-16 20:05:35 +03:00
ctcaer@gmail.com
a2ba2ecf26 Battery "desync" fix is now applied on boot 2019-04-16 19:58:12 +03:00
ctcaer@gmail.com
07fe94b6d4 [exo] Add exosphere panic report save to sd 2019-04-14 04:24:37 +03:00