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1336 commits 2 branches 75 tags 7 MiB
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563 commits

Author SHA1 Message Date
CTCaer
d50af46b03 chnldr: Support variable sizes of coreboot.rom 2020-03-21 22:18:40 +02:00
CTCaer
52874f9113 minerva: More protections 2020-03-21 22:10:06 +02:00
CTCaer
91a241dafa touch: Add Tuning Calibration 
This, for now, can be done at Nyx boot by holding VOL- and VOL+.

Make sure that you don't touch the touchscreen.
 2020-03-21 22:03:51 +02:00
CTCaer
76676f3a2e nyx: Allow for big filepaths for archive bit fixer 
It also fixes corruptions/hangs when path is bigger than 255 chars
 2020-03-18 06:30:11 +02:00
CTCaer
f5040f1e41 Update and add missing copyrights 
Probably more need to change.
 2020-03-14 09:24:24 +02:00
CTCaer
c9c3c8f716 touch: Add context based ready checks on init 2020-03-13 17:36:44 +02:00
CTCaer
144d6fd3f6 i2c: Update drivers 
Adds support for 8 byte transfers needed by touch driver changes.
 2020-03-13 10:25:27 +02:00
CTCaer
9697067466 touch: Add fw info 2020-03-13 08:48:20 +02:00
CTCaer
8539095bdb touch: Proper init 
This patch applies the simpler init from HOS driver.

The most important change is enabling a feature that the fw supports:
Automatic tuning and calibration based on saved tuning values (running HOS only once saves these).
 2020-03-13 08:39:38 +02:00
CTCaer
95e3159fe9 touch: Correct pressure calculation 
Fingertip S for Nintendo Switch uses a custom spatial calculation. It now allows to identify area of touch.
 2020-03-13 08:34:16 +02:00
CTCaer
8d5c52f087 lvgl heap: Fix critical issue with node header size 
This fixes a critical issue where the node header was 28 bytes instead of 32, causing misalignment and heap corruption.
 2020-03-09 08:39:31 +02:00
CTCaer
e6c1d9bf66 nyx: Simplify label sets 
- Use only lv_label_set_text to simplify label sets
- Fix an issue with a label cut
- Add more maintenance functions for DRAM training
 2020-03-09 08:37:41 +02:00
CTCaer
a52af1bf41 Fix building on make 4.3 2020-03-04 01:34:35 +02:00
CTCaer
ac92ca220f fan: Better thermal logic based on HOS patterns 2020-03-03 04:37:59 +02:00
CTCaer
ab8801d0de touch: Add edge compensation 
Switch touch panels have a 10-15px offset around the edges.
(10-1269, 10-709) / (15-1264, 15-704)
This allows touch driver to report a max of 0-1279, 0-719.
 2020-03-03 04:28:12 +02:00
CTCaer
f3802ec464 lists: Fix list member iteration with no entries 2020-03-03 04:24:38 +02:00
CTCaer
bc7a7bcfa0 info: Allow dumping of battery characterization table 2020-03-03 04:22:59 +02:00
CTCaer
6a52d44da6 heap: Fix edge case of reusing first node 
There is an edge case fixed where the whole would be freed and this would make use of a nullptr.

Additionally, remove usage of reserved names for vars and add comments on how it works.
 2020-03-03 04:16:20 +02:00
CTCaer
03a8a11933 Small fixes and changes 
- Allow printing of more log on HOS boot when LOGS are OFF.
- A small name refactoring
- Add battery warning symbol when battery < 3200mV
 2020-03-03 04:11:13 +02:00
CTCaer
4c1f67d022 Fix build errors 2020-01-19 15:22:59 +02:00
CTCaer
2a161b572b sdmmc: Set power cycle wait to 0 at boot 2020-01-17 09:19:58 +02:00
CTCaer
422852795f ini: Remove \r stripping as is done by FatFS 2020-01-17 09:18:31 +02:00
CTCaer
4d53f21387 mtc: Clear init magic on chainload 
Fixes a hang caused when rebooting 2 payload from L4T with old hekate in vendor partition.

L4T does not overwrite the nyx storage where the Minerva configuration is stored.
This makes new Minerva parse the wrong tables from old hekate and eventually hang the RAM, which causes an exception on BPMP.
 2020-01-14 23:41:15 +02:00
CTCaer
9263e2192f nyx: Fix low battery voltage color 2020-01-07 06:50:33 +02:00
CTCaer
c99a87dd09 clock: Move PLLC config from bpmp.c to clock.c 2020-01-07 06:46:22 +02:00
CTCaer
009db77426 bpmp: Switch to PLLC for SCLK/BPMP clock source 2020-01-07 06:26:29 +02:00
CTCaer
2f43145131 uart: Add invert, get/set IIR and fifo empty functions 2019-12-16 22:16:40 +02:00
CTCaer
e3fca2bce5 uart: Add timeout and len report to uart receive 2019-12-16 22:15:21 +02:00
CTCaer
da112a0ae9 uart: Proper uart init 2019-12-16 22:12:09 +02:00
CTCaer
90060d1d83 mtc: Don't rely on clean BSS for Minerva lib 2019-12-16 22:06:13 +02:00
CTCaer
1ccce5f1a2 gfx: Fix off-by-one in right half of 16px rendering 2019-12-16 21:49:54 +02:00
CTCaer
2aaa0331ac rtc: Add epoch convertion functions 
Thanks @shchmue for the HOS conversion
 2019-12-14 22:27:07 +02:00
CTCaer
7604239237 bpmp: Update driver to latest 2019-12-14 22:21:42 +02:00
CTCaer
1e4d63731b nyx: Fix about screen 2nd pane left margin 2019-12-12 00:20:14 +02:00
CTCaer
a664118fc7 r2p: Update r2p payload 
2 modes:
- With updater2p; Forces the reboot to payload binary to be hekate
- Without; Checks if hekate and then if old
 2019-12-12 00:13:32 +02:00
CTCaer
c6e92311f9 Add error printing for issues with libraries 
It will now show erros for the following:
- Missing or old libsys_minerva.bso (DRAM training).
- Missing libsys_lp0.bso (LP0 sleep mode).
- Missing or old Nyx version
 2019-12-11 11:22:11 +02:00
CTCaer
24d30a40f9 hos: Add Atmosphere's system mem increase patches 2019-12-10 19:20:02 +02:00
CTCaer
e4f7928513 minerva: Fix compatibility check for hekate main 
Init now also returns status.
 2019-12-09 22:27:01 +02:00
CTCaer
bd8a5ece58 heap: Fix type for heap monitor memset size 2019-12-09 19:30:45 +02:00
CTCaer
d0850516ab Bump hekate to v5.1.0 and Nyx to v0.8.3 2019-12-08 18:59:00 +02:00
CTCaer
4c5a78de6f hos: Fix pkg2 keygen with newer sept 
This change also adds support for older sept binaries.
 2019-12-08 18:32:09 +02:00
CTCaer
c12c696e53 hos: Add 9.1.0 support 2019-12-08 03:01:21 +02:00
CTCaer
f256bd5909 Move all I/DRAM addresses into a memory map 
Many addresses were moved around to pack the memory usage!
 2019-12-08 02:23:03 +02:00
CTCaer
0290892b23 nyx hw reconfig: Add fan and 5V regulators deinit 
Additionally re-arrange minerva and mmu after these.
 2019-12-08 01:41:57 +02:00
CTCaer
643a8ea8f9 fan: Update driver 
Make use of 5V regulator driver and fixe some bugs
 2019-12-08 01:38:12 +02:00
CTCaer
a6d8854499 power: Add 5V regulator driver 2019-12-08 01:36:35 +02:00
CTCaer
96bafd8bd7 nyx: Use color when battery voltage < 3200mV 
For status bar and Battery Info.
 2019-12-08 01:32:26 +02:00
CTCaer
65ee728939 nyx: Enable fan when temps are high 2019-12-08 01:26:26 +02:00
CTCaer
e1748a0727 nyx: Boost eMMC backup/restore verification times 
This change allows SE to start verifying the first buffer while the 2nd is populated. Effectively cutting verification down to almost half.
 2019-12-08 01:20:05 +02:00
CTCaer
35e853fd03 touch: Change I2C4 pinmuxing as per HOS 2019-12-07 23:23:01 +02:00
CTCaer
7e26be6587 lvgl: Optimize color blending 
The manual optimization done dramatically increases performance in software color blending.
Isolated gains reach 20-30%.

Color blending calculates 2 +1 color channels instead of the expensive 1+1+1 calculations.

This is as best as it gets without going in asm optimizations.
 2019-12-07 20:47:19 +02:00
CTCaer
733da0f4d5 nyx: Remove compiler flags to gain extra perf 
- Removing no-inline produces 30-50% performance gains on specific real time sensitive functions used for rendering.
On overall, this will give 5-10% observed performance gains.

- Strict aliasing produces some extra small gains.
 2019-12-07 20:35:17 +02:00
Kostas Missos
a357395cc6 nyx: Remove LTO in order to increase performance 
Perf gains from removing LTO linker flag amounts to actually more than 5% average in real usage scenarios in Nyx.
(These include overall timings with static waits included. So basically as observed by user.)

Gains observed, on many isolated cases, were between 15-35%.

Additionally, this will make compiling fast again.
 2019-12-07 20:26:51 +02:00
Kostas Missos
48c15a8fde nyx: Release the shackles 2019-12-07 20:16:38 +02:00
Kostas Missos
0b45a5a11a bpmp: Reduce freq to 589MHz 
3 users had issues with 602MHz.
This will probably bring the SoC binning compatibility to 100%.

Additionally, make it easy to change default boost frequency.

The tiny loss in perf, will be mitigated in Nyx. (It's actually even faster)
 2019-12-07 02:01:29 +02:00
Kostas Missos
bc7dec2e61 bpmp: Add forcable maintenance 
+ Fix build issues
 2019-12-07 01:47:44 +02:00
CTCaer
9811ba53e0 pmic: Enable Low Battery Shutdown for 2.8V 
There's an increasing ammount of users that kill their batteries when forgetting their devices into AutoRCM / RCM mode.

This will now force a shutdown the moment the battery reaches 2.8V. Even if device is inside RCM mode.

Notice: We might need to increase the limit.
 2019-12-04 22:06:34 +02:00
CTCaer
a16b1af698 pmic: Always ensure that values were written 2019-12-04 22:02:17 +02:00
CTCaer
641a57a4f6 hos/mtc: Add FSP WAR and boost HOS booting times 
By implementing FSP WAR we can allow HOS to boot in 1600MHz and be able to switch frequency without hanging.
 2019-12-04 21:59:58 +02:00
CTCaer
84328aa676 minerva: Make use of new minerva 
- Training and switch is now faster
- Compatibility checks: New Minerva does not allow old binaries. New binaries do not allow old Minerva
- MTC table is now in a safe region
- Periodic training period increased to every 250ms
 2019-12-04 21:56:45 +02:00
CTCaer
dd8ec0d28b clock: Always wait 2us before deasserting reset 2019-12-04 21:32:51 +02:00
CTCaer
0b1eebefe1 Small refactor and bugfixes 2019-12-04 21:31:39 +02:00
CTCaer
168de9ddd8 sdmmc: Ensure aligned DMA buffers 2019-12-04 19:42:25 +02:00
CTCaer
b61b212218 lvgl heap: Align addresses & sizes to cache line size 2019-12-04 19:04:11 +02:00
CTCaer
ec10b572d1 heap: Quality updates to heap management 
- Allow reuse of unused sections that fit exactly to selected allocation size. Decreases fragmentation dramatically.
- Always allocate and align mapped memory to selected alignment. Avoids having fragmented unused maps that are not aligned.
- Use a static alignment based on BPMP and generally average cache line size. Boosts performance when MMU is used.
 2019-12-04 19:02:28 +02:00
CTCaer
d1e50c558e sdram: Refactor and fix some bugs in init 2019-12-04 18:53:36 +02:00
CTCaer
2c1da3a97d se: Upgrade SE and allow SHA calc continue 
- Allow SHA to calculate sizes > 16MB and refactor sha function
- Name various registers and magic numbers
- Fix various key access bugs

In a later commit this new design will boost verification times significantly and also allow full SHA256 hashes.
 2019-12-04 17:18:16 +02:00
CTCaer
29a51124fd Simplify string ops with already compiled-in functions 2019-12-04 15:56:53 +02:00
Kostas Missos
598073e50c ext patches: Remove patches_template.ini load 
Remove patches_template.ini load.
- It has useless patches, which some times, users confuse them for "bad" patches, even though they aren't.
- No one reads on how it works and it's constantly mishandled when there's no patches.ini (which completely overrides it).
- It was not supposed to be edited.

Also release will not include it anymore.
Template will still exist for demonstrating the syntax of `patches.ini`

This commit also corrects the patches.ini encoding note as ASCII.
 2019-10-31 16:26:46 +02:00
shchmue
426c86182d heap: Prevent node chain collapse on free 2019-10-25 11:20:38 -06:00
CTCaer
65fbdfddbf kfuse: Ensure that kfuse is ready 100% for tsec 2019-10-22 18:57:51 +03:00
Kostas Missos
7c42f72b8a refactor: Remove all unwanted whitespace 2019-10-18 18:02:06 +03:00
CTCaer
fe339120e2 Bump hekate to v5.0.2 and Nyx to v0.8.2 
Also rip hekate main's menu logo.

(It will be back :P)
 2019-09-12 23:55:48 +03:00
CTCaer
e24bb44adf hos: Add full 9.0.0 support 2019-09-12 23:41:08 +03:00
CTCaer
40afcfd686 hos: Support pkg2 encrypted with newer mkeys 2019-09-12 23:39:47 +03:00
CTCaer
658c3c112f hos: automatically find new kernel ini1 offset 2019-09-12 23:37:00 +03:00
CTCaer
8033ba461f SE: Boost its speed while BPMP cache is on 
Plus add se_aes_crypt_ecb().

Thanks @shchmue for pointing out that speed bump
 2019-09-12 23:27:04 +03:00
CTCaer
8cef81c901 nyx: Fix some inconsistencies with transparency 2019-09-12 23:20:38 +03:00
CTCaer
08d212d4da FatFS: Update to R0.13c (p4) and fix some crit issues 2019-09-12 23:18:39 +03:00
CTCaer
252a57ef6a util: Utilize BPMP sleep when usleep is out of bounds 2019-09-12 23:12:17 +03:00
CTCaer
23e246f224 i2c: Add missing clocks + more refactoring 2019-09-12 23:11:17 +03:00
CTCaer
3028568019 pmc-ccplex: Have proper Power Domain toggling 2019-09-12 23:09:38 +03:00
CTCaer
a8d529cf6a Refactoring and comment adding 2019-09-12 23:08:38 +03:00
CTCaer
c5b64a2b58 tsec: Don't disable HOST1x clock because it's used 
Tsec keys function always disabled host1x clock after running.
This interferes with display interface and disables further window frame syncing.
Display_end code already handles disable and reset of said clock.

It also fixes an ancient bug that was mitigated by removing the 5 frame sync on HOST1X_SYNC_SYNCPT_9 at channel 0:
5fd9daa364 (diff-6b0c56eab8515465d559ff0ea73a22c3L152)
 2019-09-11 02:19:41 +03:00
CTCaer
4c09454bca nyx options: Do not hide delay time if AutoBoot is off 2019-09-10 23:53:45 +03:00
CTCaer
29b86ce92b nyx: Refactor Options to a separate object 2019-09-10 23:35:17 +03:00
Kostas Missos
50ebcee45d nyx: Fix stray color tags (lvgl heap corruption) 2019-09-10 17:05:52 +03:00
Kostas Missos
718e502983 Add more register names + refactoring 2019-09-09 16:56:37 +03:00
Kostas Missos
c1e072986d Fix build issues 2019-09-09 15:48:49 +03:00
CTCaer
8045d7992b hwinit: FIx CPU/GPU on warmboot reboot from Linux 
Thanks @Stary2001 for all the testing!
 2019-09-01 03:55:43 +03:00
CTCaer
02826dd9a6 sdmmc: Streamline power cycle wait for Sandisks U1 2019-08-28 02:39:43 +03:00
CTCaer
c50e61f961 nyx: Support fixing archive bits for emuMMC 2019-08-28 02:27:13 +03:00
CTCaer
deb9c94bcd nyx: Check if split restore files are 4MB aligned 
This is a mitigation for cluster version of FastFS.
During a split restore, it is allowed only once to write a cluster that is not full.
 2019-08-28 02:25:48 +03:00
CTCaer
6cc3d9df67 nyx: Fix eMMC split restore when < 10 parts 
Now it properly follows the double digit scheme.
(rawnand.bin.##)
 2019-08-28 02:23:46 +03:00
CTCaer
92a60a1e89 nyx: Various fixes 2019-08-28 02:20:48 +03:00
CTCaer
f3d071ca69 mem: Remove memalign 
It doesn't do what it should anyway.
 2019-08-28 02:08:12 +03:00
CTCaer
9533dea124 nyx: Update AutoRCM status on eMMC restore 2019-08-28 02:06:19 +03:00
CTCaer
6159d94e5d nyx: Fix autoboot list for inis 2019-08-28 01:58:12 +03:00
CTCaer
f622d57f6b utils: Fix ms timer accuracy 
Additionally add BPMP delay timers for future use.
 2019-08-28 01:33:38 +03:00
CTCaer
3472e7e7fb Various bugfixes 2019-08-28 01:08:57 +03:00
Guillem Orellana Trullols
03130ad900 Setting minerva periodic training task ready 
System status bar is not yet declared at this point, so the task that should be flagged as ready is minerva periodic training.
 2019-08-19 15:27:30 +02:00
ctcaer@gmail.com
101c8bc1d0 Bump hekate to v5.0.1 and Nyx to v0.8.1 2019-07-06 22:43:53 +03:00
ctcaer@gmail.com
9b80ec9ac7 [emuMMC] Improve change logic 
It can now properly show the existing sd parition emuMMC
 2019-07-06 22:42:59 +03:00
ctcaer@gmail.com
ac425368e4 [emuMMC] Improve migrate logic 
It can now find more existing emuMMC
 2019-07-06 22:42:01 +03:00
ctcaer@gmail.com
205dab6cbd [Nyx] Add power options when sd card removed 
Additionally disable screenshot function.
 2019-07-06 22:40:39 +03:00
ctcaer@gmail.com
ac7eb092d5 [emuMMC] Change partition type to xE0 2019-07-06 22:39:44 +03:00
ctcaer@gmail.com
fed15a2f2f [Nyx] Add init of temperature sensor 2019-07-06 22:36:35 +03:00
ctcaer@gmail.com
2bb0dba724 [Nyx] Add button to force HOS boot screen logs 2019-07-06 22:34:03 +03:00
ctcaer@gmail.com
5b919cb12e [Touch] Fix touch hang for some SoC revisions 
Fixes the hang on Nyx boot.
 2019-07-06 22:24:03 +03:00
ctcaer@gmail.com
138da26a9a [BPMP] Fix cache coherency issues 
+ Fix framebuffer memfetcher for some SoC revisions.
 2019-07-06 22:22:47 +03:00
ctcaer@gmail.com
08b84384a6 Bugfixes and cleanup 2019-07-06 22:08:37 +03:00
ctcaer@gmail.com
e6d1a31045 [Nyx] Fix icon loading for payload entries 
+ Add missing resources
 2019-06-30 06:12:31 +03:00
ctcaer@gmail.com
c41f98039c [Nyx] Introducing hekate GUI, named Nyx! 
Version 0.8.0.

Expect dragons!
 2019-06-30 04:03:00 +03:00