mirror of
https://github.com/CTCaer/hekate
synced 2024-11-16 00:49:27 +00:00
minerva: Make use of new minerva
- Training and switch is now faster - Compatibility checks: New Minerva does not allow old binaries. New binaries do not allow old Minerva - MTC table is now in a safe region - Periodic training period increased to every 250ms
This commit is contained in:
parent
66c4f30bdf
commit
84328aa676
10 changed files with 63 additions and 22 deletions
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@ -34,8 +34,10 @@ void minerva_init()
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mtc_config_t *mtc_cfg = (mtc_config_t *)&nyx_str->mtc_cfg;
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// Set table to ram.
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mtc_cfg->mtc_table = NULL;
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// Set table to nyx storage.
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mtc_cfg->mtc_table = (emc_table_t *)&nyx_str->mtc_table;
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mtc_cfg->init_done = MTC_NEW_MAGIC;
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mtc_cfg->sdram_id = (fuse_read_odm(4) >> 3) & 0x1F;
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u32 ep_addr = ianos_loader(false, "bootloader/sys/libsys_minerva.bso", DRAM_LIB, (void *)mtc_cfg);
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minerva_cfg = (void *)ep_addr;
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@ -66,7 +68,7 @@ void minerva_change_freq(minerva_freq_t freq)
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return;
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mtc_config_t *mtc_cfg = (mtc_config_t *)&nyx_str->mtc_cfg;
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if (minerva_cfg && (mtc_cfg->rate_from != freq))
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if (mtc_cfg->rate_from != freq)
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{
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mtc_cfg->rate_to = freq;
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mtc_cfg->train_mode = OP_SWITCH;
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@ -80,7 +82,7 @@ void minerva_periodic_training()
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return;
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mtc_config_t *mtc_cfg = (mtc_config_t *)&nyx_str->mtc_cfg;
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if (minerva_cfg && mtc_cfg->rate_from == FREQ_1600)
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if (mtc_cfg->rate_from == FREQ_1600)
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{
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mtc_cfg->train_mode = OP_PERIODIC_TRAIN;
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minerva_cfg(mtc_cfg, NULL);
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@ -20,7 +20,10 @@
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#include "mtc_table.h"
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#include "../utils/types.h"
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#define EMC_PERIODIC_TRAIN_MS 100
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#define MTC_INIT_MAGIC 0x3043544D
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#define MTC_NEW_MAGIC 0x5243544D
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#define EMC_PERIODIC_TRAIN_MS 250
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typedef struct
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{
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@ -35,6 +38,7 @@ typedef struct
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bool emc_2X_clk_src_is_pllmb;
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bool fsp_for_src_freq;
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bool train_ram_patterns;
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bool init_done;
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} mtc_config_t;
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enum train_mode_t
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@ -17,6 +17,7 @@
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#include "util.h"
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#include "../gfx/di.h"
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#include "../mem/minerva.h"
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#include "../power/max77620.h"
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#include "../rtc/max77620-rtc.h"
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#include "../soc/bpmp.h"
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@ -26,6 +27,8 @@
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#define USE_RTC_TIMER
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extern volatile nyx_storage_t *nyx_str;
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extern void sd_unmount();
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u32 get_tmr_s()
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@ -100,6 +103,8 @@ void reboot_normal()
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sd_unmount();
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display_end();
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nyx_str->mtc_cfg.init_done = 0;
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panic(0x21); // Bypass fuse programming in package1.
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}
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@ -110,6 +115,8 @@ void reboot_rcm()
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sd_unmount();
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display_end();
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nyx_str->mtc_cfg.init_done = 0;
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PMC(APBDEV_PMC_SCRATCH0) = 2; // Reboot into rcm.
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PMC(APBDEV_PMC_CNTRL) |= PMC_CNTRL_MAIN_RST;
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@ -41,6 +41,7 @@ typedef struct _nyx_storage_t
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u8 hekate[0x30000];
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u8 rsvd[0x800000];
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mtc_config_t mtc_cfg;
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emc_table_t mtc_table;
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} nyx_storage_t;
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u32 get_tmr_us();
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@ -30,7 +30,9 @@
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#define EMC_BASE 0x7001B000
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#define EMC0_BASE 0x7001E000
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#define EMC1_BASE 0x7001F000
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#define MTC_TABLE 0x8F000000
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#define MTC_INIT_MAGIC 0x3043544D
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#define MTC_NEW_MAGIC 0x5243544D
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#define _REG(base, off) *(vu32 *)((base) + (off))
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@ -61,6 +63,7 @@ typedef struct
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bool emc_2X_clk_src_is_pllmb;
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bool fsp_for_src_freq;
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bool train_ram_patterns;
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bool init_done;
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} mtc_config_t;
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enum train_mode_t
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@ -3857,19 +3857,17 @@ static void _minerva_get_table(mtc_config_t *mtc_cfg)
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switch (mtc_cfg->sdram_id)
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{
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case 1:
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memcpy((void *)MTC_TABLE, nx_abca2_2_10NoCfgVersion_V9_8_7_V1_6, EMC_TABLE_SIZE_R7);
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memcpy(mtc_cfg->mtc_table, nx_abca2_2_10NoCfgVersion_V9_8_7_V1_6, EMC_TABLE_SIZE_R7);
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break;
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case 0:
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case 2:
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case 3:
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case 4:
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default:
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memcpy((void *)MTC_TABLE, nx_abca2_0_3_10NoCfgVersion_V9_8_7_V1_6, EMC_TABLE_SIZE_R7);
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memcpy(mtc_cfg->mtc_table, nx_abca2_0_3_10NoCfgVersion_V9_8_7_V1_6, EMC_TABLE_SIZE_R7);
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break;
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}
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mtc_cfg->mtc_table = (emc_table_t *)MTC_TABLE;
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mtc_cfg->table_entries = 10;
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mtc_cfg->rate_to = 0;
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mtc_cfg->rate_from = 0;
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@ -3881,6 +3879,7 @@ static void _minerva_get_table(mtc_config_t *mtc_cfg)
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mtc_cfg->emc_2X_clk_src_is_pllmb = false;
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mtc_cfg->fsp_for_src_freq = false;
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mtc_cfg->train_ram_patterns = true;
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mtc_cfg->init_done = MTC_INIT_MAGIC;
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}
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void _minerva_init(mtc_config_t *mtc_cfg, void* bp)
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@ -3891,9 +3890,10 @@ void _minerva_init(mtc_config_t *mtc_cfg, void* bp)
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fsp_for_src_freq = mtc_cfg->fsp_for_src_freq;
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emc_2X_clk_src_is_pllmb = mtc_cfg->emc_2X_clk_src_is_pllmb;
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if (!mtc_cfg->mtc_table)
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if (mtc_cfg->init_done != MTC_INIT_MAGIC)
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{
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_minerva_get_table(mtc_cfg);
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if (mtc_cfg->init_done == MTC_NEW_MAGIC)
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_minerva_get_table(mtc_cfg);
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return;
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}
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@ -34,23 +34,32 @@ void minerva_init()
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mtc_config_t *mtc_cfg = (mtc_config_t *)&nyx_str->mtc_cfg;
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// Set table to nyx storage.
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mtc_cfg->mtc_table = (emc_table_t *)&nyx_str->mtc_table;
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// Set table to ram.
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if (!(mtc_cfg->table_entries == 10))
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if (mtc_cfg->init_done == MTC_INIT_MAGIC)
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{
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mtc_cfg->mtc_table = NULL;
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mtc_cfg->sdram_id = (fuse_read_odm(4) >> 3) & 0x1F;
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mtc_cfg->train_mode = OP_PERIODIC_TRAIN; // Retrain if needed.
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u32 ep_addr = ianos_loader(false, "bootloader/sys/libsys_minerva.bso", DRAM_LIB, (void *)mtc_cfg);
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minerva_cfg = (void *)ep_addr;
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return;
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}
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else
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{
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mtc_config_t mtc_tmp;
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mtc_tmp.mtc_table = NULL;
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mtc_tmp.mtc_table = mtc_cfg->mtc_table;
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mtc_tmp.sdram_id = (fuse_read_odm(4) >> 3) & 0x1F;
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mtc_tmp.init_done = MTC_NEW_MAGIC;
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u32 ep_addr = ianos_loader(false, "bootloader/sys/libsys_minerva.bso", DRAM_LIB, (void *)&mtc_tmp);
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minerva_cfg = (void *)ep_addr;
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return;
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if (mtc_tmp.init_done == MTC_INIT_MAGIC)
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minerva_cfg = (void *)ep_addr;
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// Copy Minerva context to Nyx storage.
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if (minerva_cfg)
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memcpy(mtc_cfg, (void *)&mtc_tmp, sizeof(mtc_config_t));
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}
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if (!minerva_cfg)
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@ -79,7 +88,7 @@ void minerva_change_freq(minerva_freq_t freq)
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return;
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mtc_config_t *mtc_cfg = (mtc_config_t *)&nyx_str->mtc_cfg;
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if (minerva_cfg && (mtc_cfg->rate_from != freq))
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if (mtc_cfg->rate_from != freq)
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{
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mtc_cfg->rate_to = freq;
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mtc_cfg->train_mode = OP_SWITCH;
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@ -20,7 +20,10 @@
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#include "mtc_table.h"
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#include "../utils/types.h"
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#define EMC_PERIODIC_TRAIN_MS 100
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#define MTC_INIT_MAGIC 0x3043544D
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#define MTC_NEW_MAGIC 0x5243544D
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#define EMC_PERIODIC_TRAIN_MS 250
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typedef struct
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{
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@ -35,6 +38,7 @@ typedef struct
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bool emc_2X_clk_src_is_pllmb;
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bool fsp_for_src_freq;
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bool train_ram_patterns;
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bool init_done;
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} mtc_config_t;
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enum train_mode_t
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@ -17,6 +17,7 @@
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#include "util.h"
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#include "../gfx/di.h"
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#include "../mem/minerva.h"
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#include "../power/max77620.h"
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#include "../soc/bpmp.h"
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#include "../soc/i2c.h"
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@ -25,6 +26,8 @@
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#define USE_RTC_TIMER
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extern volatile nyx_storage_t *nyx_str;
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extern void sd_unmount(bool deinit);
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u32 get_tmr_s()
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@ -99,6 +102,8 @@ void reboot_normal()
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sd_unmount(true);
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display_end();
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nyx_str->mtc_cfg.init_done = 0;
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panic(0x21); // Bypass fuse programming in package1.
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}
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@ -109,6 +114,8 @@ void reboot_rcm()
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sd_unmount(true);
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display_end();
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nyx_str->mtc_cfg.init_done = 0;
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PMC(APBDEV_PMC_SCRATCH0) = 2; // Reboot into rcm.
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PMC(APBDEV_PMC_CNTRL) |= PMC_CNTRL_MAIN_RST;
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@ -121,8 +128,11 @@ void power_off()
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sd_unmount(true);
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display_end();
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// Stop the alarm, in case we injected and powered off too fast.
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max77620_rtc_stop_alarm();
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i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_ONOFFCNFG1, MAX77620_ONOFFCNFG1_PWR_OFF);
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while (true)
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bpmp_halt();
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}
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@ -41,6 +41,7 @@ typedef struct _nyx_storage_t
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u8 hekate[0x30000];
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u8 rsvd[0x800000];
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mtc_config_t mtc_cfg;
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emc_table_t mtc_table;
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} nyx_storage_t;
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u32 get_tmr_us();
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