2018-03-26 23:04:16 +00:00
|
|
|
/*
|
2018-08-05 11:40:32 +00:00
|
|
|
* Copyright (c) 2018 naehrwert
|
|
|
|
* Copyright (c) 2018 st4rk
|
2020-07-17 21:42:53 +00:00
|
|
|
* Copyright (c) 2018-2020 CTCaer
|
2018-08-05 11:40:32 +00:00
|
|
|
*
|
|
|
|
* This program is free software; you can redistribute it and/or modify it
|
|
|
|
* under the terms and conditions of the GNU General Public License,
|
|
|
|
* version 2, as published by the Free Software Foundation.
|
|
|
|
*
|
|
|
|
* This program is distributed in the hope it will be useful, but WITHOUT
|
|
|
|
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
|
|
|
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
|
|
|
* more details.
|
|
|
|
*
|
|
|
|
* You should have received a copy of the GNU General Public License
|
|
|
|
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
|
|
|
*/
|
2018-03-26 23:04:16 +00:00
|
|
|
|
2018-03-14 23:26:19 +00:00
|
|
|
#ifndef _PMC_H_
|
|
|
|
#define _PMC_H_
|
|
|
|
|
2020-07-17 21:42:53 +00:00
|
|
|
#include <utils/types.h>
|
|
|
|
|
2018-03-14 23:26:19 +00:00
|
|
|
/*! PMC registers. */
|
2018-11-10 12:11:42 +00:00
|
|
|
#define APBDEV_PMC_CNTRL 0x0
|
2020-11-25 23:41:45 +00:00
|
|
|
#define PMC_CNTRL_MAIN_RST BIT(4)
|
2018-09-24 20:22:19 +00:00
|
|
|
#define APBDEV_PMC_SEC_DISABLE 0x4
|
2018-03-14 23:26:19 +00:00
|
|
|
#define APBDEV_PMC_PWRGATE_TOGGLE 0x30
|
|
|
|
#define APBDEV_PMC_PWRGATE_STATUS 0x38
|
|
|
|
#define APBDEV_PMC_NO_IOPOWER 0x44
|
2020-11-25 23:41:45 +00:00
|
|
|
#define PMC_NO_IOPOWER_SDMMC1_IO_EN BIT(12)
|
|
|
|
#define PMC_NO_IOPOWER_AUDIO_HV BIT(18)
|
|
|
|
#define PMC_NO_IOPOWER_GPIO_IO_EN BIT(21)
|
2018-05-01 05:15:48 +00:00
|
|
|
#define APBDEV_PMC_SCRATCH0 0x50
|
2020-11-25 23:41:45 +00:00
|
|
|
#define PMC_SCRATCH0_MODE_WARMBOOT BIT(0)
|
|
|
|
#define PMC_SCRATCH0_MODE_RCM BIT(1)
|
|
|
|
#define PMC_SCRATCH0_MODE_PAYLOAD BIT(29)
|
|
|
|
#define PMC_SCRATCH0_MODE_FASTBOOT BIT(30)
|
|
|
|
#define PMC_SCRATCH0_MODE_RECOVERY BIT(31)
|
2020-08-15 10:12:41 +00:00
|
|
|
#define PMC_SCRATCH0_MODE_CUSTOM_ALL (PMC_SCRATCH0_MODE_RECOVERY | PMC_SCRATCH0_MODE_FASTBOOT | PMC_SCRATCH0_MODE_PAYLOAD)
|
2018-05-01 05:15:48 +00:00
|
|
|
#define APBDEV_PMC_SCRATCH1 0x54
|
2018-03-14 23:26:19 +00:00
|
|
|
#define APBDEV_PMC_SCRATCH20 0xA0
|
2020-12-05 18:39:17 +00:00
|
|
|
#define APBDEV_PMC_SECURE_SCRATCH4 0xC0
|
|
|
|
#define APBDEV_PMC_SECURE_SCRATCH5 0xC4
|
2018-05-01 05:15:48 +00:00
|
|
|
#define APBDEV_PMC_PWR_DET_VAL 0xE4
|
2020-11-25 23:41:45 +00:00
|
|
|
#define PMC_PWR_DET_SDMMC1_IO_EN BIT(12)
|
|
|
|
#define PMC_PWR_DET_AUDIO_HV BIT(18)
|
|
|
|
#define PMC_PWR_DET_GPIO_IO_EN BIT(21)
|
2018-03-14 23:26:19 +00:00
|
|
|
#define APBDEV_PMC_DDR_PWR 0xE8
|
2020-04-30 00:25:22 +00:00
|
|
|
#define APBDEV_PMC_USB_AO 0xF0
|
2018-03-14 23:26:19 +00:00
|
|
|
#define APBDEV_PMC_CRYPTO_OP 0xF4
|
2019-03-07 22:19:04 +00:00
|
|
|
#define PMC_CRYPTO_OP_SE_ENABLE 0
|
|
|
|
#define PMC_CRYPTO_OP_SE_DISABLE 1
|
2019-02-23 22:59:33 +00:00
|
|
|
#define APBDEV_PMC_SCRATCH33 0x120
|
2020-07-19 17:32:22 +00:00
|
|
|
#define APBDEV_PMC_SCRATCH37 0x130
|
2020-11-25 23:41:45 +00:00
|
|
|
#define PMC_SCRATCH37_KERNEL_PANIC_FLAG BIT(24)
|
2019-02-23 22:59:33 +00:00
|
|
|
#define APBDEV_PMC_SCRATCH40 0x13C
|
2018-03-14 23:26:19 +00:00
|
|
|
#define APBDEV_PMC_OSC_EDPD_OVER 0x1A4
|
2019-09-09 13:56:37 +00:00
|
|
|
#define PMC_OSC_EDPD_OVER_OSC_CTRL_OVER 0x400000
|
2020-04-30 00:25:22 +00:00
|
|
|
#define APBDEV_PMC_CLK_OUT_CNTRL 0x1A8
|
2020-11-25 23:41:45 +00:00
|
|
|
#define PMC_CLK_OUT_CNTRL_CLK1_FORCE_EN BIT(2)
|
2018-07-22 12:18:30 +00:00
|
|
|
#define APBDEV_PMC_RST_STATUS 0x1B4
|
2018-03-14 23:26:19 +00:00
|
|
|
#define APBDEV_PMC_IO_DPD_REQ 0x1B8
|
2020-11-25 23:41:45 +00:00
|
|
|
#define PMC_IO_DPD_REQ_DPD_OFF BIT(30)
|
2018-03-14 23:26:19 +00:00
|
|
|
#define APBDEV_PMC_IO_DPD2_REQ 0x1C0
|
|
|
|
#define APBDEV_PMC_VDDP_SEL 0x1CC
|
2018-11-10 12:11:42 +00:00
|
|
|
#define APBDEV_PMC_DDR_CFG 0x1D0
|
2020-12-05 18:39:17 +00:00
|
|
|
#define APBDEV_PMC_SECURE_SCRATCH6 0x224
|
|
|
|
#define APBDEV_PMC_SECURE_SCRATCH7 0x228
|
2019-02-23 22:59:33 +00:00
|
|
|
#define APBDEV_PMC_SCRATCH45 0x234
|
|
|
|
#define APBDEV_PMC_SCRATCH46 0x238
|
2018-07-22 12:18:30 +00:00
|
|
|
#define APBDEV_PMC_SCRATCH49 0x244
|
2018-03-14 23:26:19 +00:00
|
|
|
#define APBDEV_PMC_TSC_MULT 0x2B4
|
2018-09-24 20:22:19 +00:00
|
|
|
#define APBDEV_PMC_SEC_DISABLE2 0x2C4
|
2018-03-14 23:26:19 +00:00
|
|
|
#define APBDEV_PMC_WEAK_BIAS 0x2C8
|
2018-09-24 20:22:19 +00:00
|
|
|
#define APBDEV_PMC_REG_SHORT 0x2CC
|
|
|
|
#define APBDEV_PMC_SEC_DISABLE3 0x2D8
|
2018-03-14 23:26:19 +00:00
|
|
|
#define APBDEV_PMC_SECURE_SCRATCH21 0x334
|
2019-09-09 13:56:37 +00:00
|
|
|
#define PMC_FUSE_PRIVATEKEYDISABLE_TZ_STICKY_BIT 0x10
|
2018-07-09 20:01:40 +00:00
|
|
|
#define APBDEV_PMC_SECURE_SCRATCH32 0x360
|
2018-07-22 12:18:30 +00:00
|
|
|
#define APBDEV_PMC_SECURE_SCRATCH49 0x3A4
|
2018-03-14 23:26:19 +00:00
|
|
|
#define APBDEV_PMC_CNTRL2 0x440
|
2019-09-09 13:56:37 +00:00
|
|
|
#define PMC_CNTRL2_HOLD_CKE_LOW_EN 0x1000
|
2018-11-10 12:11:42 +00:00
|
|
|
#define APBDEV_PMC_IO_DPD3_REQ 0x45C
|
2018-03-14 23:26:19 +00:00
|
|
|
#define APBDEV_PMC_IO_DPD4_REQ 0x464
|
2018-08-05 11:40:32 +00:00
|
|
|
#define APBDEV_PMC_UTMIP_PAD_CFG1 0x4C4
|
|
|
|
#define APBDEV_PMC_UTMIP_PAD_CFG3 0x4CC
|
2018-03-14 23:26:19 +00:00
|
|
|
#define APBDEV_PMC_DDR_CNTRL 0x4E4
|
2018-09-24 20:22:19 +00:00
|
|
|
#define APBDEV_PMC_SEC_DISABLE4 0x5B0
|
|
|
|
#define APBDEV_PMC_SEC_DISABLE5 0x5B4
|
|
|
|
#define APBDEV_PMC_SEC_DISABLE6 0x5B8
|
|
|
|
#define APBDEV_PMC_SEC_DISABLE7 0x5BC
|
|
|
|
#define APBDEV_PMC_SEC_DISABLE8 0x5C0
|
2018-03-14 23:26:19 +00:00
|
|
|
#define APBDEV_PMC_SCRATCH188 0x810
|
|
|
|
#define APBDEV_PMC_SCRATCH190 0x818
|
|
|
|
#define APBDEV_PMC_SCRATCH200 0x840
|
2020-06-26 15:42:31 +00:00
|
|
|
#define APBDEV_PMC_TZRAM_PWR_CNTRL 0xBE8
|
|
|
|
#define APBDEV_PMC_TZRAM_SEC_DISABLE 0xBEC
|
|
|
|
#define APBDEV_PMC_TZRAM_NON_SEC_DISABLE 0xBF0
|
2018-03-14 23:26:19 +00:00
|
|
|
|
2020-07-17 21:42:53 +00:00
|
|
|
int pmc_enable_partition(u32 part, int enable);
|
|
|
|
|
2018-03-14 23:26:19 +00:00
|
|
|
#endif
|