mirror of
https://github.com/CTCaer/hekate
synced 2024-07-03 15:03:29 +00:00
Bug fixes and refactoring
- Info tools - Tools - Tsec - Many more
This commit is contained in:
Kostas Missos
parent
4f5fcf9fbd
commit
04907e2823
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@ -1,6 +1,6 @@
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/*
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* Copyright (c) 2018 naehrwert
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* Copyright (c) 2018 CTCaer
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* Copyright (c) 2018-2019 CTCaer
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* Copyright (c) 2018 balika011
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*
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* This program is free software; you can redistribute it and/or modify it
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@ -88,7 +88,7 @@ void print_fuseinfo()
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gfx_printf(&gfx_con, "%k(Unlocked) fuse cache:\n\n%k", 0xFF00DDFF, 0xFFCCCCCC);
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gfx_hexdump(&gfx_con, 0x7000F900, (u8 *)0x7000F900, 0x2FC);
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gfx_puts(&gfx_con, "Press POWER to dump them to SD Card.\nPress VOL to go to the menu.\n");
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gfx_puts(&gfx_con, "\nPress POWER to dump them to SD Card.\nPress VOL to go to the menu.\n");
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u32 btn = btn_wait();
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if (btn & BTN_POWER)
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@ -352,7 +352,6 @@ void print_tsec_key()
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gfx_con_setpos(&gfx_con, 0, 0);
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u32 retries = 0;
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u32 key_ver_max = 3;
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tsec_ctxt_t tsec_ctxt;
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sdmmc_storage_t storage;
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@ -368,85 +367,70 @@ void print_tsec_key()
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const pkg1_id_t *pkg1_id = pkg1_identify(pkg1);
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if (!pkg1_id)
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{
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EPRINTFARGS("Unknown package1 version for reading\nTSEC firmware (= '%s').",
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(char *)pkg1 + 0x10);
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EPRINTF("Unknown pkg1 version for reading\nTSEC firmware.");
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goto out_wait;
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}
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u8 keys[0x10 * 3];
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u8 keys[0x10 * 2];
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memset(keys, 0x00, 0x20);
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tsec_ctxt.size = 0xF00;
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tsec_ctxt.fw = (u8 *)pkg1 + pkg1_id->tsec_off;
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tsec_ctxt.pkg1 = pkg1;
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tsec_ctxt.pkg11_off = pkg1_id->pkg11_off;
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tsec_ctxt.secmon_base = pkg1_id->secmon_base;
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if (pkg1_id->kb >= KB_FIRMWARE_VERSION_620)
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{
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if (pkg1_id->kb <= KB_FIRMWARE_VERSION_600)
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tsec_ctxt.size = 0xF00;
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else if (pkg1_id->kb == KB_FIRMWARE_VERSION_620)
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tsec_ctxt.size = 0x2900;
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else
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{
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tsec_ctxt.size = 0x3000;
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// Exit after TSEC key generation.
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*((vu16 *)((u32)tsec_ctxt.fw + 0x2DB5)) = 0x02F8;
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}
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if (pkg1_id->kb == KB_FIRMWARE_VERSION_620)
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{
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u8 *tsec_paged = (u8 *)page_alloc(3);
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memcpy(tsec_paged, (void *)tsec_ctxt.fw, tsec_ctxt.size);
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tsec_ctxt.fw = tsec_paged;
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key_ver_max = 1;
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}
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for (u32 i = 1; i <= key_ver_max; i++)
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int res = 0;
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while (tsec_query(keys, pkg1_id->kb, &tsec_ctxt) < 0)
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{
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tsec_ctxt.key_ver = i;
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int res = 0;
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memset(keys, 0x00, 0x20);
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while (tsec_query(keys + ((i - 1) * 0x10), pkg1_id->kb, &tsec_ctxt) < 0)
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retries++;
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if (retries > 3)
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{
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if (pkg1_id->kb <= KB_FIRMWARE_VERSION_600)
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memset(keys + ((i - 1) * 0x10), 0x00, 0x10);
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else
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memset(keys, 0x00, 0x30);
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retries++;
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if (retries > 3)
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{
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res = -1;
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break;
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}
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res = -1;
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break;
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}
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if (pkg1_id->kb <= KB_FIRMWARE_VERSION_600)
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{
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gfx_printf(&gfx_con, "%kTSEC key %d: %k", 0xFF00DDFF, i, 0xFFCCCCCC);
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if (res >= 0)
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{
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for (u32 j = 0; j < 0x10; j++)
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gfx_printf(&gfx_con, "%02X", keys[((i - 1) * 0x10) + j]);
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}
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else
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EPRINTFARGS("ERROR %X", res);
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gfx_putc(&gfx_con, '\n');
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}
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else
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{
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gfx_printf(&gfx_con, "%kTSEC key: %k", 0xFF00DDFF, 0xFFCCCCCC);
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if (res >= 0)
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{
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for (u32 j = 0; j < 0x10; j++)
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gfx_printf(&gfx_con, "%02X", keys[j]);
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gfx_putc(&gfx_con, '\n');
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gfx_printf(&gfx_con, "%kTSEC root: %k", 0xFF00DDFF, 0xFFCCCCCC);
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for (u32 j = 0; j < 0x10; j++)
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gfx_printf(&gfx_con, "%02X", keys[0x10 + j]);
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}
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else
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EPRINTFARGS("ERROR %X", res);
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gfx_putc(&gfx_con, '\n');
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}
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}
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gfx_puts(&gfx_con, "\nPress POWER to dump them to SD Card.\nPress VOL to go to the menu.\n");
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gfx_printf(&gfx_con, "%kTSEC key: %k", 0xFF00DDFF, 0xFFCCCCCC);
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if (res >= 0)
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{
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for (u32 j = 0; j < 0x10; j++)
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gfx_printf(&gfx_con, "%02X", keys[j]);
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if (pkg1_id->kb == KB_FIRMWARE_VERSION_620)
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{
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gfx_printf(&gfx_con, "\n%kTSEC root: %k", 0xFF00DDFF, 0xFFCCCCCC);
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for (u32 j = 0; j < 0x10; j++)
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gfx_printf(&gfx_con, "%02X", keys[0x10 + j]);
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}
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}
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else
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EPRINTFARGS("ERROR %X\n", res);
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gfx_puts(&gfx_con, "\n\nPress POWER to dump them to SD Card.\nPress VOL to go to the menu.\n");
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u32 btn = btn_wait();
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if (btn & BTN_POWER)
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@ -455,7 +439,7 @@ void print_tsec_key()
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{
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char path[64];
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emmcsn_path_impl(path, "/dumps", "tsec_keys.bin", NULL);
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if (!sd_save_to_file(keys, 0x10 * 3, path))
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if (!sd_save_to_file(keys, 0x10 * 2, path))
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gfx_puts(&gfx_con, "\nDone!\n");
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sd_unmount();
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}
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@ -709,4 +693,3 @@ void bootrom_ipatches_info()
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}
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#pragma GCC pop_options
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@ -36,6 +36,7 @@
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#include "../utils/util.h"
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extern hekate_config h_cfg;
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extern gfx_ctxt_t gfx_ctxt;
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extern gfx_con_t gfx_con;
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extern sdmmc_storage_t sd_storage;
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@ -82,15 +83,14 @@ void dump_packages12()
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if (!pkg1_id)
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{
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gfx_con.fntsz = 8;
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EPRINTFARGS("Unknown package1 version for reading\nTSEC firmware (= '%s').", (char *)pkg1 + 0x10);
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EPRINTF("Unknown pkg1 version for reading\nTSEC firmware.");
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goto out_free;
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}
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kb = pkg1_id->kb;
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if (!h_cfg.se_keygen_done || kb >= KB_FIRMWARE_VERSION_620)
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if (!h_cfg.se_keygen_done || kb == KB_FIRMWARE_VERSION_620)
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{
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tsec_ctxt.key_ver = 1;
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tsec_ctxt.fw = (void *)pkg1 + pkg1_id->tsec_off;
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tsec_ctxt.pkg1 = (void *)pkg1;
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tsec_ctxt.pkg11_off = pkg1_id->pkg11_off;
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@ -110,41 +110,45 @@ void dump_packages12()
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if (kb <= KB_FIRMWARE_VERSION_600)
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pkg1_decrypt(pkg1_id, pkg1);
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pkg1_unpack(warmboot, secmon, loader, pkg1_id, pkg1);
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// Display info.
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gfx_printf(&gfx_con, "%kNX Bootloader size: %k0x%05X\n\n", 0xFFC7EA46, 0xFFCCCCCC, hdr->ldr_size);
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gfx_printf(&gfx_con, "%kSecure monitor addr: %k0x%05X\n", 0xFFC7EA46, 0xFFCCCCCC, pkg1_id->secmon_base);
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gfx_printf(&gfx_con, "%kSecure monitor size: %k0x%05X\n\n", 0xFFC7EA46, 0xFFCCCCCC, hdr->sm_size);
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gfx_printf(&gfx_con, "%kWarmboot addr: %k0x%05X\n", 0xFFC7EA46, 0xFFCCCCCC, pkg1_id->warmboot_base);
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gfx_printf(&gfx_con, "%kWarmboot size: %k0x%05X\n\n", 0xFFC7EA46, 0xFFCCCCCC, hdr->wb_size);
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char path[64];
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// Dump package1.1.
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emmcsn_path_impl(path, "/pkg1", "pkg1_decr.bin", &storage);
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if (sd_save_to_file(pkg1, 0x40000, path))
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goto out_free;
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gfx_puts(&gfx_con, "\nFull package1 dumped to pkg1_decr.bin\n");
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// Dump nxbootloader.
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emmcsn_path_impl(path, "/pkg1", "nxloader.bin", &storage);
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if (sd_save_to_file(loader, hdr->ldr_size, path))
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goto out_free;
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gfx_puts(&gfx_con, "NX Bootloader dumped to nxloader.bin\n");
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if (kb <= KB_FIRMWARE_VERSION_620)
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{
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pkg1_unpack(warmboot, secmon, loader, pkg1_id, pkg1);
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// Display info.
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gfx_printf(&gfx_con, "%kNX Bootloader size: %k0x%05X\n\n", 0xFFC7EA46, 0xFFCCCCCC, hdr->ldr_size);
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gfx_printf(&gfx_con, "%kSecure monitor addr: %k0x%05X\n", 0xFFC7EA46, 0xFFCCCCCC, pkg1_id->secmon_base);
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gfx_printf(&gfx_con, "%kSecure monitor size: %k0x%05X\n\n", 0xFFC7EA46, 0xFFCCCCCC, hdr->sm_size);
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gfx_printf(&gfx_con, "%kWarmboot addr: %k0x%05X\n", 0xFFC7EA46, 0xFFCCCCCC, pkg1_id->warmboot_base);
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gfx_printf(&gfx_con, "%kWarmboot size: %k0x%05X\n\n", 0xFFC7EA46, 0xFFCCCCCC, hdr->wb_size);
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// Dump secmon.
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emmcsn_path_impl(path, "/pkg1", "secmon.bin", &storage);
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if (sd_save_to_file(secmon, hdr->sm_size, path))
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goto out_free;
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gfx_puts(&gfx_con, "Secure Monitor dumped to secmon.bin\n");
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// Dump warmboot.
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emmcsn_path_impl(path, "/pkg1", "warmboot.bin", &storage);
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if (sd_save_to_file(warmboot, hdr->wb_size, path))
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goto out_free;
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gfx_puts(&gfx_con, "Warmboot dumped to warmboot.bin\n\n\n");
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// Dump package1.1.
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emmcsn_path_impl(path, "/pkg1", "pkg1_decr.bin", &storage);
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if (sd_save_to_file(pkg1, 0x40000, path))
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goto out_free;
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gfx_puts(&gfx_con, "\npkg1 dumped to pkg1_decr.bin\n");
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// Dump nxbootloader.
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emmcsn_path_impl(path, "/pkg1", "nxloader.bin", &storage);
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if (sd_save_to_file(loader, hdr->ldr_size, path))
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goto out_free;
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gfx_puts(&gfx_con, "NX Bootloader dumped to nxloader.bin\n");
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// Dump secmon.
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emmcsn_path_impl(path, "/pkg1", "secmon.bin", &storage);
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if (sd_save_to_file(secmon, hdr->sm_size, path))
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goto out_free;
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gfx_puts(&gfx_con, "Secure Monitor dumped to secmon.bin\n");
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// Dump warmboot.
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emmcsn_path_impl(path, "/pkg1", "warmboot.bin", &storage);
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if (sd_save_to_file(warmboot, hdr->wb_size, path))
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goto out_free;
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gfx_puts(&gfx_con, "Warmboot dumped to warmboot.bin\n\n\n");
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}
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// Dump package2.1.
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sdmmc_storage_set_mmc_partition(&storage, 0);
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@ -180,7 +184,7 @@ void dump_packages12()
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emmcsn_path_impl(path, "/pkg2", "pkg2_decr.bin", &storage);
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if (sd_save_to_file(pkg2, pkg2_hdr->sec_size[PKG2_SEC_KERNEL] + pkg2_hdr->sec_size[PKG2_SEC_INI1], path))
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goto out;
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gfx_puts(&gfx_con, "\nFull package2 dumped to pkg2_decr.bin\n");
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gfx_puts(&gfx_con, "\npkg2 dumped to pkg2_decr.bin\n");
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// Dump kernel.
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emmcsn_path_impl(path, "/pkg2", "kernel.bin", &storage);
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@ -193,7 +197,7 @@ void dump_packages12()
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if (sd_save_to_file(pkg2_hdr->data + pkg2_hdr->sec_size[PKG2_SEC_KERNEL],
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pkg2_hdr->sec_size[PKG2_SEC_INI1], path))
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goto out;
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gfx_puts(&gfx_con, "INI1 kip1 package dumped to ini1.bin\n");
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gfx_puts(&gfx_con, "INI1 dumped to ini1.bin\n");
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gfx_puts(&gfx_con, "\nDone. Press any key...\n");
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@ -430,7 +434,7 @@ void _fix_sd_attr(u32 type)
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break;
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}
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gfx_printf(&gfx_con, "Traversing all %s files!\nThis may take some time, please wait...\n\n", label);
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gfx_printf(&gfx_con, "Traversing all %s files!\nThis may take some time...\n\n", label);
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_fix_attributes(path, &total, type, type);
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gfx_printf(&gfx_con, "%kTotal archive bits cleared: %d!%k\n\nDone! Press any key...", 0xFF96FF00, total, 0xFFCCCCCC);
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sd_unmount();
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@ -553,10 +557,10 @@ void fix_battery_desync()
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}*/
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/*
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#include "../modules/hekate_libsys_minerva/mtc.h"
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#include "../../modules/hekate_libsys_minerva/mtc.h"
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#include "../ianos/ianos.h"
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#include "../soc/fuse.h"
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mtc_config_t mtc_cfg;
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#include "../soc/clock.h"
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void minerva()
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{
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@ -338,12 +338,8 @@ int launch_payload(char *path, bool update)
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}
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f_close(&fp);
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if (!update)
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{
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free(path);
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path = NULL;
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}
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free(path);
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if (update)
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{
|
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@ -810,7 +806,6 @@ void auto_launch_firmware()
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{
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if (!strcmp("logopath", kv->key))
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bootlogoCustomEntry = kv->val;
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gfx_printf(&gfx_con, "\n%s=%s\n\n", kv->key, kv->val);
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}
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break;
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}
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@ -844,7 +839,6 @@ void auto_launch_firmware()
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{
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if (!strcmp("logopath", kv->key))
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bootlogoCustomEntry = kv->val;
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gfx_printf(&gfx_con, "\n%s=%s\n\n", kv->key, kv->val);
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}
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break;
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}
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|
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|
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@ -1,6 +1,6 @@
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/*
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* Copyright (c) 2018 naehrwert
|
||||
* Copyright (c) 2018 CTCaer
|
||||
* Copyright (c) 2018-2019 CTCaer
|
||||
* Copyright (c) 2018 balika011
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
|
|
@ -97,15 +97,15 @@ int tsec_query(u8 *tsec_keys, u8 kb, tsec_ctxt_t *tsec_ctxt)
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}
|
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|
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//Load firmware or emulate memio environment for newer TSEC fw.
|
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if (kb <= KB_FIRMWARE_VERSION_600)
|
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if (kb == KB_FIRMWARE_VERSION_620)
|
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TSEC(TSEC_DMATRFBASE) = (u32)tsec_ctxt->fw >> 8;
|
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else
|
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{
|
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fwbuf = (u8 *)malloc(0x2000);
|
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u8 *fwbuf_aligned = (u8 *)ALIGN((u32)fwbuf + 0x1000, 0x100);
|
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fwbuf = (u8 *)malloc(0x4000);
|
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u8 *fwbuf_aligned = (u8 *)ALIGN((u32)fwbuf, 0x100);
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memcpy(fwbuf_aligned, tsec_ctxt->fw, tsec_ctxt->size);
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TSEC(TSEC_DMATRFBASE) = (u32)fwbuf_aligned >> 8;
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}
|
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else
|
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TSEC(TSEC_DMATRFBASE) = (u32)tsec_ctxt->fw >> 8;
|
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|
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for (u32 addr = 0; addr < tsec_ctxt->size; addr += 0x100)
|
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{
|
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|
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@ -116,7 +116,7 @@ int tsec_query(u8 *tsec_keys, u8 kb, tsec_ctxt_t *tsec_ctxt)
|
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}
|
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}
|
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|
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if (kb >= KB_FIRMWARE_VERSION_620)
|
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if (kb == KB_FIRMWARE_VERSION_620)
|
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{
|
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// Init SMMU translation for TSEC.
|
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pdir = smmu_init_for_tsec();
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|
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@ -174,45 +174,11 @@ int tsec_query(u8 *tsec_keys, u8 kb, tsec_ctxt_t *tsec_ctxt)
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//Execute firmware.
|
||||
HOST1X(0x3300) = 0x34C2E1DA;
|
||||
TSEC(TSEC_STATUS) = 0;
|
||||
TSEC(TSEC_BOOTKEYVER) = tsec_ctxt->key_ver;
|
||||
TSEC(TSEC_BOOTKEYVER) = 1; // HOS uses key version 1.
|
||||
TSEC(TSEC_BOOTVEC) = 0;
|
||||
TSEC(TSEC_CPUCTL) = TSEC_CPUCTL_STARTCPU;
|
||||
|
||||
if (kb <= KB_FIRMWARE_VERSION_600)
|
||||
{
|
||||
if (!_tsec_dma_wait_idle())
|
||||
{
|
||||
res = -3;
|
||||
goto out_free;
|
||||
}
|
||||
u32 timeout = get_tmr_ms() + 2000;
|
||||
while (!TSEC(TSEC_STATUS))
|
||||
if (get_tmr_ms() > timeout)
|
||||
{
|
||||
res = -4;
|
||||
goto out_free;
|
||||
}
|
||||
if (TSEC(TSEC_STATUS) != 0xB0B0B0B0)
|
||||
{
|
||||
res = -5;
|
||||
goto out_free;
|
||||
}
|
||||
|
||||
//Fetch result.
|
||||
HOST1X(0x3300) = 0;
|
||||
u32 buf[4];
|
||||
buf[0] = SOR1(SOR_NV_PDISP_SOR_DP_HDCP_BKSV_LSB);
|
||||
buf[1] = SOR1(SOR_NV_PDISP_SOR_TMDS_HDCP_BKSV_LSB);
|
||||
buf[2] = SOR1(SOR_NV_PDISP_SOR_TMDS_HDCP_CN_MSB);
|
||||
buf[3] = SOR1(SOR_NV_PDISP_SOR_TMDS_HDCP_CN_LSB);
|
||||
SOR1(SOR_NV_PDISP_SOR_DP_HDCP_BKSV_LSB) = 0;
|
||||
SOR1(SOR_NV_PDISP_SOR_TMDS_HDCP_BKSV_LSB) = 0;
|
||||
SOR1(SOR_NV_PDISP_SOR_TMDS_HDCP_CN_MSB) = 0;
|
||||
SOR1(SOR_NV_PDISP_SOR_TMDS_HDCP_CN_LSB) = 0;
|
||||
|
||||
memcpy(tsec_keys, &buf, 0x10);
|
||||
}
|
||||
else
|
||||
if (kb == KB_FIRMWARE_VERSION_620)
|
||||
{
|
||||
u32 start = get_tmr_us();
|
||||
u32 k = se[SE_KEYTABLE_DATA0_REG_OFFSET / 4];
|
||||
|
|
@ -261,6 +227,40 @@ int tsec_query(u8 *tsec_keys, u8 kb, tsec_ctxt_t *tsec_ctxt)
|
|||
// gfx_printf(&gfx_con, " dir: %s\n", (errst >> 16) & 1 ? "W" : "R");
|
||||
// gfx_printf(&gfx_con, " cid: %02x\n", errst & 0xFF);
|
||||
}
|
||||
else
|
||||
{
|
||||
if (!_tsec_dma_wait_idle())
|
||||
{
|
||||
res = -3;
|
||||
goto out_free;
|
||||
}
|
||||
u32 timeout = get_tmr_ms() + 2000;
|
||||
while (!TSEC(TSEC_STATUS))
|
||||
if (get_tmr_ms() > timeout)
|
||||
{
|
||||
res = -4;
|
||||
goto out_free;
|
||||
}
|
||||
if (TSEC(TSEC_STATUS) != 0xB0B0B0B0)
|
||||
{
|
||||
res = -5;
|
||||
goto out_free;
|
||||
}
|
||||
|
||||
//Fetch result.
|
||||
HOST1X(0x3300) = 0;
|
||||
u32 buf[4];
|
||||
buf[0] = SOR1(SOR_NV_PDISP_SOR_DP_HDCP_BKSV_LSB);
|
||||
buf[1] = SOR1(SOR_NV_PDISP_SOR_TMDS_HDCP_BKSV_LSB);
|
||||
buf[2] = SOR1(SOR_NV_PDISP_SOR_TMDS_HDCP_CN_MSB);
|
||||
buf[3] = SOR1(SOR_NV_PDISP_SOR_TMDS_HDCP_CN_LSB);
|
||||
SOR1(SOR_NV_PDISP_SOR_DP_HDCP_BKSV_LSB) = 0;
|
||||
SOR1(SOR_NV_PDISP_SOR_TMDS_HDCP_BKSV_LSB) = 0;
|
||||
SOR1(SOR_NV_PDISP_SOR_TMDS_HDCP_CN_MSB) = 0;
|
||||
SOR1(SOR_NV_PDISP_SOR_TMDS_HDCP_CN_LSB) = 0;
|
||||
|
||||
memcpy(tsec_keys, &buf, 0x10);
|
||||
}
|
||||
|
||||
out_free:;
|
||||
free(fwbuf);
|
||||
|
|
|
|||
|
|
@ -22,7 +22,6 @@
|
|||
|
||||
typedef struct _tsec_ctxt_t
|
||||
{
|
||||
u32 key_ver;
|
||||
void *fw;
|
||||
u32 size;
|
||||
void *pkg1;
|
||||
|
|
|
|||
|
|
@ -1,6 +1,6 @@
|
|||
/*
|
||||
* Copyright (c) 2018 naehrwert
|
||||
* Copyright (c) 2018 CTCaer
|
||||
* Copyright (c) 2018-2019 CTCaer
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms and conditions of the GNU General Public License,
|
||||
|
|
@ -97,6 +97,9 @@ void _config_pmc_scratch()
|
|||
|
||||
void _mbist_workaround()
|
||||
{
|
||||
CLOCK(CLK_RST_CONTROLLER_CLK_OUT_ENB_V) |= (1 << 10); // Enable AHUB clock.
|
||||
CLOCK(CLK_RST_CONTROLLER_CLK_OUT_ENB_Y) |= (1 << 6); // Enable APE clock.
|
||||
|
||||
CLOCK(CLK_RST_CONTROLLER_CLK_SOURCE_SOR1) = (CLOCK(CLK_RST_CONTROLLER_CLK_SOURCE_SOR1) | 0x8000) & 0xFFFFBFFF;
|
||||
CLOCK(CLK_RST_CONTROLLER_PLLD_BASE) |= 0x40800000u;
|
||||
CLOCK(CLK_RST_CONTROLLER_RST_DEV_Y_CLR) = 0x40;
|
||||
|
|
@ -207,21 +210,30 @@ void config_hw()
|
|||
i2c_init(I2C_5);
|
||||
|
||||
i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_CNFGBBC, MAX77620_CNFGBBC_RESISTOR_1K);
|
||||
i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_ONOFFCNFG1, (1 << 6) | (3 << MAX77620_ONOFFCNFG1_MRT_SHIFT)); // PWR delay for forced shutdown off.
|
||||
i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_ONOFFCNFG1,
|
||||
(1 << 6) | (0 << MAX77620_ONOFFCNFG1_MRT_SHIFT)); // PWR delay for forced shutdown off.
|
||||
|
||||
i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_FPS_CFG0, (7 << MAX77620_FPS_TIME_PERIOD_SHIFT));
|
||||
i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_FPS_CFG1, (7 << MAX77620_FPS_TIME_PERIOD_SHIFT) | (1 << MAX77620_FPS_EN_SRC_SHIFT));
|
||||
i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_FPS_CFG2, (7 << MAX77620_FPS_TIME_PERIOD_SHIFT));
|
||||
i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_FPS_CFG0,
|
||||
(7 << MAX77620_FPS_TIME_PERIOD_SHIFT));
|
||||
i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_FPS_CFG1,
|
||||
(7 << MAX77620_FPS_TIME_PERIOD_SHIFT) | (1 << MAX77620_FPS_EN_SRC_SHIFT));
|
||||
i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_FPS_CFG2,
|
||||
(7 << MAX77620_FPS_TIME_PERIOD_SHIFT));
|
||||
max77620_regulator_config_fps(REGULATOR_LDO4);
|
||||
max77620_regulator_config_fps(REGULATOR_LDO8);
|
||||
max77620_regulator_config_fps(REGULATOR_SD0);
|
||||
max77620_regulator_config_fps(REGULATOR_SD1);
|
||||
max77620_regulator_config_fps(REGULATOR_SD3);
|
||||
|
||||
i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_FPS_GPIO3, (4 << MAX77620_FPS_TIME_PERIOD_SHIFT) | (2 << MAX77620_FPS_PD_PERIOD_SHIFT)); // 3.x+
|
||||
i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_FPS_GPIO3,
|
||||
(4 << MAX77620_FPS_TIME_PERIOD_SHIFT) | (2 << MAX77620_FPS_PD_PERIOD_SHIFT)); // 3.x+
|
||||
|
||||
max77620_regulator_set_voltage(REGULATOR_SD0, 1125000);
|
||||
|
||||
// Fix GPU after warmboot for Linux.
|
||||
i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_GPIO5, 2);
|
||||
i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_GPIO6, 2);
|
||||
|
||||
_config_pmc_scratch(); // Missing from 4.x+
|
||||
|
||||
CLOCK(CLK_RST_CONTROLLER_SCLK_BURST_POLICY) = (CLOCK(CLK_RST_CONTROLLER_SCLK_BURST_POLICY) & 0xFFFF8888) | 0x3333;
|
||||
|
|
@ -247,10 +259,6 @@ void reconfig_hw_workaround(bool extra_reconfig, u32 magic)
|
|||
gpio_config(GPIO_PORT_D, GPIO_PIN_1, GPIO_MODE_SPIO);
|
||||
gpio_config(GPIO_PORT_E, GPIO_PIN_6, GPIO_MODE_SPIO);
|
||||
gpio_config(GPIO_PORT_H, GPIO_PIN_6, GPIO_MODE_SPIO);
|
||||
|
||||
// Fix GPU after warmboot for Linux.
|
||||
i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_GPIO5, 2);
|
||||
i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_GPIO6, 2);
|
||||
}
|
||||
|
||||
// Power off display.
|
||||
|
|
|
|||
|
|
@ -32,12 +32,16 @@
|
|||
#define PMC_PWR_DET_SDMMC1_IO_EN (1 << 12)
|
||||
#define APBDEV_PMC_DDR_PWR 0xE8
|
||||
#define APBDEV_PMC_CRYPTO_OP 0xF4
|
||||
#define APBDEV_PMC_SCRATCH33 0x120
|
||||
#define APBDEV_PMC_SCRATCH40 0x13C
|
||||
#define APBDEV_PMC_OSC_EDPD_OVER 0x1A4
|
||||
#define APBDEV_PMC_RST_STATUS 0x1B4
|
||||
#define APBDEV_PMC_IO_DPD_REQ 0x1B8
|
||||
#define APBDEV_PMC_IO_DPD2_REQ 0x1C0
|
||||
#define APBDEV_PMC_VDDP_SEL 0x1CC
|
||||
#define APBDEV_PMC_DDR_CFG 0x1D0
|
||||
#define APBDEV_PMC_SCRATCH45 0x234
|
||||
#define APBDEV_PMC_SCRATCH46 0x238
|
||||
#define APBDEV_PMC_SCRATCH49 0x244
|
||||
#define APBDEV_PMC_TSC_MULT 0x2B4
|
||||
#define APBDEV_PMC_SEC_DISABLE2 0x2C4
|
||||
|
|
|
|||
|
|
@ -179,4 +179,8 @@
|
|||
#define I2S_CG_SLCG_ENABLE (1 << 0)
|
||||
#define I2S_CTRL_MASTER_EN (1 << 10)
|
||||
|
||||
/*! Special registers. */
|
||||
#define EMC_SCRATCH0 0x324
|
||||
#define EMC_SEPT_RUN (1 << 31)
|
||||
|
||||
#endif
|
||||
|
|
|
|||
Loading…
Reference in a new issue