Commit graph

30 commits

Author SHA1 Message Date
Michael Scire ff07ba4201 kern: implement revised IPI/SGI semantics 2022-03-23 09:10:50 -07:00
Michael Scire 9d89835ff8 kern: update for new hw maintenance semantics 2022-03-23 09:10:50 -07:00
SciresM 96f95b9f95
Integrate new result macros. (#1780)
* result: try out some experimental shenanigans

* result: sketch out some more shenanigans

* result: see what it looks like to convert kernel to use result conds instead of guards

* make rest of kernel use experimental new macro-ing
2022-02-14 14:45:32 -08:00
Michael Scire 30fac905af ams: deduplicate static initialization logic 2021-12-13 13:07:03 -08:00
Michael Scire 9cc6be4d57 kern: other dmbs in kernel were already dmb ish 2021-10-25 17:38:50 -07:00
Michael Scire 10ed579c38 kernel_ldr: bring initial cache flush in line with Nintendo 2021-10-25 13:38:52 -07:00
Michael Scire 2490bbf4f9 kern: KCacheHelper: better reflect nintendo coremask clearing logic 2021-10-23 17:44:30 -07:00
SciresM 36e4914be8
kern: avoid constexpr init for many objects (avoids unnecessary memory clear) (#1668) 2021-10-23 15:25:20 -07:00
Michael Scire aed9d3f535 util: better match true std::atomic semantics 2021-10-20 11:02:17 -07:00
Michael Scire d74f364107 kern/util: use custom atomics wrapper to substantially improve codegen 2021-10-19 15:24:15 -07:00
Michael Scire 77fe5cf6f5 ams: the copyright^H^H^H^H^H^H^Hmplex plane is the algebraic closure of the reals 2021-10-04 12:59:10 -07:00
Michael Scire 14d458522d kern: update initial cache management to match latest kernel 2021-07-12 18:30:01 -07:00
Michael Scire 44ccbc2a7b kern: update set/way cache operations for new semantics 2021-04-11 03:42:16 -07:00
Michael Scire 4aa18b06e8 kern: greatly improve codegen for atomics, scheduler 2021-01-08 02:13:43 -08:00
Michael Scire 968f50bc07 kern: refactor to use m_ for member variables 2020-12-18 13:31:01 -08:00
Michael Scire 3ec9a9e59f kern: rename CacheHelper operation for accuracy 2020-08-18 15:17:40 -07:00
Michael Scire b5f2698bf0 kern: fix multicore instruction cache invalidation 2020-08-18 15:17:40 -07:00
Michael Scire 73798cb812 kern: build with -Wextra 2020-08-17 14:20:24 -07:00
Michael Scire 0993ae0685 kern: SvcFlushDataCache, SvcFlushEntireDataCache 2020-07-31 14:50:52 -07:00
Michael Scire 4fca870f2f kern: fix incorrect cache routines, implement SvcSetProcessMemoryPermission 2020-07-31 14:50:52 -07:00
Michael Scire bc1d3ccc91 kern: Update init to reflect 10.0.0 changes 2020-04-18 22:19:09 -07:00
Michael Scire efae01c165 kern: implement KUserPointer (and test with QueryMemory) in advance of svc dev 2020-02-20 09:05:24 -08:00
Michael Scire 92521eed2a kern: implement through kip decompression 2020-02-17 02:49:21 -08:00
Michael Scire 30d6b359f9 kern: implement smmu init 2020-02-15 00:00:35 -08:00
Michael Scire 20b5268e90 kern: kern::arm64 -> kern::arch::arm64 2020-02-14 18:22:55 -08:00
Michael Scire c91386b0fa kern: implement interrupt thread init 2020-02-14 02:20:33 -08:00
Michael Scire 507ab46709 cpu: optimize core barrier 2020-01-29 04:36:18 -08:00
Michael Scire e7dee2a9fc kern: Implement most of memory init (all cores hit main, but still more to do) 2020-01-28 22:09:47 -08:00
Michael Scire 6ecf04c3b7 find -exec sed -i'' -e 's/2018-2019 Atmo/2018-2020 Atmo/g' {} + 2020-01-24 02:10:40 -08:00
Michael Scire 8efdd04fcd kernel_ldr: finish implementing all core logic. 2019-12-31 00:46:09 -08:00