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kern: kern::arm64 -> kern::arch::arm64

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This commit is contained in:
Michael Scire 2020-02-14 18:22:55 -08:00
parent 11f70759ce
commit 20b5268e90
47 changed files with 192 additions and 192 deletions
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2
libraries/libmesosphere/include/mesosphere/arch/arm64/init/kern_k_init_page_table.hpp
View file

@ -20,7 +20,7 @@
#include <mesosphere/kern_select_cpu.hpp>
#include <mesosphere/arch/arm64/kern_k_page_table_entry.hpp>
namespace ams::kern::arm64::init {
namespace ams::kern::arch::arm64::init {
class KInitialPageTable {
public:

2
libraries/libmesosphere/include/mesosphere/arch/arm64/kern_cpu.hpp
View file

@ -17,7 +17,7 @@
#include <vapours.hpp>
#include <mesosphere/arch/arm64/kern_cpu_system_registers.hpp>
namespace ams::kern::arm64::cpu {
namespace ams::kern::arch::arm64::cpu {
#if defined(ATMOSPHERE_CPU_ARM_CORTEX_A57) || defined(ATMOSPHERE_CPU_ARM_CORTEX_A53)
constexpr inline size_t InstructionCacheLineSize = 0x40;

2
libraries/libmesosphere/include/mesosphere/arch/arm64/kern_cpu_system_registers.hpp
View file

@ -16,7 +16,7 @@
#pragma once
#include <vapours.hpp>
namespace ams::kern::arm64::cpu {
namespace ams::kern::arch::arm64::cpu {
#define MESOSPHERE_CPU_GET_SYSREG(name) \
({ \

2
libraries/libmesosphere/include/mesosphere/arch/arm64/kern_k_debug.hpp
View file

@ -25,7 +25,7 @@ namespace ams::kern {
}
namespace ams::kern::arm64 {
namespace ams::kern::arch::arm64 {
class KDebug final : public KAutoObjectWithSlabHeapAndContainer<KDebug, KDebugBase> {
MESOSPHERE_AUTOOBJECT_TRAITS(KDebug, KSynchronizationObject);

2
libraries/libmesosphere/include/mesosphere/arch/arm64/kern_k_exception_context.hpp
View file

@ -16,7 +16,7 @@
#pragma once
#include <mesosphere/kern_common.hpp>
namespace ams::kern::arm64 {
namespace ams::kern::arch::arm64 {
struct KExceptionContext {
u64 x[(30 - 0) + 1];

2
libraries/libmesosphere/include/mesosphere/arch/arm64/kern_k_hardware_timer.hpp
View file

@ -17,7 +17,7 @@
#include <mesosphere/kern_select_cpu.hpp>
#include <mesosphere/kern_k_hardware_timer_base.hpp>
namespace ams::kern::arm64 {
namespace ams::kern::arch::arm64 {
namespace impl {

2
libraries/libmesosphere/include/mesosphere/arch/arm64/kern_k_interrupt_controller.hpp
View file

@ -18,7 +18,7 @@
#include <mesosphere/kern_select_cpu.hpp>
#include <mesosphere/kern_k_typed_address.hpp>
namespace ams::kern::arm64 {
namespace ams::kern::arch::arm64 {
struct GicDistributor {
u32 ctlr;

2
libraries/libmesosphere/include/mesosphere/arch/arm64/kern_k_interrupt_manager.hpp
View file

@ -20,7 +20,7 @@
#include <mesosphere/kern_k_interrupt_task.hpp>
#include <mesosphere/kern_select_interrupt_controller.hpp>
namespace ams::kern::arm64 {
namespace ams::kern::arch::arm64 {
class KInterruptManager {
NON_COPYABLE(KInterruptManager);

2
libraries/libmesosphere/include/mesosphere/arch/arm64/kern_k_interrupt_name.hpp
View file

@ -15,7 +15,7 @@
*/
#pragma once
namespace ams::kern::arm64 {
namespace ams::kern::arch::arm64 {
namespace interrupt_name {

2
libraries/libmesosphere/include/mesosphere/arch/arm64/kern_k_page_table.hpp
View file

@ -20,7 +20,7 @@
#include <mesosphere/kern_k_page_group.hpp>
#include <mesosphere/kern_k_page_table_manager.hpp>
namespace ams::kern::arm64 {
namespace ams::kern::arch::arm64 {
class KPageTable : public KPageTableBase {
NON_COPYABLE(KPageTable);

2
libraries/libmesosphere/include/mesosphere/arch/arm64/kern_k_page_table_entry.hpp
View file

@ -18,7 +18,7 @@
#include <mesosphere/kern_select_cpu.hpp>
#include <mesosphere/kern_k_typed_address.hpp>
namespace ams::kern::arm64 {
namespace ams::kern::arch::arm64 {
constexpr size_t L1BlockSize = 1_GB;
constexpr size_t L2BlockSize = 2_MB;

2
libraries/libmesosphere/include/mesosphere/arch/arm64/kern_k_page_table_impl.hpp
View file

@ -20,7 +20,7 @@
#include <mesosphere/kern_k_memory_layout.hpp>
#include <mesosphere/arch/arm64/kern_k_page_table_entry.hpp>
namespace ams::kern::arm64 {
namespace ams::kern::arch::arm64 {
/* TODO: This seems worse than KInitialPageTable. Can we fulfill Nintendo's API using KInitialPageTable? */
/* KInitialPageTable is significantly nicer, but doesn't have KPageTableImpl's traversal semantics. */

2
libraries/libmesosphere/include/mesosphere/arch/arm64/kern_k_process_page_table.hpp
View file

@ -17,7 +17,7 @@
#include <mesosphere/kern_common.hpp>
#include <mesosphere/arch/arm64/kern_k_page_table.hpp>
namespace ams::kern::arm64 {
namespace ams::kern::arch::arm64 {
class KProcessPageTable {

2
libraries/libmesosphere/include/mesosphere/arch/arm64/kern_k_spin_lock.hpp
View file

@ -17,7 +17,7 @@
#include <vapours.hpp>
#include <mesosphere/kern_select_cpu.hpp>
namespace ams::kern::arm64 {
namespace ams::kern::arch::arm64 {
class KNotAlignedSpinLock {
private:

2
libraries/libmesosphere/include/mesosphere/arch/arm64/kern_k_supervisor_page_table.hpp
View file

@ -18,7 +18,7 @@
#include <mesosphere/kern_select_cpu.hpp>
#include <mesosphere/arch/arm64/kern_k_page_table.hpp>
namespace ams::kern::arm64 {
namespace ams::kern::arch::arm64 {
class KSupervisorPageTable {
private:

2
libraries/libmesosphere/include/mesosphere/arch/arm64/kern_k_thread_context.hpp
View file

@ -23,7 +23,7 @@ namespace ams::kern {
}
namespace ams::kern::arm64 {
namespace ams::kern::arch::arm64 {
class KThreadContext {
public:

2
libraries/libmesosphere/include/mesosphere/arch/arm64/kern_userspace_memory_access.hpp
View file

@ -16,7 +16,7 @@
#pragma once
#include <mesosphere/kern_common.hpp>
namespace ams::kern::arm64 {
namespace ams::kern::arch::arm64 {
void UserspaceMemoryAccessFunctionAreaBegin();

6
libraries/libmesosphere/include/mesosphere/init/kern_init_page_table_select.hpp
View file

@ -20,9 +20,9 @@
#include <mesosphere/arch/arm64/init/kern_k_init_page_table.hpp>
namespace ams::kern::init {
using ams::kern::arm64::PageTableEntry;
using ams::kern::arm64::init::KInitialPageTable;
using ams::kern::arm64::init::KInitialPageAllocator;
using ams::kern::arch::arm64::PageTableEntry;
using ams::kern::arch::arm64::init::KInitialPageTable;
using ams::kern::arch::arm64::init::KInitialPageAllocator;
}
#else
#error "Unknown architecture for KInitialPageTable"

2
libraries/libmesosphere/include/mesosphere/kern_k_exception_context.hpp
View file

@ -19,7 +19,7 @@
#include <mesosphere/arch/arm64/kern_k_exception_context.hpp>
namespace ams::kern {
using ams::kern::arm64::KExceptionContext;
using ams::kern::arch::arm64::KExceptionContext;
}
#else
#error "Unknown board for KExceptionContext"

6
libraries/libmesosphere/include/mesosphere/kern_k_spin_lock.hpp
View file

@ -21,9 +21,9 @@
#include <mesosphere/arch/arm64/kern_k_spin_lock.hpp>
namespace ams::kern {
using ams::kern::arm64::KAlignedSpinLock;
using ams::kern::arm64::KNotAlignedSpinLock;
using ams::kern::arm64::KSpinLock;
using ams::kern::arch::arm64::KAlignedSpinLock;
using ams::kern::arch::arm64::KNotAlignedSpinLock;
using ams::kern::arch::arm64::KSpinLock;
}
#else

2
libraries/libmesosphere/include/mesosphere/kern_k_thread_context.hpp
View file

@ -19,7 +19,7 @@
#include <mesosphere/arch/arm64/kern_k_thread_context.hpp>
namespace ams::kern {
using ams::kern::arm64::KThreadContext;
using ams::kern::arch::arm64::KThreadContext;
}
#else
#error "Unknown board for KThreadContext"

4
libraries/libmesosphere/include/mesosphere/kern_kernel.hpp
View file

@ -39,10 +39,10 @@ namespace ams::kern {
#if defined(ATMOSPHERE_ARCH_ARM64)
namespace arm64 {
namespace arch::arm64 {
class KSupervisorPageTable;
}
using ams::kern::arm64::KSupervisorPageTable;
using ams::kern::arch::arm64::KSupervisorPageTable;
#else

2
libraries/libmesosphere/include/mesosphere/kern_select_cpu.hpp
View file

@ -21,7 +21,7 @@
namespace ams::kern::cpu {
using namespace ams::kern::arm64::cpu;
using namespace ams::kern::arch::arm64::cpu;
}

2
libraries/libmesosphere/include/mesosphere/kern_select_debug.hpp
View file

@ -20,7 +20,7 @@
#include <mesosphere/arch/arm64/kern_k_debug.hpp>
namespace ams::kern {
using ams::kern::arm64::KDebug;
using ams::kern::arch::arm64::KDebug;
}
#else

2
libraries/libmesosphere/include/mesosphere/kern_select_hardware_timer.hpp
View file

@ -20,7 +20,7 @@
#include <mesosphere/arch/arm64/kern_k_hardware_timer.hpp>
namespace ams::kern {
using ams::kern::arm64::KHardwareTimer;
using ams::kern::arch::arm64::KHardwareTimer;
}
#else

2
libraries/libmesosphere/include/mesosphere/kern_select_interrupt_controller.hpp
View file

@ -21,7 +21,7 @@
#include <mesosphere/arch/arm64/kern_k_interrupt_controller.hpp>
namespace ams::kern {
using ams::kern::arm64::KInterruptController;
using ams::kern::arch::arm64::KInterruptController;
}
#else

2
libraries/libmesosphere/include/mesosphere/kern_select_interrupt_manager.hpp
View file

@ -21,7 +21,7 @@
#include <mesosphere/arch/arm64/kern_k_interrupt_manager.hpp>
namespace ams::kern {
using ams::kern::arm64::KInterruptManager;
using ams::kern::arch::arm64::KInterruptManager;
}
#else

2
libraries/libmesosphere/include/mesosphere/kern_select_interrupt_name.hpp
View file

@ -20,7 +20,7 @@
#include <mesosphere/arch/arm64/kern_k_interrupt_name.hpp>
namespace ams::kern {
using namespace ams::kern::arm64::interrupt_name;
using namespace ams::kern::arch::arm64::interrupt_name;
}
#else

6
libraries/libmesosphere/include/mesosphere/kern_select_page_table.hpp
View file

@ -22,9 +22,9 @@
#include <mesosphere/arch/arm64/kern_k_supervisor_page_table.hpp>
#include <mesosphere/arch/arm64/kern_k_process_page_table.hpp>
namespace ams::kern {
using ams::kern::arm64::KPageTable;
using ams::kern::arm64::KSupervisorPageTable;
using ams::kern::arm64::KProcessPageTable;
using ams::kern::arch::arm64::KPageTable;
using ams::kern::arch::arm64::KSupervisorPageTable;
using ams::kern::arch::arm64::KProcessPageTable;
}
#else

2
libraries/libmesosphere/include/mesosphere/kern_select_page_table_impl.hpp
View file

@ -20,7 +20,7 @@
#include <mesosphere/arch/arm64/kern_k_page_table_impl.hpp>
namespace ams::kern {
using ams::kern::arm64::KPageTableImpl;
using ams::kern::arch::arm64::KPageTableImpl;
}
#else

2
libraries/libmesosphere/source/arch/arm64/kern_cpu.cpp
View file

@ -15,7 +15,7 @@
*/
#include <mesosphere.hpp>
namespace ams::kern::arm64::cpu {
namespace ams::kern::arch::arm64::cpu {
/* Declare prototype to be implemented in asm. */
void SynchronizeAllCoresImpl(s32 *sync_var, s32 num_cores);

20
libraries/libmesosphere/source/arch/arm64/kern_cpu_asm.s
View file

@ -14,11 +14,11 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/* ams::kern::arm64::cpu::SynchronizeAllCoresImpl(int *sync_var, int num_cores) */
.section .text._ZN3ams4kern5arm643cpu23SynchronizeAllCoresImplEPii, "ax", %progbits
.global _ZN3ams4kern5arm643cpu23SynchronizeAllCoresImplEPii
.type _ZN3ams4kern5arm643cpu23SynchronizeAllCoresImplEPii, %function
_ZN3ams4kern5arm643cpu23SynchronizeAllCoresImplEPii:
/* ams::kern::arch::arm64::cpu::SynchronizeAllCoresImpl(int *sync_var, int num_cores) */
.section .text._ZN3ams4kern4arch5arm643cpu23SynchronizeAllCoresImplEPii, "ax", %progbits
.global _ZN3ams4kern4arch5arm643cpu23SynchronizeAllCoresImplEPii
.type _ZN3ams4kern4arch5arm643cpu23SynchronizeAllCoresImplEPii, %function
_ZN3ams4kern4arch5arm643cpu23SynchronizeAllCoresImplEPii:
/* Loop until the sync var is less than num cores. */
sevl
1:
@ -63,11 +63,11 @@ _ZN3ams4kern5arm643cpu23SynchronizeAllCoresImplEPii:
ret
/* ams::kern::arm64::cpu::ClearPageToZero(void *) */
.section .text._ZN3ams4kern5arm643cpu19ClearPageToZeroImplEPv, "ax", %progbits
.global _ZN3ams4kern5arm643cpu19ClearPageToZeroImplEPv
.type _ZN3ams4kern5arm643cpu19ClearPageToZeroImplEPv, %function
_ZN3ams4kern5arm643cpu19ClearPageToZeroImplEPv:
/* ams::kern::arch::arm64::cpu::ClearPageToZero(void *) */
.section .text._ZN3ams4kern4arch5arm643cpu19ClearPageToZeroImplEPv, "ax", %progbits
.global _ZN3ams4kern4arch5arm643cpu19ClearPageToZeroImplEPv
.type _ZN3ams4kern4arch5arm643cpu19ClearPageToZeroImplEPv, %function
_ZN3ams4kern4arch5arm643cpu19ClearPageToZeroImplEPv:
/* Efficiently clear the page using dc zva. */
dc zva, x0
add x8, x0, #0x040

2
libraries/libmesosphere/source/arch/arm64/kern_exception_handlers.cpp
View file

@ -15,7 +15,7 @@
*/
#include <mesosphere.hpp>
namespace ams::kern::arm64 {
namespace ams::kern::arch::arm64 {
namespace {

2
libraries/libmesosphere/source/arch/arm64/kern_k_hardware_timer.cpp
View file

@ -15,7 +15,7 @@
*/
#include <mesosphere.hpp>
namespace ams::kern::arm64 {
namespace ams::kern::arch::arm64 {
namespace impl {

2
libraries/libmesosphere/source/arch/arm64/kern_k_interrupt_controller.cpp
View file

@ -15,7 +15,7 @@
*/
#include <mesosphere.hpp>
namespace ams::kern::arm64 {
namespace ams::kern::arch::arm64 {
void KInterruptController::SetupInterruptLines(s32 core_id) const {
const size_t ITLines = (core_id == 0) ? 32 * ((this->gicd->typer & 0x1F) + 1) : NumLocalInterrupts;

2
libraries/libmesosphere/source/arch/arm64/kern_k_interrupt_manager.cpp
View file

@ -15,7 +15,7 @@
*/
#include <mesosphere.hpp>
namespace ams::kern::arm64 {
namespace ams::kern::arch::arm64 {
/* Instantiate static members in specific translation unit. */
KSpinLock KInterruptManager::s_lock;

2
libraries/libmesosphere/source/arch/arm64/kern_k_page_table.cpp
View file

@ -15,7 +15,7 @@
*/
#include <mesosphere.hpp>
namespace ams::kern::arm64 {
namespace ams::kern::arch::arm64 {
void KPageTable::Initialize(s32 core_id) {
/* Nothing actually needed here. */

2
libraries/libmesosphere/source/arch/arm64/kern_k_page_table_impl.cpp
View file

@ -15,7 +15,7 @@
*/
#include <mesosphere.hpp>
namespace ams::kern::arm64 {
namespace ams::kern::arch::arm64 {
void KPageTableImpl::InitializeForKernel(void *tb, KVirtualAddress start, KVirtualAddress end) {
this->table = static_cast<L1PageTableEntry *>(tb);

2
libraries/libmesosphere/source/arch/arm64/kern_k_supervisor_page_table.cpp
View file

@ -15,7 +15,7 @@
*/
#include <mesosphere.hpp>
namespace ams::kern::arm64 {
namespace ams::kern::arch::arm64 {
void KSupervisorPageTable::Initialize(s32 core_id) {
/* Get the identity mapping ttbr0. */

6
libraries/libmesosphere/source/arch/arm64/kern_k_thread_context.cpp
View file

@ -15,7 +15,7 @@
*/
#include <mesosphere.hpp>
namespace ams::kern::arm64 {
namespace ams::kern::arch::arm64 {
/* These are implemented elsewhere (asm). */
void UserModeThreadStarter();
@ -96,7 +96,7 @@ namespace ams::kern::arm64 {
/* Determine LR and SP. */
if (is_user) {
/* Usermode thread. */
this->lr = reinterpret_cast<uintptr_t>(::ams::kern::arm64::UserModeThreadStarter);
this->lr = reinterpret_cast<uintptr_t>(::ams::kern::arch::arm64::UserModeThreadStarter);
this->sp = SetupStackForUserModeThreadStarter(u_pc, k_sp, u_sp, arg, is_64_bit);
} else {
/* Kernel thread. */
@ -108,7 +108,7 @@ namespace ams::kern::arm64 {
this->sp = GetInteger(k_sp);
} else {
/* Generic Kernel thread. */
this->lr = reinterpret_cast<uintptr_t>(::ams::kern::arm64::SupervisorModeThreadStarter);
this->lr = reinterpret_cast<uintptr_t>(::ams::kern::arch::arm64::SupervisorModeThreadStarter);
this->sp = SetupStackForSupervisorModeThreadStarter(u_pc, k_sp, arg);
}
}

28
libraries/libmesosphere/source/arch/arm64/svc/kern_svc_handlers_asm.s
View file

@ -14,11 +14,11 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/* ams::kern::arm64::SvcHandler64() */
.section .text._ZN3ams4kern5arm6412SvcHandler64Ev, "ax", %progbits
.global _ZN3ams4kern5arm6412SvcHandler64Ev
.type _ZN3ams4kern5arm6412SvcHandler64Ev, %function
_ZN3ams4kern5arm6412SvcHandler64Ev:
/* ams::kern::arch::arm64::SvcHandler64() */
.section .text._ZN3ams4kern4arch5arm6412SvcHandler64Ev, "ax", %progbits
.global _ZN3ams4kern4arch5arm6412SvcHandler64Ev
.type _ZN3ams4kern4arch5arm6412SvcHandler64Ev, %function
_ZN3ams4kern4arch5arm6412SvcHandler64Ev:
/* Create a KExceptionContext for the exception. */
sub sp, sp, #0x120
@ -126,10 +126,10 @@ _ZN3ams4kern5arm6412SvcHandler64Ev:
stp x26, x27, [sp, #(8 * 26)]
stp x28, x29, [sp, #(8 * 28)]
/* Call ams::kern::arm64::HandleException(ams::kern::arm64::KExceptionContext *) */
/* Call ams::kern::arch::arm64::HandleException(ams::kern::arch::arm64::KExceptionContext *) */
mrs x18, tpidr_el1
mov x0, sp
bl _ZN3ams4kern5arm6415HandleExceptionEPNS1_17KExceptionContextE
bl _ZN3ams4kern4arch5arm6415HandleExceptionEPNS2_17KExceptionContextE
/* Restore registers. */
ldp x30, x8, [sp, #(8 * 30)]
@ -189,11 +189,11 @@ _ZN3ams4kern5arm6412SvcHandler64Ev:
add sp, sp, #0x120
eret
/* ams::kern::arm64::SvcHandler32() */
.section .text._ZN3ams4kern5arm6412SvcHandler32Ev, "ax", %progbits
.global _ZN3ams4kern5arm6412SvcHandler32Ev
.type _ZN3ams4kern5arm6412SvcHandler32Ev, %function
_ZN3ams4kern5arm6412SvcHandler32Ev:
/* ams::kern::arch::arm64::SvcHandler32() */
.section .text._ZN3ams4kern4arch5arm6412SvcHandler32Ev, "ax", %progbits
.global _ZN3ams4kern4arch5arm6412SvcHandler32Ev
.type _ZN3ams4kern4arch5arm6412SvcHandler32Ev, %function
_ZN3ams4kern4arch5arm6412SvcHandler32Ev:
/* Ensure that our registers are 32-bit. */
mov w0, w0
mov w1, w1
@ -299,10 +299,10 @@ _ZN3ams4kern5arm6412SvcHandler32Ev:
stp xzr, xzr, [sp, #(8 * 28)]
stp xzr, xzr, [sp, #(8 * 30)]
/* Call ams::kern::arm64::HandleException(ams::kern::arm64::KExceptionContext *) */
/* Call ams::kern::arch::arm64::HandleException(ams::kern::arch::arm64::KExceptionContext *) */
mrs x18, tpidr_el1
mov x0, sp
bl _ZN3ams4kern5arm6415HandleExceptionEPNS1_17KExceptionContextE
bl _ZN3ams4kern4arch5arm6415HandleExceptionEPNS2_17KExceptionContextE
/* Restore registers. */
ldp x17, x20, [sp, #(8 * 32)]

18
mesosphere/kernel/source/arch/arm64/exception_vectors.s
View file

@ -98,11 +98,11 @@ vector_entry serror_sp0
/* Current EL, SPx */
vector_entry synch_spx
clrex
b _ZN3ams4kern5arm6430EL1SynchronousExceptionHandlerEv
b _ZN3ams4kern4arch5arm6430EL1SynchronousExceptionHandlerEv
check_vector_size synch_spx
vector_entry irq_spx
b _ZN3ams4kern5arm6422EL1IrqExceptionHandlerEv
b _ZN3ams4kern4arch5arm6422EL1IrqExceptionHandlerEv
check_vector_size irq_spx
vector_entry fiq_spx
@ -114,18 +114,18 @@ vector_entry fiq_spx
vector_entry serror_spx
clrex
nop
b _ZN3ams4kern5arm6421EL1SystemErrorHandlerEv
b _ZN3ams4kern4arch5arm6421EL1SystemErrorHandlerEv
check_vector_size serror_spx
/* Lower EL, A64 */
vector_entry synch_a64
clrex
b _ZN3ams4kern5arm6430EL0SynchronousExceptionHandlerEv
b _ZN3ams4kern4arch5arm6430EL0SynchronousExceptionHandlerEv
check_vector_size synch_a64
vector_entry irq_a64
clrex
b _ZN3ams4kern5arm6422EL0IrqExceptionHandlerEv
b _ZN3ams4kern4arch5arm6422EL0IrqExceptionHandlerEv
check_vector_size irq_a64
vector_entry fiq_a64
@ -137,18 +137,18 @@ vector_entry fiq_a64
vector_entry serror_a64
clrex
nop
b _ZN3ams4kern5arm6421EL0SystemErrorHandlerEv
b _ZN3ams4kern4arch5arm6421EL0SystemErrorHandlerEv
check_vector_size serror_a64
/* Lower EL, A32 */
vector_entry synch_a32
clrex
b _ZN3ams4kern5arm6430EL0SynchronousExceptionHandlerEv
b _ZN3ams4kern4arch5arm6430EL0SynchronousExceptionHandlerEv
check_vector_size synch_a32
vector_entry irq_a32
clrex
b _ZN3ams4kern5arm6422EL0IrqExceptionHandlerEv
b _ZN3ams4kern4arch5arm6422EL0IrqExceptionHandlerEv
check_vector_size irq_a32
vector_entry fiq_a32
@ -160,5 +160,5 @@ vector_entry fiq_a32
vector_entry serror_a32
clrex
nop
b _ZN3ams4kern5arm6421EL0SystemErrorHandlerEv
b _ZN3ams4kern4arch5arm6421EL0SystemErrorHandlerEv
check_vector_size serror_a32

2
mesosphere/kernel/source/arch/arm64/init/kern_init_core.cpp
View file

@ -90,7 +90,7 @@ namespace ams::kern::init {
g_initial_page_allocator.Initialize(initial_page_allocator_state);
/* Ensure that the T1SZ is correct (and what we expect). */
MESOSPHERE_INIT_ABORT_UNLESS((cpu::TranslationControlRegisterAccessor().GetT1Size() / arm64::L1BlockSize) == arm64::MaxPageTableEntries);
MESOSPHERE_INIT_ABORT_UNLESS((cpu::TranslationControlRegisterAccessor().GetT1Size() / arch::arm64::L1BlockSize) == arch::arm64::MaxPageTableEntries);
/* Create page table object for use during initialization. */
KInitialPageTable ttbr1_table(util::AlignDown(cpu::GetTtbr1El1(), PageSize), KInitialPageTable::NoClear{});

54
mesosphere/kernel/source/arch/arm64/init/start.s
View file

@ -215,7 +215,7 @@ _ZN3ams4kern4init16JumpFromEL2ToEL1Ev:
msr elr_el2, x30
/* Flush the entire data cache and invalidate the entire TLB. */
bl _ZN3ams4kern5arm643cpu32FlushEntireDataCacheWithoutStackEv
bl _ZN3ams4kern4arch5arm643cpu32FlushEntireDataCacheWithoutStackEv
/* Setup system registers for deprivileging. */
/* ACTLR_EL2: */
@ -262,7 +262,7 @@ _ZN3ams4kern4init19DisableMmuAndCachesEv:
mov x22, x30
/* Flush the entire data cache and invalidate the entire TLB. */
bl _ZN3ams4kern5arm643cpu32FlushEntireDataCacheWithoutStackEv
bl _ZN3ams4kern4arch5arm643cpu32FlushEntireDataCacheWithoutStackEv
/* Invalidate the instruction cache, and ensure instruction consistency. */
ic ialluis
@ -282,22 +282,22 @@ _ZN3ams4kern4init19DisableMmuAndCachesEv:
mov x30, x22
ret
/* ams::kern::arm64::cpu::FlushEntireDataCacheWithoutStack() */
.section .crt0.text._ZN3ams4kern5arm643cpu32FlushEntireDataCacheWithoutStackEv, "ax", %progbits
.global _ZN3ams4kern5arm643cpu32FlushEntireDataCacheWithoutStackEv
.type _ZN3ams4kern5arm643cpu32FlushEntireDataCacheWithoutStackEv, %function
_ZN3ams4kern5arm643cpu32FlushEntireDataCacheWithoutStackEv:
/* ams::kern::arch::arm64::cpu::FlushEntireDataCacheWithoutStack() */
.section .crt0.text._ZN3ams4kern4arch5arm643cpu32FlushEntireDataCacheWithoutStackEv, "ax", %progbits
.global _ZN3ams4kern4arch5arm643cpu32FlushEntireDataCacheWithoutStackEv
.type _ZN3ams4kern4arch5arm643cpu32FlushEntireDataCacheWithoutStackEv, %function
_ZN3ams4kern4arch5arm643cpu32FlushEntireDataCacheWithoutStackEv:
/* The stack isn't set up, so we'll need to trash a register. */
mov x23, x30
/* Ensure that the cache is coherent. */
bl _ZN3ams4kern5arm643cpu37FlushEntireDataCacheLocalWithoutStackEv
bl _ZN3ams4kern4arch5arm643cpu37FlushEntireDataCacheLocalWithoutStackEv
dsb sy
bl _ZN3ams4kern5arm643cpu38FlushEntireDataCacheSharedWithoutStackEv
bl _ZN3ams4kern4arch5arm643cpu38FlushEntireDataCacheSharedWithoutStackEv
dsb sy
bl _ZN3ams4kern5arm643cpu37FlushEntireDataCacheLocalWithoutStackEv
bl _ZN3ams4kern4arch5arm643cpu37FlushEntireDataCacheLocalWithoutStackEv
dsb sy
/* Invalidate the entire TLB, and ensure instruction consistency. */
@ -308,11 +308,11 @@ _ZN3ams4kern5arm643cpu32FlushEntireDataCacheWithoutStackEv:
mov x30, x23
ret
/* ams::kern::arm64::cpu::FlushEntireDataCacheLocalWithoutStack() */
.section .crt0.text._ZN3ams4kern5arm643cpu37FlushEntireDataCacheLocalWithoutStackEv, "ax", %progbits
.global _ZN3ams4kern5arm643cpu37FlushEntireDataCacheLocalWithoutStackEv
.type _ZN3ams4kern5arm643cpu37FlushEntireDataCacheLocalWithoutStackEv, %function
_ZN3ams4kern5arm643cpu37FlushEntireDataCacheLocalWithoutStackEv:
/* ams::kern::arch::arm64::cpu::FlushEntireDataCacheLocalWithoutStack() */
.section .crt0.text._ZN3ams4kern4arch5arm643cpu37FlushEntireDataCacheLocalWithoutStackEv, "ax", %progbits
.global _ZN3ams4kern4arch5arm643cpu37FlushEntireDataCacheLocalWithoutStackEv
.type _ZN3ams4kern4arch5arm643cpu37FlushEntireDataCacheLocalWithoutStackEv, %function
_ZN3ams4kern4arch5arm643cpu37FlushEntireDataCacheLocalWithoutStackEv:
/* The stack isn't set up, so we'll need to trash a register. */
mov x24, x30
@ -331,7 +331,7 @@ begin_flush_cache_local_loop:
/* FlushEntireDataCacheImplWithoutStack(level); */
mov w0, w9
bl _ZN3ams4kern5arm643cpu36FlushEntireDataCacheImplWithoutStackEv
bl _ZN3ams4kern4arch5arm643cpu36FlushEntireDataCacheImplWithoutStackEv
/* level--; */
sub w9, w9, #1
@ -343,11 +343,11 @@ done_flush_cache_local_loop:
mov x30, x24
ret
/* ams::kern::arm64::cpu::FlushEntireDataCacheSharedWithoutStack() */
.section .crt0.text._ZN3ams4kern5arm643cpu38FlushEntireDataCacheSharedWithoutStackEv, "ax", %progbits
.global _ZN3ams4kern5arm643cpu38FlushEntireDataCacheSharedWithoutStackEv
.type _ZN3ams4kern5arm643cpu38FlushEntireDataCacheSharedWithoutStackEv, %function
_ZN3ams4kern5arm643cpu38FlushEntireDataCacheSharedWithoutStackEv:
/* ams::kern::arch::arm64::cpu::FlushEntireDataCacheSharedWithoutStack() */
.section .crt0.text._ZN3ams4kern4arch5arm643cpu38FlushEntireDataCacheSharedWithoutStackEv, "ax", %progbits
.global _ZN3ams4kern4arch5arm643cpu38FlushEntireDataCacheSharedWithoutStackEv
.type _ZN3ams4kern4arch5arm643cpu38FlushEntireDataCacheSharedWithoutStackEv, %function
_ZN3ams4kern4arch5arm643cpu38FlushEntireDataCacheSharedWithoutStackEv:
/* The stack isn't set up, so we'll need to trash a register. */
mov x24, x30
@ -367,7 +367,7 @@ begin_flush_cache_shared_loop:
/* FlushEntireDataCacheImplWithoutStack(level); */
mov w0, w9
bl _ZN3ams4kern5arm643cpu36FlushEntireDataCacheImplWithoutStackEv
bl _ZN3ams4kern4arch5arm643cpu36FlushEntireDataCacheImplWithoutStackEv
/* level--; */
sub w9, w9, #1
@ -379,11 +379,11 @@ done_flush_cache_shared_loop:
mov x30, x24
ret
/* ams::kern::arm64::cpu::FlushEntireDataCacheImplWithoutStack() */
.section .crt0.text._ZN3ams4kern5arm643cpu36FlushEntireDataCacheImplWithoutStackEv, "ax", %progbits
.global _ZN3ams4kern5arm643cpu36FlushEntireDataCacheImplWithoutStackEv
.type _ZN3ams4kern5arm643cpu36FlushEntireDataCacheImplWithoutStackEv, %function
_ZN3ams4kern5arm643cpu36FlushEntireDataCacheImplWithoutStackEv:
/* ams::kern::arch::arm64::cpu::FlushEntireDataCacheImplWithoutStack() */
.section .crt0.text._ZN3ams4kern4arch5arm643cpu36FlushEntireDataCacheImplWithoutStackEv, "ax", %progbits
.global _ZN3ams4kern4arch5arm643cpu36FlushEntireDataCacheImplWithoutStackEv
.type _ZN3ams4kern4arch5arm643cpu36FlushEntireDataCacheImplWithoutStackEv, %function
_ZN3ams4kern4arch5arm643cpu36FlushEntireDataCacheImplWithoutStackEv:
/* const u64 level_sel_value = static_cast<u64>(level << 1); */
lsl w6, w0, #1
sxtw x6, w6

102
mesosphere/kernel/source/arch/arm64/kern_exception_handlers_asm.s
View file

@ -14,11 +14,11 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/* ams::kern::arm64::EL1IrqExceptionHandler() */
.section .text._ZN3ams4kern5arm6422EL1IrqExceptionHandlerEv, "ax", %progbits
.global _ZN3ams4kern5arm6422EL1IrqExceptionHandlerEv
.type _ZN3ams4kern5arm6422EL1IrqExceptionHandlerEv, %function
_ZN3ams4kern5arm6422EL1IrqExceptionHandlerEv:
/* ams::kern::arch::arm64::EL1IrqExceptionHandler() */
.section .text._ZN3ams4kern4arch5arm6422EL1IrqExceptionHandlerEv, "ax", %progbits
.global _ZN3ams4kern4arch5arm6422EL1IrqExceptionHandlerEv
.type _ZN3ams4kern4arch5arm6422EL1IrqExceptionHandlerEv, %function
_ZN3ams4kern4arch5arm6422EL1IrqExceptionHandlerEv:
/* Save registers that need saving. */
sub sp, sp, #(8 * 24)
@ -43,7 +43,7 @@ _ZN3ams4kern5arm6422EL1IrqExceptionHandlerEv:
/* Invoke KInterruptManager::HandleInterrupt(bool user_mode). */
mrs x18, tpidr_el1
mov x0, #0
bl _ZN3ams4kern5arm6417KInterruptManager15HandleInterruptEb
bl _ZN3ams4kern4arch5arm6417KInterruptManager15HandleInterruptEb
/* Restore registers that we saved. */
msr sp_el0, x19
@ -68,11 +68,11 @@ _ZN3ams4kern5arm6422EL1IrqExceptionHandlerEv:
/* Return from the exception. */
eret
/* ams::kern::arm64::EL0IrqExceptionHandler() */
.section .text._ZN3ams4kern5arm6422EL0IrqExceptionHandlerEv, "ax", %progbits
.global _ZN3ams4kern5arm6422EL0IrqExceptionHandlerEv
.type _ZN3ams4kern5arm6422EL0IrqExceptionHandlerEv, %function
_ZN3ams4kern5arm6422EL0IrqExceptionHandlerEv:
/* ams::kern::arch::arm64::EL0IrqExceptionHandler() */
.section .text._ZN3ams4kern4arch5arm6422EL0IrqExceptionHandlerEv, "ax", %progbits
.global _ZN3ams4kern4arch5arm6422EL0IrqExceptionHandlerEv
.type _ZN3ams4kern4arch5arm6422EL0IrqExceptionHandlerEv, %function
_ZN3ams4kern4arch5arm6422EL0IrqExceptionHandlerEv:
/* Save registers that need saving. */
sub sp, sp, #(8 * 36)
@ -104,7 +104,7 @@ _ZN3ams4kern5arm6422EL0IrqExceptionHandlerEv:
/* Invoke KInterruptManager::HandleInterrupt(bool user_mode). */
mrs x18, tpidr_el1
mov x0, #1
bl _ZN3ams4kern5arm6417KInterruptManager15HandleInterruptEb
bl _ZN3ams4kern4arch5arm6417KInterruptManager15HandleInterruptEb
/* Restore state from the context. */
ldp x30, x20, [sp, #(8 * 30)]
@ -134,11 +134,11 @@ _ZN3ams4kern5arm6422EL0IrqExceptionHandlerEv:
/* Return from the exception. */
eret
/* ams::kern::arm64::EL0SynchronousExceptionHandler() */
.section .text._ZN3ams4kern5arm6430EL0SynchronousExceptionHandlerEv, "ax", %progbits
.global _ZN3ams4kern5arm6430EL0SynchronousExceptionHandlerEv
.type _ZN3ams4kern5arm6430EL0SynchronousExceptionHandlerEv, %function
_ZN3ams4kern5arm6430EL0SynchronousExceptionHandlerEv:
/* ams::kern::arch::arm64::EL0SynchronousExceptionHandler() */
.section .text._ZN3ams4kern4arch5arm6430EL0SynchronousExceptionHandlerEv, "ax", %progbits
.global _ZN3ams4kern4arch5arm6430EL0SynchronousExceptionHandlerEv
.type _ZN3ams4kern4arch5arm6430EL0SynchronousExceptionHandlerEv, %function
_ZN3ams4kern4arch5arm6430EL0SynchronousExceptionHandlerEv:
/* Save x16 and x17, so that we can use them as scratch. */
stp x16, x17, [sp, #-16]!
@ -198,10 +198,10 @@ _ZN3ams4kern5arm6430EL0SynchronousExceptionHandlerEv:
stp x21, x22, [sp, #(8 * 32)]
str x23, [sp, #(8 * 34)]
/* Call ams::kern::arm64::HandleException(ams::kern::arm64::KExceptionContext *) */
/* Call ams::kern::arch::arm64::HandleException(ams::kern::arch::arm64::KExceptionContext *) */
mrs x18, tpidr_el1
mov x0, sp
bl _ZN3ams4kern5arm6415HandleExceptionEPNS1_17KExceptionContextE
bl _ZN3ams4kern4arch5arm6415HandleExceptionEPNS2_17KExceptionContextE
/* Restore state from the context. */
ldp x30, x20, [sp, #(8 * 30)]
@ -233,15 +233,15 @@ _ZN3ams4kern5arm6430EL0SynchronousExceptionHandlerEv:
2: /* SVC from aarch32. */
ldp x16, x17, [sp], 16
b _ZN3ams4kern5arm6412SvcHandler32Ev
b _ZN3ams4kern4arch5arm6412SvcHandler32Ev
3: /* SVC from aarch64. */
ldp x16, x17, [sp], 16
b _ZN3ams4kern5arm6412SvcHandler64Ev
b _ZN3ams4kern4arch5arm6412SvcHandler64Ev
4: /* FPU exception. */
ldp x16, x17, [sp], 16
b _ZN3ams4kern5arm6425FpuAccessExceptionHandlerEv
b _ZN3ams4kern4arch5arm6425FpuAccessExceptionHandlerEv
5: /* Check if there's a TLB conflict that caused the abort. */
and x17, x16, #0x3F
@ -278,11 +278,11 @@ _ZN3ams4kern5arm6430EL0SynchronousExceptionHandlerEv:
eret
/* ams::kern::arm64::EL1SynchronousExceptionHandler() */
.section .text._ZN3ams4kern5arm6430EL1SynchronousExceptionHandlerEv, "ax", %progbits
.global _ZN3ams4kern5arm6430EL1SynchronousExceptionHandlerEv
.type _ZN3ams4kern5arm6430EL1SynchronousExceptionHandlerEv, %function
_ZN3ams4kern5arm6430EL1SynchronousExceptionHandlerEv:
/* ams::kern::arch::arm64::EL1SynchronousExceptionHandler() */
.section .text._ZN3ams4kern4arch5arm6430EL1SynchronousExceptionHandlerEv, "ax", %progbits
.global _ZN3ams4kern4arch5arm6430EL1SynchronousExceptionHandlerEv
.type _ZN3ams4kern4arch5arm6430EL1SynchronousExceptionHandlerEv, %function
_ZN3ams4kern4arch5arm6430EL1SynchronousExceptionHandlerEv:
/* Nintendo uses the "unused" virtual timer compare value as a scratch register. */
msr cntv_cval_el0, x0
@ -324,10 +324,10 @@ _ZN3ams4kern5arm6430EL1SynchronousExceptionHandlerEv:
/* Data abort. Check if it was from trying to access userspace memory. */
mrs x1, elr_el1
adr x0, _ZN3ams4kern5arm6438UserspaceMemoryAccessFunctionAreaBeginEv
adr x0, _ZN3ams4kern4arch5arm6438UserspaceMemoryAccessFunctionAreaBeginEv
cmp x1, x0
b.lo 3f
adr x0, _ZN3ams4kern5arm6436UserspaceMemoryAccessFunctionAreaEndEv
adr x0, _ZN3ams4kern4arch5arm6436UserspaceMemoryAccessFunctionAreaEndEv
cmp x1, x0
b.hs 3f
@ -387,10 +387,10 @@ _ZN3ams4kern5arm6430EL1SynchronousExceptionHandlerEv:
stp x21, x22, [sp, #(8 * 32)]
str x23, [sp, #(8 * 34)]
/* Call ams::kern::arm64::HandleException(ams::kern::arm64::KExceptionContext *) */
/* Call ams::kern::arch::arm64::HandleException(ams::kern::arch::arm64::KExceptionContext *) */
mrs x18, tpidr_el1
mov x0, sp
bl _ZN3ams4kern5arm6415HandleExceptionEPNS1_17KExceptionContextE
bl _ZN3ams4kern4arch5arm6415HandleExceptionEPNS2_17KExceptionContextE
4: /* HandleException should never return. The best we can do is infinite loop. */
b 4b
@ -434,11 +434,11 @@ _ZN3ams4kern5arm6430EL1SynchronousExceptionHandlerEv:
eret
/* ams::kern::arm64::FpuAccessExceptionHandler() */
.section .text._ZN3ams4kern5arm6425FpuAccessExceptionHandlerEv, "ax", %progbits
.global _ZN3ams4kern5arm6425FpuAccessExceptionHandlerEv
.type _ZN3ams4kern5arm6425FpuAccessExceptionHandlerEv, %function
_ZN3ams4kern5arm6425FpuAccessExceptionHandlerEv:
/* ams::kern::arch::arm64::FpuAccessExceptionHandler() */
.section .text._ZN3ams4kern4arch5arm6425FpuAccessExceptionHandlerEv, "ax", %progbits
.global _ZN3ams4kern4arch5arm6425FpuAccessExceptionHandlerEv
.type _ZN3ams4kern4arch5arm6425FpuAccessExceptionHandlerEv, %function
_ZN3ams4kern4arch5arm6425FpuAccessExceptionHandlerEv:
/* Save registers that need saving. */
sub sp, sp, #(8 * 24)
@ -461,7 +461,7 @@ _ZN3ams4kern5arm6425FpuAccessExceptionHandlerEv:
mrs x21, spsr_el1
/* Invoke the FPU context switch handler. */
bl _ZN3ams4kern5arm6423FpuContextSwitchHandlerEv
bl _ZN3ams4kern4arch5arm6423FpuContextSwitchHandlerEv
/* Restore registers that we saved. */
msr sp_el0, x19
@ -486,11 +486,11 @@ _ZN3ams4kern5arm6425FpuAccessExceptionHandlerEv:
/* Return from the exception. */
eret
/* ams::kern::arm64::EL1SystemErrorHandler() */
.section .text._ZN3ams4kern5arm6421EL1SystemErrorHandlerEv, "ax", %progbits
.global _ZN3ams4kern5arm6421EL1SystemErrorHandlerEv
.type _ZN3ams4kern5arm6421EL1SystemErrorHandlerEv, %function
_ZN3ams4kern5arm6421EL1SystemErrorHandlerEv:
/* ams::kern::arch::arm64::EL1SystemErrorHandler() */
.section .text._ZN3ams4kern4arch5arm6421EL1SystemErrorHandlerEv, "ax", %progbits
.global _ZN3ams4kern4arch5arm6421EL1SystemErrorHandlerEv
.type _ZN3ams4kern4arch5arm6421EL1SystemErrorHandlerEv, %function
_ZN3ams4kern4arch5arm6421EL1SystemErrorHandlerEv:
/* Nintendo uses the "unused" virtual timer compare value as a scratch register. */
msr cntv_cval_el0, x0
@ -533,10 +533,10 @@ _ZN3ams4kern5arm6421EL1SystemErrorHandlerEv:
stp x21, x22, [sp, #(8 * 32)]
str x23, [sp, #(8 * 34)]
/* Invoke ams::kern::arm64::HandleException(ams::kern::arm64::KExceptionContext *). */
/* Invoke ams::kern::arch::arm64::HandleException(ams::kern::arch::arm64::KExceptionContext *). */
mrs x18, tpidr_el1
mov x0, sp
bl _ZN3ams4kern5arm6415HandleExceptionEPNS1_17KExceptionContextE
bl _ZN3ams4kern4arch5arm6415HandleExceptionEPNS2_17KExceptionContextE
1: /* HandleException should never return. The best we can do is infinite loop. */
b 1b
@ -544,11 +544,11 @@ _ZN3ams4kern5arm6421EL1SystemErrorHandlerEv:
/* Return from the exception. */
eret
/* ams::kern::arm64::EL0SystemErrorHandler() */
.section .text._ZN3ams4kern5arm6421EL0SystemErrorHandlerEv, "ax", %progbits
.global _ZN3ams4kern5arm6421EL0SystemErrorHandlerEv
.type _ZN3ams4kern5arm6421EL0SystemErrorHandlerEv, %function
_ZN3ams4kern5arm6421EL0SystemErrorHandlerEv:
/* ams::kern::arch::arm64::EL0SystemErrorHandler() */
.section .text._ZN3ams4kern4arch5arm6421EL0SystemErrorHandlerEv, "ax", %progbits
.global _ZN3ams4kern4arch5arm6421EL0SystemErrorHandlerEv
.type _ZN3ams4kern4arch5arm6421EL0SystemErrorHandlerEv, %function
_ZN3ams4kern4arch5arm6421EL0SystemErrorHandlerEv:
/* Create a KExceptionContext to pass to HandleException. */
sub sp, sp, #0x120
stp x0, x1, [sp, #(8 * 0)]
@ -575,10 +575,10 @@ _ZN3ams4kern5arm6421EL0SystemErrorHandlerEv:
stp x21, x22, [sp, #(8 * 32)]
str x23, [sp, #(8 * 34)]
/* Invoke ams::kern::arm64::HandleException(ams::kern::arm64::KExceptionContext *). */
/* Invoke ams::kern::arch::arm64::HandleException(ams::kern::arch::arm64::KExceptionContext *). */
mrs x18, tpidr_el1
mov x0, sp
bl _ZN3ams4kern5arm6415HandleExceptionEPNS1_17KExceptionContextE
bl _ZN3ams4kern4arch5arm6415HandleExceptionEPNS2_17KExceptionContextE
/* Restore state from the context. */
ldp x30, x20, [sp, #(8 * 30)]

44
mesosphere/kernel/source/arch/arm64/kern_k_thread_context_asm.s
View file

@ -14,11 +14,11 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/* ams::kern::arm64::UserModeThreadStarter() */
.section .text._ZN3ams4kern5arm6421UserModeThreadStarterEv, "ax", %progbits
.global _ZN3ams4kern5arm6421UserModeThreadStarterEv
.type _ZN3ams4kern5arm6421UserModeThreadStarterEv, %function
_ZN3ams4kern5arm6421UserModeThreadStarterEv:
/* ams::kern::arch::arm64::UserModeThreadStarter() */
.section .text._ZN3ams4kern4arch5arm6421UserModeThreadStarterEv, "ax", %progbits
.global _ZN3ams4kern4arch5arm6421UserModeThreadStarterEv
.type _ZN3ams4kern4arch5arm6421UserModeThreadStarterEv, %function
_ZN3ams4kern4arch5arm6421UserModeThreadStarterEv:
/* NOTE: Stack layout on entry looks like following: */
/* SP */
/* | */
@ -28,8 +28,8 @@ _ZN3ams4kern5arm6421UserModeThreadStarterEv:
/* Clear the disable count for this thread's stack parameters. */
str wzr, [sp, #(0x120 + 0x18)]
/* Call ams::kern::arm64::OnThreadStart() */
bl _ZN3ams4kern5arm6413OnThreadStartEv
/* Call ams::kern::arch::arm64::OnThreadStart() */
bl _ZN3ams4kern4arch5arm6413OnThreadStartEv
/* Restore thread state from the KExceptionContext on stack */
ldp x30, x19, [sp, #(8 * 30)] /* x30 = lr, x19 = sp */
@ -63,11 +63,11 @@ _ZN3ams4kern5arm6421UserModeThreadStarterEv:
/* Return to EL0 */
eret
/* ams::kern::arm64::SupervisorModeThreadStarter() */
.section .text._ZN3ams4kern5arm6427SupervisorModeThreadStarterEv, "ax", %progbits
.global _ZN3ams4kern5arm6427SupervisorModeThreadStarterEv
.type _ZN3ams4kern5arm6427SupervisorModeThreadStarterEv, %function
_ZN3ams4kern5arm6427SupervisorModeThreadStarterEv:
/* ams::kern::arch::arm64::SupervisorModeThreadStarter() */
.section .text._ZN3ams4kern4arch5arm6427SupervisorModeThreadStarterEv, "ax", %progbits
.global _ZN3ams4kern4arch5arm6427SupervisorModeThreadStarterEv
.type _ZN3ams4kern4arch5arm6427SupervisorModeThreadStarterEv, %function
_ZN3ams4kern4arch5arm6427SupervisorModeThreadStarterEv:
/* NOTE: Stack layout on entry looks like following: */
/* SP */
/* | */
@ -88,11 +88,11 @@ _ZN3ams4kern5arm6427SupervisorModeThreadStarterEv:
eret
/* ams::kern::arm64::KThreadContext::RestoreFpuRegisters64(const KThreadContext &) */
.section .text._ZN3ams4kern5arm6414KThreadContext21RestoreFpuRegisters64ERKS2_, "ax", %progbits
.global _ZN3ams4kern5arm6414KThreadContext21RestoreFpuRegisters64ERKS2_
.type _ZN3ams4kern5arm6414KThreadContext21RestoreFpuRegisters64ERKS2_, %function
_ZN3ams4kern5arm6414KThreadContext21RestoreFpuRegisters64ERKS2_:
/* ams::kern::arch::arm64::KThreadContext::RestoreFpuRegisters64(const KThreadContext &) */
.section .text._ZN3ams4kern4arch5arm6414KThreadContext21RestoreFpuRegisters64ERKS2_, "ax", %progbits
.global _ZN3ams4kern4arch5arm6414KThreadContext21RestoreFpuRegisters64ERKS2_
.type _ZN3ams4kern4arch5arm6414KThreadContext21RestoreFpuRegisters64ERKS2_, %function
_ZN3ams4kern4arch5arm6414KThreadContext21RestoreFpuRegisters64ERKS2_:
/* Load and restore FPCR and FPSR from the context. */
ldr x1, [x0, #0x70]
msr fpcr, x1
@ -119,11 +119,11 @@ _ZN3ams4kern5arm6414KThreadContext21RestoreFpuRegisters64ERKS2_:
ret
/* ams::kern::arm64::KThreadContext::RestoreFpuRegisters32(const KThreadContext &) */
.section .text._ZN3ams4kern5arm6414KThreadContext21RestoreFpuRegisters32ERKS2_, "ax", %progbits
.global _ZN3ams4kern5arm6414KThreadContext21RestoreFpuRegisters32ERKS2_
.type _ZN3ams4kern5arm6414KThreadContext21RestoreFpuRegisters32ERKS2_, %function
_ZN3ams4kern5arm6414KThreadContext21RestoreFpuRegisters32ERKS2_:
/* ams::kern::arch::arm64::KThreadContext::RestoreFpuRegisters32(const KThreadContext &) */
.section .text._ZN3ams4kern4arch5arm6414KThreadContext21RestoreFpuRegisters32ERKS2_, "ax", %progbits
.global _ZN3ams4kern4arch5arm6414KThreadContext21RestoreFpuRegisters32ERKS2_
.type _ZN3ams4kern4arch5arm6414KThreadContext21RestoreFpuRegisters32ERKS2_, %function
_ZN3ams4kern4arch5arm6414KThreadContext21RestoreFpuRegisters32ERKS2_:
/* Load and restore FPCR and FPSR from the context. */
ldr x1, [x0, #0x70]
msr fpcr, x1

20
mesosphere/kernel/source/arch/arm64/kern_userspace_memory_access_asm.s
View file

@ -14,11 +14,11 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/* ams::kern::arm64::UserspaceMemoryAccessFunctionAreaBegin() */
.section .text._ZN3ams4kern5arm6438UserspaceMemoryAccessFunctionAreaBeginEv, "ax", %progbits
.global _ZN3ams4kern5arm6438UserspaceMemoryAccessFunctionAreaBeginEv
.type _ZN3ams4kern5arm6438UserspaceMemoryAccessFunctionAreaBeginEv, %function
_ZN3ams4kern5arm6438UserspaceMemoryAccessFunctionAreaBeginEv:
/* ams::kern::arch::arm64::UserspaceMemoryAccessFunctionAreaBegin() */
.section .text._ZN3ams4kern4arch5arm6438UserspaceMemoryAccessFunctionAreaBeginEv, "ax", %progbits
.global _ZN3ams4kern4arch5arm6438UserspaceMemoryAccessFunctionAreaBeginEv
.type _ZN3ams4kern4arch5arm6438UserspaceMemoryAccessFunctionAreaBeginEv, %function
_ZN3ams4kern4arch5arm6438UserspaceMemoryAccessFunctionAreaBeginEv:
/* NOTE: This is not a real function, and only exists as a label for safety. */
/* ================ All Userspace Memory Functions after this line. ================ */
@ -27,9 +27,9 @@ _ZN3ams4kern5arm6438UserspaceMemoryAccessFunctionAreaBeginEv:
/* ================ All Userspace Memory Functions before this line. ================ */
/* ams::kern::arm64::UserspaceMemoryAccessFunctionAreaEnd() */
.section .text._ZN3ams4kern5arm6436UserspaceMemoryAccessFunctionAreaEndEv, "ax", %progbits
.global _ZN3ams4kern5arm6436UserspaceMemoryAccessFunctionAreaEndEv
.type _ZN3ams4kern5arm6436UserspaceMemoryAccessFunctionAreaEndEv, %function
_ZN3ams4kern5arm6436UserspaceMemoryAccessFunctionAreaEndEv:
/* ams::kern::arch::arm64::UserspaceMemoryAccessFunctionAreaEnd() */
.section .text._ZN3ams4kern4arch5arm6436UserspaceMemoryAccessFunctionAreaEndEv, "ax", %progbits
.global _ZN3ams4kern4arch5arm6436UserspaceMemoryAccessFunctionAreaEndEv
.type _ZN3ams4kern4arch5arm6436UserspaceMemoryAccessFunctionAreaEndEv, %function
_ZN3ams4kern4arch5arm6436UserspaceMemoryAccessFunctionAreaEndEv:
/* NOTE: This is not a real function, and only exists as a label for safety. */