mirror of
https://github.com/Atmosphere-NX/Atmosphere
synced 2024-12-22 12:21:18 +00:00
kern: Update init to reflect 10.0.0 changes
This commit is contained in:
parent
152a945561
commit
bc1d3ccc91
11 changed files with 143 additions and 25 deletions
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@ -394,6 +394,77 @@ namespace ams::kern::arch::arm64::init {
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return l3_entry->GetBlock() + (GetInteger(virt_addr) & (L3BlockSize - 1));
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}
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KPhysicalAddress GetPhysicalAddressOfRandomizedRange(KVirtualAddress virt_addr, size_t size) const {
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/* Define tracking variables for ourselves to use. */
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KPhysicalAddress min_phys_addr = Null<KPhysicalAddress>;
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KPhysicalAddress max_phys_addr = Null<KPhysicalAddress>;
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/* Ensure the range we're querying is valid. */
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const KVirtualAddress end_virt_addr = virt_addr + size;
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if (virt_addr > end_virt_addr) {
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MESOSPHERE_INIT_ABORT_UNLESS(size == 0);
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return min_phys_addr;
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}
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auto UpdateExtents = [&](const KPhysicalAddress block, size_t block_size) ALWAYS_INLINE_LAMBDA {
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/* Ensure that we are allowed to have the block here. */
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MESOSPHERE_INIT_ABORT_UNLESS(util::IsAligned(GetInteger(virt_addr), block_size));
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MESOSPHERE_INIT_ABORT_UNLESS(block_size <= GetInteger(end_virt_addr) - GetInteger(virt_addr));
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MESOSPHERE_INIT_ABORT_UNLESS(util::IsAligned(GetInteger(block), block_size));
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MESOSPHERE_INIT_ABORT_UNLESS(util::IsAligned(size, block_size));
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const KPhysicalAddress block_end = block + block_size;
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/* We want to update min phys addr when it's 0 or > block. */
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/* This is equivalent in two's complement to (n - 1) >= block. */
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if ((GetInteger(min_phys_addr) - 1) >= GetInteger(block)) {
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min_phys_addr = block;
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}
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/* Update max phys addr when it's 0 or < block_end. */
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if (GetInteger(max_phys_addr) < GetInteger(block_end) || GetInteger(max_phys_addr) == 0) {
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max_phys_addr = block_end;
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}
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/* Traverse onwards. */
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virt_addr += block_size;
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};
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while (virt_addr < end_virt_addr) {
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L1PageTableEntry *l1_entry = GetL1Entry(this->l1_table, virt_addr);
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/* If an L1 block is mapped, update. */
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if (l1_entry->IsBlock()) {
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UpdateExtents(l1_entry->GetBlock(), L1BlockSize);
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continue;
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}
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/* Not a block, so we must have a table. */
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MESOSPHERE_INIT_ABORT_UNLESS(l1_entry->IsTable());
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L2PageTableEntry *l2_entry = GetL2Entry(l1_entry, virt_addr);
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if (l2_entry->IsBlock()) {
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UpdateExtents(l2_entry->GetBlock(), l2_entry->IsContiguous() ? L2ContiguousBlockSize : L2BlockSize);
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continue;
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}
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/* Not a block, so we must have a table. */
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MESOSPHERE_INIT_ABORT_UNLESS(l2_entry->IsTable());
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/* We must have a mapped l3 entry to inspect. */
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L3PageTableEntry *l3_entry = GetL3Entry(l2_entry, virt_addr);
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MESOSPHERE_INIT_ABORT_UNLESS(l3_entry->IsBlock());
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UpdateExtents(l3_entry->GetBlock(), l3_entry->IsContiguous() ? L3ContiguousBlockSize : L3BlockSize);
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}
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/* Ensure we got the right range. */
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MESOSPHERE_INIT_ABORT_UNLESS(GetInteger(max_phys_addr) - GetInteger(min_phys_addr) == size);
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/* Write the address that we found. */
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return min_phys_addr;
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}
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bool IsFree(KVirtualAddress virt_addr, size_t size) {
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/* Ensure that addresses and sizes are page aligned. */
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MESOSPHERE_INIT_ABORT_UNLESS(util::IsAligned(GetInteger(virt_addr), PageSize));
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@ -156,6 +156,7 @@ namespace ams::kern::arch::arm64::cpu {
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void ClearPageToZeroImpl(void *);
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void FlushEntireDataCacheSharedForInit();
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void FlushEntireDataCacheLocalForInit();
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void StoreEntireCacheForInit();
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void FlushEntireDataCache();
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@ -26,14 +26,14 @@ namespace ams::kern::arch::arm64 {
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constexpr KNotAlignedSpinLock() : packed_tickets(0) { /* ... */ }
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void Lock() {
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u32 tmp0, tmp1;
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u32 tmp0, tmp1, tmp2;
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__asm__ __volatile__(
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" prfm pstl1keep, %[packed_tickets]\n"
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"1:\n"
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" ldaxr %w[tmp0], %[packed_tickets]\n"
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" add %w[tmp0], %w[tmp0], #0x10000\n"
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" stxr %w[tmp1], %w[tmp0], %[packed_tickets]\n"
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" add %w[tmp2], %w[tmp0], #0x10000\n"
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" stxr %w[tmp1], %w[tmp2], %[packed_tickets]\n"
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" cbnz %w[tmp1], 1b\n"
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" \n"
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" and %w[tmp1], %w[tmp0], #0xFFFF\n"
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@ -46,7 +46,7 @@ namespace ams::kern::arch::arm64 {
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" cmp %w[tmp1], %w[tmp0], lsr #16\n"
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" b.ne 2b\n"
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"3:\n"
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: [tmp0]"=&r"(tmp0), [tmp1]"=&r"(tmp1), [packed_tickets]"+Q"(this->packed_tickets)
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: [tmp0]"=&r"(tmp0), [tmp1]"=&r"(tmp1), [tmp2]"=&r"(tmp2), [packed_tickets]"+Q"(this->packed_tickets)
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:
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: "cc", "memory"
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);
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@ -51,11 +51,11 @@ namespace ams::kern {
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u64 selected = 0;
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u64 cur_num_bits = BITSIZEOF(bitmap) / 2;
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u64 cur_mask = (1ull << cur_num_bits) / 2;
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u64 cur_mask = (1ull << cur_num_bits) - 1;
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while (cur_num_bits) {
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const u64 high = (bitmap >> 0) & cur_mask;
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const u64 low = (bitmap >> cur_num_bits) & cur_mask;
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const u64 low = (bitmap >> 0) & cur_mask;
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const u64 high = (bitmap >> cur_num_bits) & cur_mask;
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bool choose_low;
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if (high == 0) {
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@ -333,6 +333,13 @@ namespace ams::kern::arch::arm64::cpu {
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return PerformCacheOperationBySetWayLocal<true>(FlushDataCacheLineBySetWayImpl);
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}
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void StoreEntireCacheForInit() {
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PerformCacheOperationBySetWayLocal<true>(StoreDataCacheLineBySetWayImpl);
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PerformCacheOperationBySetWayShared<true>(StoreDataCacheLineBySetWayImpl);
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DataSynchronizationBarrierInnerShareable();
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InvalidateEntireInstructionCache();
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}
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void FlushEntireDataCache() {
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return PerformCacheOperationBySetWayShared<false>(FlushDataCacheLineBySetWayImpl);
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}
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@ -324,7 +324,7 @@ namespace ams::kern::board::nintendo::nx {
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EnsureRandomGeneratorInitialized();
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return GenerateRandomU64();
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return GenerateRandomU64FromGenerator();
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}
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void KSystemControl::SleepSystem() {
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@ -2,6 +2,20 @@
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import sys, os
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from struct import pack as pk, unpack as up
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ATMOSPHERE_TARGET_FIRMWARE_100 = 1
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ATMOSPHERE_TARGET_FIRMWARE_200 = 2
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ATMOSPHERE_TARGET_FIRMWARE_300 = 3
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ATMOSPHERE_TARGET_FIRMWARE_400 = 4
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ATMOSPHERE_TARGET_FIRMWARE_500 = 5
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ATMOSPHERE_TARGET_FIRMWARE_600 = 6
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ATMOSPHERE_TARGET_FIRMWARE_620 = 7
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ATMOSPHERE_TARGET_FIRMWARE_700 = 8
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ATMOSPHERE_TARGET_FIRMWARE_800 = 9
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ATMOSPHERE_TARGET_FIRMWARE_810 = 10
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ATMOSPHERE_TARGET_FIRMWARE_900 = 11
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ATMOSPHERE_TARGET_FIRMWARE_910 = 12
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ATMOSPHERE_TARGET_FIRMWARE_1000 = 13
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def align_up(val, algn):
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val += algn - 1
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return val - (val % algn)
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@ -18,7 +32,7 @@ def main(argc, argv):
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kernel_metadata_offset = 4
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assert (kernel_metadata_offset <= len(kernel) - 0x40)
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assert (kernel[kernel_metadata_offset:kernel_metadata_offset + 4] == b'MSS0')
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kernel_end = up('<I', kernel[kernel_metadata_offset + 0x34:kernel_metadata_offset + 0x38])[0]
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kernel_end = up('<I', kernel[kernel_metadata_offset + 0x38:kernel_metadata_offset + 0x3C])[0]
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assert (kernel_end >= len(kernel))
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embedded_ini = b''
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@ -36,8 +50,8 @@ def main(argc, argv):
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with open('mesosphere.bin', 'wb') as f:
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f.write(kernel[:kernel_metadata_offset + 4])
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f.write(pk('<QQ', embedded_ini_offset, kernel_ldr_offset))
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f.write(kernel[kernel_metadata_offset + 0x14:])
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f.write(pk('<QQI', embedded_ini_offset, kernel_ldr_offset, ATMOSPHERE_TARGET_FIRMWARE_1000))
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f.write(kernel[kernel_metadata_offset + 0x18:])
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f.seek(embedded_ini_offset)
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f.write(embedded_ini)
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f.seek(embedded_ini_end)
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@ -34,6 +34,7 @@ namespace ams::kern::init {
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constexpr size_t KernelResourceRegionSize = 0x1728000;
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constexpr size_t ExtraKernelResourceSize = 0x68000;
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static_assert(ExtraKernelResourceSize + KernelResourceRegionSize == 0x1790000);
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constexpr size_t KernelResourceReduction_10_0_0 = 0x10000;
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/* Global Allocator. */
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KInitialPageAllocator g_initial_page_allocator;
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@ -41,6 +42,20 @@ namespace ams::kern::init {
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/* Global initial arguments array. */
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KPhysicalAddress g_init_arguments_phys_addr[cpu::NumCores];
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size_t GetResourceRegionSize() {
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/* Decide if Kernel should have enlarged resource region. */
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const bool use_extra_resources = KSystemControl::Init::ShouldIncreaseThreadResourceLimit();
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size_t resource_region_size = KernelResourceRegionSize + (use_extra_resources ? ExtraKernelResourceSize : 0);
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static_assert(KernelResourceRegionSize > InitialProcessBinarySizeMax);
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static_assert(KernelResourceRegionSize + ExtraKernelResourceSize > InitialProcessBinarySizeMax);
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/* 10.0.0 reduced the kernel resource region size by 64K. */
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if (kern::GetTargetFirmware() >= kern::TargetFirmware_10_0_0) {
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resource_region_size -= KernelResourceReduction_10_0_0;
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}
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return resource_region_size;
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}
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/* Page table attributes. */
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constexpr PageTableEntry KernelRoDataAttribute(PageTableEntry::Permission_KernelR, PageTableEntry::PageAttribute_NormalMemory, PageTableEntry::Shareable_InnerShareable);
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constexpr PageTableEntry KernelRwDataAttribute(PageTableEntry::Permission_KernelRW, PageTableEntry::PageAttribute_NormalMemory, PageTableEntry::Shareable_InnerShareable);
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@ -138,16 +153,15 @@ namespace ams::kern::init {
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MESOSPHERE_INIT_ABORT_UNLESS(KMemoryLayout::GetVirtualMemoryRegionTree().Insert(GetInteger(stack_region_start), StackRegionSize, KMemoryRegionType_KernelStack));
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/* Decide if Kernel should have enlarged resource region (slab region + page table heap region). */
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const bool use_extra_resources = KSystemControl::Init::ShouldIncreaseThreadResourceLimit();
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const size_t resource_region_size = KernelResourceRegionSize + (use_extra_resources ? ExtraKernelResourceSize : 0);
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const size_t resource_region_size = GetResourceRegionSize();
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/* Determine the size of the slab region. */
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const size_t slab_region_size = CalculateTotalSlabHeapSize();
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MESOSPHERE_INIT_ABORT_UNLESS(slab_region_size <= resource_region_size);
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/* Setup the slab region. */
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const KPhysicalAddress code_start_phys_addr = ttbr1_table.GetPhysicalAddress(code_start_virt_addr);
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const KPhysicalAddress code_end_phys_addr = code_start_phys_addr + (code_end_virt_addr - code_start_virt_addr);
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const KPhysicalAddress code_start_phys_addr = ttbr1_table.GetPhysicalAddressOfRandomizedRange(code_start_virt_addr, code_region_size);
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const KPhysicalAddress code_end_phys_addr = code_start_phys_addr + code_region_size;
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const KPhysicalAddress slab_start_phys_addr = code_end_phys_addr;
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const KPhysicalAddress slab_end_phys_addr = slab_start_phys_addr + slab_region_size;
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constexpr size_t SlabRegionAlign = KernelAslrAlignment;
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@ -155,9 +169,6 @@ namespace ams::kern::init {
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const KVirtualAddress slab_region_start = KMemoryLayout::GetVirtualMemoryRegionTree().GetRandomAlignedRegion(slab_region_needed_size, SlabRegionAlign, KMemoryRegionType_Kernel) + (GetInteger(code_end_phys_addr) % SlabRegionAlign);
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MESOSPHERE_INIT_ABORT_UNLESS(KMemoryLayout::GetVirtualMemoryRegionTree().Insert(GetInteger(slab_region_start), slab_region_size, KMemoryRegionType_KernelSlab));
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/* Set the slab region's pair region. */
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KMemoryLayout::GetVirtualMemoryRegionTree().FindFirstRegionByTypeAttr(KMemoryRegionType_KernelSlab)->SetPairAddress(GetInteger(slab_start_phys_addr));
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/* Setup the temp region. */
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constexpr size_t TempRegionSize = 128_MB;
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constexpr size_t TempRegionAlign = KernelAslrAlignment;
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@ -206,15 +217,20 @@ namespace ams::kern::init {
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SetupDramPhysicalMemoryRegions();
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/* Insert a physical region for the kernel code region. */
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MESOSPHERE_INIT_ABORT_UNLESS(KMemoryLayout::GetPhysicalMemoryRegionTree().Insert(GetInteger(code_start_phys_addr), (code_end_virt_addr - code_start_virt_addr), KMemoryRegionType_DramKernelCode));
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KMemoryLayout::GetPhysicalMemoryRegionTree().FindFirstRegionByTypeAttr(KMemoryRegionType_DramKernelCode)->SetPairAddress(code_start_virt_addr);
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MESOSPHERE_INIT_ABORT_UNLESS(KMemoryLayout::GetPhysicalMemoryRegionTree().Insert(GetInteger(code_start_phys_addr), code_region_size, KMemoryRegionType_DramKernelCode));
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/* Insert a physical region for the kernel slab region. */
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MESOSPHERE_INIT_ABORT_UNLESS(KMemoryLayout::GetPhysicalMemoryRegionTree().Insert(GetInteger(slab_start_phys_addr), slab_region_size, KMemoryRegionType_DramKernelSlab));
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KMemoryLayout::GetPhysicalMemoryRegionTree().FindFirstRegionByTypeAttr(KMemoryRegionType_DramKernelSlab)->SetPairAddress(GetInteger(slab_region_start));
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/* Map and clear the slab region. */
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/* Map the slab region. */
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ttbr1_table.Map(slab_region_start, slab_region_size, slab_start_phys_addr, KernelRwDataAttribute, g_initial_page_allocator);
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/* Physically randomize the slab region. */
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/* NOTE: Nintendo does this only on 10.0.0+ */
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ttbr1_table.PhysicallyRandomize(slab_region_start, slab_region_size, false);
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cpu::StoreEntireCacheForInit();
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/* Clear the slab region. */
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std::memset(GetVoidPointer(slab_region_start), 0, slab_region_size);
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/* Determine size available for kernel page table heaps, requiring > 8 MB. */
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@ -65,7 +65,7 @@ __metadata_kernel_layout:
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.type _ZN3ams4kern17GetTargetFirmwareEv, %function
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_ZN3ams4kern17GetTargetFirmwareEv:
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adr x0, __metadata_target_firmware
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ldr x0, [x0]
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ldr w0, [x0]
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ret
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/* ams::kern::init::StartCore0(uintptr_t, uintptr_t) */
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@ -101,6 +101,15 @@ core0_el1:
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add x2, x0, x2
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LOAD_FROM_LABEL(x3, __metadata_kernelldr_offset)
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add x3, x0, x3
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/* If kernelldr is ours, set its target firmware. */
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ldr w4, [x3, #4]
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LOAD_IMMEDIATE_32(w5, 0x30444C4D)
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cmp w4, w5
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b.ne 1f
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LOAD_FROM_LABEL(x4, __metadata_target_firmware)
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str w4, [x3, #8]
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1:
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blr x3
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/* At this point kernelldr has been invoked, and we are relocated at a random virtual address. */
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@ -109,7 +109,7 @@ _main:
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.type _ZN3ams4kern17GetTargetFirmwareEv, %function
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_ZN3ams4kern17GetTargetFirmwareEv:
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adr x0, __metadata_target_firmware
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ldr x0, [x0]
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ldr w0, [x0]
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ret
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.balign 8
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@ -304,7 +304,7 @@ namespace ams::kern::init::loader {
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ttbr1_table.Map(virtual_base_address + ro_offset, ro_end_offset - ro_offset, base_address + ro_offset, KernelRwDataAttribute, g_initial_page_allocator);
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ttbr1_table.Map(virtual_base_address + rw_offset, bss_end_offset - rw_offset, base_address + rw_offset, KernelRwDataAttribute, g_initial_page_allocator);
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/* On 10.0.0+, Physicaly randomize the kernel region. */
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/* On 10.0.0+, Physically randomize the kernel region. */
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if (kern::GetTargetFirmware() >= kern::TargetFirmware_10_0_0) {
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ttbr1_table.PhysicallyRandomize(virtual_base_address + rx_offset, bss_end_offset - rx_offset, true);
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}
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