TuxSH
d80299d9ce
thermosphere: minor changes
2020-02-04 19:12:21 +00:00
TuxSH
0014991378
thermosphere: incl pattern utils
2020-02-04 19:12:21 +00:00
TuxSH
cfdf1e7ec6
thermosphere: unfuck sw breakpoint logic
2020-02-04 19:12:21 +00:00
TuxSH
09bb173757
thermosphere: uninline recursive lock funcs
2020-02-04 19:12:21 +00:00
TuxSH
2d32a812b7
thermosphere: implement reading and writing guest memory
2020-02-04 19:12:21 +00:00
TuxSH
aebdb2a774
thermosphere: we expose a GICv2, not a GICv1
2020-02-04 19:12:21 +00:00
TuxSH
f943b8e94f
thermosphere: use ish instead of sy in most places
2020-02-04 19:12:21 +00:00
TuxSH
cb38236bf0
thermosphere: fix fmt.c "l" handling
2020-02-04 19:12:21 +00:00
TuxSH
7553580b64
thermosphere: major refactor of memory map
...
- use recursive stage 1 page table (thanks @fincs for this idea)
- NULL now unmapped
- no identity mapping
- image + GICv2 now mapped at the same address for every platform
- tempbss mapped just after "real" bss, can now steal unused mem from
the latter
- no hardcoded VAs for other MMIO devices
- tegra: remove timers, use the generic timer instead
2020-02-04 19:12:21 +00:00
TuxSH
5eb2d79996
thermosphere: disable interrupts in debugPauseCores
2020-02-04 19:12:21 +00:00
TuxSH
1c707d9ded
thermosphere: rewrite debug pause & fix single step state machine
2020-02-04 19:12:21 +00:00
TuxSH
2753b6cf8f
thermosphere: trap set/way dcache access
...
note: qemu does not implement the trap
2020-02-04 19:12:21 +00:00
TuxSH
114cdc5aa4
thermosphere: use barriers and caches *properly*. Cache code refactoring
...
- set/way cache ops create losses of coherency, do not broadcast and are only meant to be used on boot, period.
Cache ops by VA are **the only way** to do data cache maintenance.
Fix a bug where the L2 cache was evicted by each core. It shouldn't have.
- Cleaning dcache to PoU and invalidating icache to PoU, by VA is sufficient for self-modifying code
- Since we operate within a single cluster and don't do DMA, we almost always operate within the inner shareability domain
(commit untested on real hw)
2020-02-04 19:12:21 +00:00
TuxSH
fbdd941061
thermosphere: add debug pause logic
2020-02-04 19:12:21 +00:00
TuxSH
3e7e658594
thermosphere: add common asm macros
2020-02-04 19:12:21 +00:00
TuxSH
84a2dc4ad9
thermosphere: add fpu regs save/restore
2020-02-04 19:12:21 +00:00
TuxSH
c085a67150
thermosphere: add cctx->userFrame
2020-02-04 19:12:21 +00:00
TuxSH
674f3d0fc9
thermosphere: fix ptimer time freezing (again)
2020-02-04 19:12:21 +00:00
TuxSH
e5f6440c3f
thermosphere: properly implement guest timer stuff
2020-02-04 19:12:21 +00:00
TuxSH
3b542e749f
thermosphere: add TransportInterface abstraction layer
2020-02-04 19:12:21 +00:00
TuxSH
26bda4f32d
thermosphere: refactor tegra uart code, etc.
2020-02-04 19:12:21 +00:00
TuxSH
a552c254e0
thermosphere: pl011 uart refactor
2020-02-04 19:12:20 +00:00
TuxSH
57548e67fb
thermosphere: fix pl101 uart reg definitions
2020-02-04 19:12:20 +00:00
TuxSH
edb942a032
thermosphere: add proper memory/instruction barriers for breakpoint stuff
2020-02-04 19:12:20 +00:00
TuxSH
0dd5f1f6d4
thermosphere: add hypervisor timer code
2020-02-04 19:12:20 +00:00
TuxSH
4d8a07943c
thermosphere: qemu: get rid of arm tf
...
qemu impls psci anyway
2020-02-04 19:12:20 +00:00
TuxSH
f19c67435a
thermosphere: refactor exception handlers & add stolen time/emulated ptimer logic
2020-02-04 19:12:20 +00:00
TuxSH
2f999497df
thermosphere: rewrite sysreg trapping code, add skeleton code for timer val trap handling; support A32 EL1 once again
2020-02-04 19:12:20 +00:00
TuxSH
a67d682c10
thermosphere: don't trap memory register writes/don't migrate sw breakpoints
...
Makes no sense on a system with ASLR
2020-02-04 19:12:20 +00:00
TuxSH
2219494675
thermosphere: vgic: largely reduce the number of mmio accesses
...
since we have to use 64 bits for VirqState anyway
2020-02-04 19:12:20 +00:00
TuxSH
d560330a9d
thermosphere: make the pending virq list ordering stable
2020-02-04 19:12:20 +00:00
TuxSH
3424e0bf71
thermosphere: fix wrong icfgr shift; fix list handling bug
2020-02-04 19:12:20 +00:00
TuxSH
7d30fce54c
thermosphere: vgic: fix OOB accesses, fix icfgr and itargetsr handling
...
qemu actually allows SPIs to use the N-N model
2020-02-04 19:12:20 +00:00
TuxSH
81a3b4fff5
thermosphere: fix is/ic registers usage; fix offset calculation
2020-02-04 19:12:20 +00:00
TuxSH
d43d1af62a
thermosphere: fix truncation in vgicCleanupPendingList
2020-02-04 19:12:20 +00:00
TuxSH
7573d1ad3e
thermosphere: honor irq config for ppis
2020-02-04 19:12:20 +00:00
TuxSH
5f83df2599
thermosphere: yikes
2020-02-04 19:12:20 +00:00
TuxSH
aeca48503b
thermosphere: use strict volatile bitfields just in case
2020-02-04 19:12:20 +00:00
TuxSH
0fb5f81e8a
thermosphere: vgic: fix critical bug in vgicUpdateState, add more checks
...
Yikes.
2020-02-04 19:12:20 +00:00
TuxSH
b0d258209c
thermosphere: add CFI where needed, add PANIC macro, etc.
2020-02-04 19:12:20 +00:00
TuxSH
c365fff119
thermosphere: vgic: mostly fix vSGI handling, remove unimplementable/unused stuff + bugfixes
...
Still somewhat broken, though
2020-02-04 19:12:20 +00:00
TuxSH
0b532a0dfb
thermosphere: fix guest access to irq 25, etc; we don't need to raise VI manually
...
See Armv8a TRM "Virtual IRQ exception"
2020-02-04 19:12:20 +00:00
TuxSH
1345aef693
thermosphere: add PPI definitions
2020-02-04 19:12:20 +00:00
TuxSH
eda6a8d8d6
vgic: fix multiple bugs
2020-02-04 19:12:20 +00:00
TuxSH
f75f584f2f
thermosphere: fix various vgic bugs; fix register access OOB bug (xzr)
2020-02-04 19:12:20 +00:00
TuxSH
62fe082cd4
thermosphere: vgic: fix enabled state of virqs
2020-02-04 19:12:20 +00:00
TuxSH
6cef320bc1
thermosphere: fix multiple bugs
2020-02-04 19:12:19 +00:00
TuxSH
e7b351ddb8
thermosphere: vgic code draft
2020-02-04 19:12:19 +00:00
TuxSH
9787bca325
thermosphere: also trap GICH (to deny access)
2020-02-04 19:12:19 +00:00
TuxSH
bb1ba5308d
thermosphere: handle stage2 data aborts, trap gicd accesses
2020-02-04 19:12:19 +00:00
