nold/Atmosphere
1
0
Fork 0
mirror of https://github.com/Atmosphere-NX/Atmosphere synced 2025-01-09 05:57:59 +00:00
Code Issues Projects Releases Packages Wiki Activity

thermosphere: add CFI where needed, add PANIC macro, etc.

Browse source
This commit is contained in:
TuxSH 2020-01-02 18:41:52 +00:00
parent c365fff119
commit b0d258209c
7 changed files with 76 additions and 26 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

48
thermosphere/src/arm.s
View file

@ -118,18 +118,26 @@ finished:
ret
.section .text.flush_dcache_all, "ax", %progbits
.type flush_dcache_all, %function
.global flush_dcache_all
.type flush_dcache_all, %function
.func flush_dcache_all
.cfi_startproc
flush_dcache_all:
mov x0, #0
b __asm_dcache_all
.endfunc
.cfi_endproc
.section .text.invalidate_dcache_all, "ax", %progbits
.type invalidate_dcache_all, %function
.global invalidate_dcache_all
.type invalidate_dcache_all, %function
.func invalidate_dcache_all
.cfi_startproc
invalidate_dcache_all:
mov x0, #1
b __asm_dcache_all
.endfunc
.cfi_endproc
/*
* void __asm_flush_dcache_range(start, end) (renamed -> flush_dcache_range)
@ -140,8 +148,10 @@ invalidate_dcache_all:
* x1: end address
*/
.section .text.flush_dcache_range, "ax", %progbits
.type flush_dcache_range, %function
.global flush_dcache_range
.type flush_dcache_range, %function
.func flush_dcache_range
.cfi_startproc
flush_dcache_range:
mrs x3, ctr_el0
lsr x3, x3, #16
@ -158,6 +168,8 @@ flush_dcache_range:
b.lo 1b
dsb sy
ret
.endfunc
.cfi_endproc
/*
* void __asm_invalidate_dcache_range(start, end) (-> invalidate_dcache_range)
@ -168,8 +180,10 @@ flush_dcache_range:
* x1: end address
*/
.section .text.invalidate_dcache_range, "ax", %progbits
.type invalidate_dcache_range, %function
.global invalidate_dcache_range
.type invalidate_dcache_range, %function
.func invalidate_dcache_range
.cfi_startproc
invalidate_dcache_range:
mrs x3, ctr_el0
ubfm x3, x3, #16, #19
@ -185,6 +199,8 @@ invalidate_dcache_range:
b.lo 1b
dsb sy
ret
.endfunc
.cfi_endproc
/*
* void __asm_invalidate_icache_all(void) (-> invalidate_icache_inner_shareable)
@ -192,8 +208,10 @@ invalidate_dcache_range:
* invalidate all icache entries.
*/
.section .text.invalidate_icache_all_inner_shareable, "ax", %progbits
.type invalidate_icache_all_inner_shareable, %function
.global invalidate_icache_all_inner_shareable
.type invalidate_icache_all_inner_shareable, %function
.func invalidate_icache_all_inner_shareable
.cfi_startproc
invalidate_icache_all_inner_shareable:
dsb ish
isb
@ -201,10 +219,14 @@ invalidate_icache_all_inner_shareable:
dsb ish
isb
ret
.endfunc
.cfi_endproc
.section .text.invalidate_icache_all, "ax", %progbits
.type invalidate_icache_all, %function
.global invalidate_icache_all
.type invalidate_icache_all, %function
.func invalidate_icache_all
.cfi_startproc
invalidate_icache_all:
dsb sy
isb
@ -212,10 +234,14 @@ invalidate_icache_all:
dsb sy
isb
ret
.endfunc
.cfi_endproc
.section .text.set_memory_registers_enable_mmu, "ax", %progbits
.type set_memory_registers_enable_mmu, %function
.global set_memory_registers_enable_mmu
.type set_memory_registers_enable_mmu, %function
.func set_memory_registers_enable_mmu
.cfi_startproc
set_memory_registers_enable_mmu:
msr ttbr0_el2, x0
msr tcr_el2, x1
@ -238,10 +264,14 @@ set_memory_registers_enable_mmu:
isb
ret
.endfunc
.cfi_endproc
.section .text.set_memory_registers_enable_stage2, "ax", %progbits
.type set_memory_registers_enable_stage2, %function
.global set_memory_registers_enable_stage2
.type set_memory_registers_enable_stage2, %function
.func set_memory_registers_enable_stage2
.cfi_startproc
set_memory_registers_enable_stage2:
msr vttbr_el2, x0
msr vtcr_el2, x1
@ -262,3 +292,5 @@ set_memory_registers_enable_stage2:
isb
ret
.endfunc
.cfi_endproc

12
thermosphere/src/breakpoints_watchpoints_load.s
View file

@ -17,8 +17,10 @@
// Precondition: x1 <= 16
.section .text.loadBreakpointRegs, "ax", %progbits
.type loadBreakpointRegs, %function
.global loadBreakpointRegs
.type loadBreakpointRegs, %function
.func loadBreakpointRegs
.cfi_startproc
loadBreakpointRegs:
// x1 = number
adr x16, 1f
@ -38,11 +40,15 @@ loadBreakpointRegs:
dsb sy
isb
ret
.endfunc
.cfi_endproc
// Precondition: x1 <= 16
.section .text.loadWatchpointRegs, "ax", %progbits
.type loadWatchpointRegs, %function
.global loadWatchpointRegs
.type loadWatchpointRegs, %function
.func loadWatchpointRegs
.cfi_startproc
loadWatchpointRegs:
// x1 = number
adr x16, 1f
@ -62,3 +68,5 @@ loadWatchpointRegs:
dsb sy
isb
ret
.endfunc
.cfi_endproc

15
thermosphere/src/data_abort.c
View file

@ -15,6 +15,7 @@
*/
#include <string.h>
#include <stdio.h>
#include "data_abort.h"
#include "sysreg.h"
#include "debug_log.h"
@ -25,20 +26,20 @@
void dumpUnhandledDataAbort(DataAbortIss dabtIss, u64 far, const char *msg)
{
DEBUG("Unhandled");
DEBUG(" %s ", msg);
DEBUG("%s at ", dabtIss.wnr ? "write" : "read");
char s1[64], s2[32], s3[64] = "";
(void)s1; (void)s2; (void)s3;
sprintf(s1, "Unhandled %s %s", msg , dabtIss.wnr ? "write" : "read");
if (dabtIss.fnv) {
DEBUG("<unk>");
sprintf(s2, "<unk>");
} else {
DEBUG("%016llx", far);
sprintf(s2, "%016lx", far);
}
if (dabtIss.isv) {
DEBUG(" size %u Rt=%u", BIT(dabtIss.sas), dabtIss.srt);
sprintf(s3, ", size %u Rt=%u", BIT(dabtIss.sas), dabtIss.srt);
}
DEBUG("\n");
DEBUG("%s at %s%s\n", s1, s2, s3);
}
void handleLowerElDataAbortException(ExceptionStackFrame *frame, ExceptionSyndromeRegister esr)

11
thermosphere/src/main.c
View file

@ -25,13 +25,11 @@ static void loadKernelViaSemihosting(void)
DEBUG("Loading kernel via semihosted file I/O... ");
handle = semihosting_file_open("test_kernel.bin", FOPEN_MODE_RB);
if (handle < 0) {
DEBUG("failed to open file (%ld)!\n", handle);
panic();
PANIC("failed to open file (%ld)!\n", handle);
}
if ((ret = semihosting_file_read(handle, &len, buf)) < 0) {
DEBUG("failed to read file (%ld)!\n", ret);
panic();
PANIC("failed to read file (%ld)!\n", ret);
}
DEBUG("OK!\n");
@ -39,7 +37,7 @@ static void loadKernelViaSemihosting(void)
currentCoreCtx->kernelEntrypoint = buf;
}
void main(ExceptionStackFrame *frame)
void thermosphereMain(ExceptionStackFrame *frame)
{
enableTraps();
enableBreakpointsAndWatchpoints();
@ -58,8 +56,7 @@ void main(ExceptionStackFrame *frame)
if (semihosting_connection_supported()) {
loadKernelViaSemihosting();
} else {
DEBUG("Kernel not loaded!\n");
panic();
PANIC("Kernel not loaded!\n");
}
}
}

10
thermosphere/src/spinlock.s
View file

@ -23,8 +23,10 @@
* SPDX-License-Identifier: BSD-3-Clause
*/
.global spinlockLock
.global spinlockLock
.type spinlockLock, %function
.func spinlockLock
.cfi_startproc
spinlockLock:
mov w2, #1
sevl
@ -36,10 +38,16 @@ spinlockLock:
stxr w1, w2, [x0]
cbnz w1, l2
ret
.endfunc
.cfi_endproc
.global spinlockUnlock
.type spinlockUnlock, %function
.func spinlockUnlock
.cfi_startproc
spinlockUnlock:
stlr wzr, [x0]
sev
ret
.endfunc
.cfi_endproc

2
thermosphere/src/start.s
View file

@ -75,7 +75,7 @@ _startCommon:
isb
mov x0, sp
bl main
bl thermosphereMain
dsb sy
isb

4
thermosphere/src/utils.h
View file

@ -38,6 +38,8 @@
#define FOREACH_BIT(tmpmsk, var, word) for (u64 tmpmsk = (word), var = __builtin_ctzll(word); tmpmsk != 0; tmpmsk &= ~BITL(var), var = __builtin_ctzll(tmpmsk))
#define PANIC(...) do { DEBUG(__VA_ARGS__); panic(); } while (false)
static inline void __dsb_sy(void)
{
__asm__ __volatile__ ("dsb sy" ::: "memory");
@ -68,6 +70,8 @@ bool readEl1Memory(void *dst, uintptr_t addr, size_t size);
bool writeEl1Memory(uintptr_t addr, const void *src, size_t size);
static inline void panic(void) {
#ifndef PLATFORM_QEMU
__builtin_trap();
#endif
for (;;);
}