nold/hekate
1
0
Fork 0
mirror of https://github.com/CTCaer/hekate synced 2024-07-01 14:03:29 +00:00
Code Issues Packages Projects Releases Wiki Activity
hekate/modules/hekate_libsys_minerva
History
CTCaer 6a74f6ed04 minerva: make is_pllmb and fsp automatic 
No need to keep these values around.
Software will automatically check the proper registers to get status.
2022-01-16 01:43:16 +02:00
..
Makefile Add proper make prints for modules 2020-07-18 01:36:16 +03:00
mtc.h minerva: name needs_training flags 2022-01-16 01:41:24 +02:00
mtc_mc_emc_regs.h minerva: update to v1.4 2021-05-11 10:23:08 +03:00
mtc_switch_tables.h mtc: Name sdram ids 2020-06-14 17:39:39 +03:00
mtc_table.h mtc: Refactor various types 2021-01-03 14:33:56 +02:00
README.md refactor: Remove all unwanted whitespace 2019-10-18 18:02:06 +03:00
sys_sdrammtc.c minerva: make is_pllmb and fsp automatic 2022-01-16 01:43:16 +02:00
types.h minerva: make is_pllmb and fsp automatic 2022-01-16 01:43:16 +02:00

README.md

Minerva Training Cell

Custom Nvidia Tegra X1 DRAM trainer.

For more, check Here.

Minerva Training Cell (c) 2018 CTCaer.

/* Pain... And suffering. */