CTCaer
ef5790cc2c
bdk: mc: always on ahb arbitration
...
- Removed disables
- SDMMC code now just checks if it has access
2022-01-29 01:29:02 +02:00
CTCaer
8327de8e2e
bdk: replace NYX flag with proper flags
...
- BDK_MINERVA_CFG_FROM_RAM: enables support for getting minerva configuration from nyx storage
- BDK_HW_EXTRA_DEINIT: enables extra deinit in hw_reinit_workaround
- BDK_SDMMC_OC_AND_EXTRA_PRINT: enables eMMC OC support (533 MB/s) and extra error printing
2022-01-20 13:19:48 +02:00
CTCaer
7ae4fd03c2
bdk: minerva: prep for ATF direct boot support
2022-01-20 12:43:24 +02:00
CTCaer
70504c295e
bdk: various functionality independent changes
2022-01-16 01:03:24 +02:00
CTCaer
981c986b3f
bdk: sdram: name the new micron modules
2021-10-19 09:13:14 +03:00
CTCaer
49bcaf3914
bdk: correct some types and warnings
2021-10-15 16:18:06 +03:00
CTCaer
c801ef8dda
bdk: use size defines where applicable
2021-10-01 15:03:18 +03:00
CTCaer
7fb10b0242
sdram: fix building for embedded lp0 config
2021-09-17 23:17:56 +03:00
CTCaer
03d027615c
sdram: update config for t210b01 (unused)
2021-09-17 23:09:33 +03:00
CTCaer
70a06a6cae
sdram: add support for missing new dram ids
...
In preparation of dram chip shortages, add missing new ids that are now confirmed that they will be in mass usage
2021-08-28 16:56:49 +03:00
CTCaer
5044f014bf
mc: move ahb aperture size control inside enable function
2021-08-28 16:51:16 +03:00
CTCaer
d42a94f148
minerva: Scale down RAM OC if stock boot
2021-04-09 19:28:04 +03:00
CTCaer
f4696da0ef
sdram: Update names for Aula
2021-01-04 02:45:32 +02:00
CTCaer
745ac609d2
max7762x: Update everything to use the improved pmic management
2021-01-04 02:41:15 +02:00
CTCaer
df80339060
mc: Simplify clock enable/reset
...
Additionally utilize the redirect flag.
2020-12-27 12:50:20 +02:00
CTCaer
2628044ba8
fuse: Move more parsing into its specific object
2020-12-26 16:34:12 +02:00
CTCaer
cf1f94662c
sdram: Correct some dram names
2020-12-02 22:26:06 +02:00
CTCaer
528ddbe12c
minerva: Disable for T210B01
...
Minerva is currently unsupported for Mariko LPDDR4X.
2020-07-04 21:02:45 +03:00
CTCaer
d0a73bdc72
sc7: Add T210B01 SC7/LP0 (deep sleep) support
...
Note to future self: Almost a month passed and nothing changed, have fun cleaning that in the end...
2020-06-26 19:00:30 +03:00
CTCaer
29dc122dd4
sdram: Add T210B01 support & new LPDDR4X tables
2020-06-26 18:53:12 +03:00
CTCaer
cabaa6cfb8
Utilize BIT macro everywhere
2020-11-26 01:41:45 +02:00
CTCaer
669e42960c
Utilize ARRAY_SIZE macro
2020-11-15 13:56:45 +02:00
CTCaer
93b4514343
minerva: Return failed if module not found inside Nyx
2020-11-15 13:40:13 +02:00
CTCaer
68d57861cd
Add missing guard from some macros
...
Guard them for future usage, as none of these macros had a non-preset variable used with them yet.
2020-11-15 13:39:27 +02:00
CTCaer
485edb4883
emc: Rename Device to Rank
2020-11-15 13:23:37 +02:00
CTCaer
e158d9bc00
clk: Refactor CLK devices bits
2020-07-17 16:50:17 +03:00
CTCaer
6e256d29c7
Utilize hekate's BDK for hekate main and Nyx
2020-06-14 16:45:45 +03:00
CTCaer
185526d134
Introducing Bootloader Development Kit (BDK)
...
BDK will allow developers to use the full collection of drivers,
with limited editing, if any, for making payloads for Nintendo Switch.
Using a single source for everything will also help decoupling
Switch specific code and easily port it to other Tegra X1/X1+ platforms.
And maybe even to lower targets.
Everything is now centrilized into bdk folder.
Every module or project can utilize it by simply including it.
This is just the start and it will continue to improve.
2020-06-14 15:25:21 +03:00
