sdram: fix building for embedded lp0 config

This commit is contained in:
CTCaer 2021-09-17 23:17:56 +03:00
parent bcec028b0f
commit 7fb10b0242

View file

@ -1385,24 +1385,24 @@ static void _sdram_lp0_save_params_t210b01(const void *params)
s(emc_warm_boot_mrw_extra, 31:30, scratch6, 3:2);
s(emc_mrw_lpddr2zcal_warm_boot, 27:26, scratch6, 5:4);
s(emc_warm_boot_mrw_extra, 27:26, scratch6, 7:6);
s(EmcMrw6, 27:0, scratch8, 27:0);
s(EmcMrw6, 31:30, scratch8, 29:28);
s(EmcMrw8, 27:0, scratch9, 27:0);
s(EmcMrw8, 31:30, scratch9, 29:28);
s(EmcMrw9, 27:0, scratch10, 27:0);
s(EmcMrw9, 31:30, scratch10, 29:28);
s(EmcMrw10, 27:0, scratch11, 27:0);
s(EmcMrw10, 31:30, scratch11, 29:28);
s(EmcMrw12, 27:0, scratch12, 27:0);
s(EmcMrw12, 31:30, scratch12, 29:28);
s(EmcMrw13, 27:0, scratch13, 27:0);
s(EmcMrw13, 31:30, scratch13, 29:28);
s(EmcMrw14, 27:0, scratch14, 27:0);
s(EmcMrw14, 31:30, scratch14, 29:28);
s(EmcMrw1, 7:0, scratch15, 7:0);
s(EmcMrw1, 23:16, scratch15, 15:8);
s(EmcMrw1, 27:26, scratch15, 17:16);
s(EmcMrw1, 31:30, scratch15, 19:18);
s(emc_mrw6, 27:0, scratch8, 27:0);
s(emc_mrw6, 31:30, scratch8, 29:28);
s(emc_mrw8, 27:0, scratch9, 27:0);
s(emc_mrw8, 31:30, scratch9, 29:28);
s(emc_mrw9, 27:0, scratch10, 27:0);
s(emc_mrw9, 31:30, scratch10, 29:28);
s(emc_mrw10, 27:0, scratch11, 27:0);
s(emc_mrw10, 31:30, scratch11, 29:28);
s(emc_mrw12, 27:0, scratch12, 27:0);
s(emc_mrw12, 31:30, scratch12, 29:28);
s(emc_mrw13, 27:0, scratch13, 27:0);
s(emc_mrw13, 31:30, scratch13, 29:28);
s(emc_mrw14, 27:0, scratch14, 27:0);
s(emc_mrw14, 31:30, scratch14, 29:28);
s(emc_mrw1, 7:0, scratch15, 7:0);
s(emc_mrw1, 23:16, scratch15, 15:8);
s(emc_mrw1, 27:26, scratch15, 17:16);
s(emc_mrw1, 31:30, scratch15, 19:18);
s(emc_warm_boot_mrw_extra, 7:0, scratch16, 7:0);
s(emc_warm_boot_mrw_extra, 23:16, scratch16, 15:8);
s(emc_warm_boot_mrw_extra, 27:26, scratch16, 17:16);
@ -1518,7 +1518,7 @@ static void _sdram_lp0_save_params_t210b01(const void *params)
s(pllm_kcp, 1:0, scratch3, 23:22);
c32(0, scratch36);
s(PllMSetupControl, 23:0, scratch36, 23:0);
s(pllm_setup_control, 23:0, scratch36, 23:0);
c32(0, scratch4);
s(pllm_stable_time, 9:0, scratch4, 9:0); // s32(pllm_stable_time, scratch4);, s(pllm_stable_time, 31:0, scratch4, 31:10);