Commit graph

632 commits

Author SHA1 Message Date
CTCaer
7e26be6587 lvgl: Optimize color blending
The manual optimization done dramatically increases performance in software color blending.
Isolated gains reach 20-30%.

Color blending calculates 2 +1 color channels instead of the expensive 1+1+1 calculations.

This is as best as it gets without going in asm optimizations.
2019-12-07 20:47:19 +02:00
CTCaer
733da0f4d5 nyx: Remove compiler flags to gain extra perf
- Removing no-inline produces 30-50% performance gains on specific real time sensitive functions used for rendering.
On overall, this will give 5-10% observed performance gains.

- Strict aliasing produces some extra small gains.
2019-12-07 20:35:17 +02:00
Kostas Missos
a357395cc6 nyx: Remove LTO in order to increase performance
Perf gains from removing LTO linker flag amounts to actually more than 5% average in real usage scenarios in Nyx.
(These include overall timings with static waits included. So basically as observed by user.)

Gains observed, on many isolated cases, were between 15-35%.

Additionally, this will make compiling fast again.
2019-12-07 20:26:51 +02:00
Kostas Missos
48c15a8fde nyx: Release the shackles 2019-12-07 20:16:38 +02:00
Kostas Missos
edc2b12f0f chainloader: Only unmount if trying to update
This will speed up boot times for some sd cards up to 500ms when running update.bin is not needed (old or same version).
2019-12-07 02:40:56 +02:00
Kostas Missos
0b45a5a11a bpmp: Reduce freq to 589MHz
3 users had issues with 602MHz.
This will probably bring the SoC binning compatibility to 100%.

Additionally, make it easy to change default boost frequency.

The tiny loss in perf, will be mitigated in Nyx. (It's actually even faster)
2019-12-07 02:01:29 +02:00
Kostas Missos
bc7dec2e61 bpmp: Add forcable maintenance
+ Fix build issues
2019-12-07 01:47:44 +02:00
CTCaer
9811ba53e0 pmic: Enable Low Battery Shutdown for 2.8V
There's an increasing ammount of users that kill their batteries when forgetting their devices into AutoRCM / RCM mode.

This will now force a shutdown the moment the battery reaches 2.8V. Even if device is inside RCM mode.

Notice: We might need to increase the limit.
2019-12-04 22:06:34 +02:00
CTCaer
a16b1af698 pmic: Always ensure that values were written 2019-12-04 22:02:17 +02:00
CTCaer
641a57a4f6 hos/mtc: Add FSP WAR and boost HOS booting times
By implementing FSP WAR we can allow HOS to boot in 1600MHz and be able to switch frequency without hanging.
2019-12-04 21:59:58 +02:00
CTCaer
84328aa676 minerva: Make use of new minerva
- Training and switch is now faster
- Compatibility checks: New Minerva does not allow old binaries. New binaries do not allow old Minerva
- MTC table is now in a safe region
- Periodic training period increased to every 250ms
2019-12-04 21:56:45 +02:00
CTCaer
66c4f30bdf minerva: Update to v1.2 and use only integers
Additionally remove support for DRAM types that Switch platform does not have.

This will reduce periodic training cost to 30us from 6ms.
2019-12-04 21:46:33 +02:00
CTCaer
dd8ec0d28b clock: Always wait 2us before deasserting reset 2019-12-04 21:32:51 +02:00
CTCaer
0b1eebefe1 Small refactor and bugfixes 2019-12-04 21:31:39 +02:00
CTCaer
168de9ddd8 sdmmc: Ensure aligned DMA buffers 2019-12-04 19:42:25 +02:00
CTCaer
c24d943122 tui: Always print an error when Nyx is missing 2019-12-04 19:39:15 +02:00
CTCaer
b61b212218 lvgl heap: Align addresses & sizes to cache line size 2019-12-04 19:04:11 +02:00
CTCaer
ec10b572d1 heap: Quality updates to heap management
- Allow reuse of unused sections that fit exactly to selected allocation size. Decreases fragmentation dramatically.
- Always allocate and align mapped memory to selected alignment. Avoids having fragmented unused maps that are not aligned.
- Use a static alignment based on BPMP and generally average cache line size. Boosts performance when MMU is used.
2019-12-04 19:02:28 +02:00
CTCaer
d1e50c558e sdram: Refactor and fix some bugs in init 2019-12-04 18:53:36 +02:00
CTCaer
9476e0ab45 kip patches: Allow double defined patchset names
This fixes an issue when NOGC patch was defined 2 times when user wants it forced via `kip1patch=nogc` and AutoNOGC was also procced via fuses.
2019-12-04 18:48:00 +02:00
CTCaer
ccf36fd2cb ext kip patches: Disallow empty patches
Allow the patch loop to end via empty source data as per original spec and error out on 0 length if source data is not null.

emuMMC force decompression patch safely avoids that.
2019-12-04 18:44:59 +02:00
CTCaer
9a082c1b18 hos: Improve errors more for HOS launch 2019-12-04 17:46:12 +02:00
CTCaer
2c1da3a97d se: Upgrade SE and allow SHA calc continue
- Allow SHA to calculate sizes > 16MB and refactor sha function
- Name various registers and magic numbers
- Fix various key access bugs

In a later commit this new design will boost verification times significantly and also allow full SHA256 hashes.
2019-12-04 17:18:16 +02:00
CTCaer
29a51124fd Simplify string ops with already compiled-in functions 2019-12-04 15:56:53 +02:00
Kostas Missos
74452074f6 Modernize readme and hekate_ipl_template.ini
Adds more info on how the configs work.
2019-10-31 16:31:16 +02:00
Kostas Missos
598073e50c ext patches: Remove patches_template.ini load
Remove patches_template.ini load.
- It has useless patches, which some times, users confuse them for "bad" patches, even though they aren't.
- No one reads on how it works and it's constantly mishandled when there's no patches.ini (which completely overrides it).
- It was not supposed to be edited.

Also release will not include it anymore.
Template will still exist for demonstrating the syntax of `patches.ini`

This commit also corrects the patches.ini encoding note as ASCII.
2019-10-31 16:26:46 +02:00
CTCaer
58b57a7b14
Merge pull request #300 from shchmue/dev
heap: Prevent node chain collapse on free
2019-10-25 20:31:38 +03:00
shchmue
426c86182d heap: Prevent node chain collapse on free 2019-10-25 11:20:38 -06:00
CTCaer
65fbdfddbf kfuse: Ensure that kfuse is ready 100% for tsec 2019-10-22 18:57:51 +03:00
Kostas Missos
7c42f72b8a refactor: Remove all unwanted whitespace 2019-10-18 18:02:06 +03:00
CTCaer
9104b85143 hos: Improve boot error display 2019-10-09 00:42:13 +03:00
CTCaer
2857fcca52
pmic: Restore forced power off timeout back to 5s 2019-09-23 16:41:37 +03:00
CTCaer
6433dbd1ee
readme: Add info for id key 2019-09-14 22:06:18 +03:00
CTCaer
fe339120e2 Bump hekate to v5.0.2 and Nyx to v0.8.2
Also rip hekate main's menu logo.

(It will be back :P)
2019-09-12 23:55:48 +03:00
CTCaer
6a261e356f hos: Update NOGC for LAFW v3
And also add emuMMC reverse protection by disabling GC when 9.0.0 fuses are burnt and emuMMC is lower than this.

This avoids fatals on boot.
2019-09-12 23:53:46 +03:00
CTCaer
e24bb44adf hos: Add full 9.0.0 support 2019-09-12 23:41:08 +03:00
CTCaer
40afcfd686 hos: Support pkg2 encrypted with newer mkeys 2019-09-12 23:39:47 +03:00
CTCaer
658c3c112f hos: automatically find new kernel ini1 offset 2019-09-12 23:37:00 +03:00
CTCaer
3b16b086f8 pkg2: Remove duplicate patches 2019-09-12 23:29:25 +03:00
CTCaer
8033ba461f SE: Boost its speed while BPMP cache is on
Plus add se_aes_crypt_ecb().

Thanks @shchmue for pointing out that speed bump
2019-09-12 23:27:04 +03:00
CTCaer
4dcb2c6343 autoboot: Allow critical info to be shown
This is part of the big refactoring which had all HOS fatal errors.
2019-09-12 23:22:42 +03:00
CTCaer
95a6f2b763 sdram: Support fully burnt ODM fuses 2019-09-12 23:21:12 +03:00
CTCaer
8cef81c901 nyx: Fix some inconsistencies with transparency 2019-09-12 23:20:38 +03:00
CTCaer
08d212d4da FatFS: Update to R0.13c (p4) and fix some crit issues 2019-09-12 23:18:39 +03:00
CTCaer
252a57ef6a util: Utilize BPMP sleep when usleep is out of bounds 2019-09-12 23:12:17 +03:00
CTCaer
23e246f224 i2c: Add missing clocks + more refactoring 2019-09-12 23:11:17 +03:00
CTCaer
3028568019 pmc-ccplex: Have proper Power Domain toggling 2019-09-12 23:09:38 +03:00
CTCaer
a8d529cf6a Refactoring and comment adding 2019-09-12 23:08:38 +03:00
CTCaer
c5b64a2b58 tsec: Don't disable HOST1x clock because it's used
Tsec keys function always disabled host1x clock after running.
This interferes with display interface and disables further window frame syncing.
Display_end code already handles disable and reset of said clock.

It also fixes an ancient bug that was mitigated by removing the 5 frame sync on HOST1X_SYNC_SYNCPT_9 at channel 0:
5fd9daa364 (diff-6b0c56eab8515465d559ff0ea73a22c3L152)
2019-09-11 02:19:41 +03:00
CTCaer
4c09454bca nyx options: Do not hide delay time if AutoBoot is off 2019-09-10 23:53:45 +03:00