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1520 commits 2 branches 75 tags 7 MiB
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Author SHA1 Message Date
CTCaer
a6ec41744b bdk: sdram: refactor patching offsets 2023-12-27 21:04:04 +02:00
CTCaer
bb6e4deb4c bdk: remove unused lp0 cfg from bdk 2023-12-27 21:02:33 +02:00
CTCaer
1522f1ee92 nyx: info: add max bus speed info for sd 2023-12-27 15:02:00 +02:00
CTCaer
41d3565353 bdk: sdmmc: deduplicate function modes get 
And parse the whole info
 2023-12-27 15:01:20 +02:00
CTCaer
e23d469f06 nyx: revamp jc/sio cal info dumping 
Hoag:
- Add stick types
- Add imu type

All the rest:
- Add imu calibration info
- Add BT mac
 2023-12-25 04:17:59 +02:00
CTCaer
bd1733c4fa minerva: use min 2 divm 
Adhere to software based imposed limits for T210.
 2023-12-25 04:11:55 +02:00
CTCaer
db214f2865 l4t: correct debug print 2023-12-25 04:09:46 +02:00
CTCaer
b584a3f53a bdk: add several defines 2023-12-25 04:08:34 +02:00
CTCaer
7f98fb736a bdk: hwinit: reorder sdmmc1 reg disable 2023-12-25 04:07:26 +02:00
CTCaer
87c50732c0 bdk: fuse: simplify idle wait 2023-12-25 03:47:26 +02:00
CTCaer
504659a39b bdk: actmon: switch to averaged sampling 2023-12-25 03:46:05 +02:00
CTCaer
e47a819948 bdk: se: add more useful functions 
- aes cmac 128bit
- aes hashing
- option to clear updated aes iv
 2023-12-25 03:44:52 +02:00
CTCaer
39abeb9a28 nyx: improve fuses info 
Correct the Chip ID Revision and also add actual (derived) iddq values.
 2023-12-25 03:33:37 +02:00
CTCaer
80a32304cb nyx: rename 3rd gen hynix ram chips 2023-12-25 03:21:17 +02:00
CTCaer
913cdee8e8 bdk: sdram: rename 3rd gen t210b01 hynix ram 
Confirmed to be a Hynix H54G46CYRBX267 and not a H9HCNNNBKMMLXR-NEI
 2023-12-25 03:02:11 +02:00
CTCaer
eff55ff378 bdk: touch: rename samsung touch panel 
BH2109 is the board model and not the touch panel.
 2023-12-25 02:41:42 +02:00
CTCaer
09dfcfc57d bdk: display: deduplicate interrupt code 2023-12-25 02:40:38 +02:00
CTCaer
239c48c790 bdk: usb: hid: improve stick calibration 
Wait a bit before calibrating stick centers, in order to avoid bad values.
 2023-12-25 02:37:40 +02:00
CTCaer
2e1a773a08 nyx: relax joycon calibration init 
Wait a bit before actually doing stick calibration in order to avoid bad values.
 2023-12-25 02:36:27 +02:00
CTCaer
d1ee0e35fd hos: pkg2: fix validation check for nogc 17.0.0 2023-10-13 07:58:56 +03:00
CTCaer
226b30b57c Bump hekate to v6.0.7 and Nyx to v1.5.6 2023-10-12 09:25:14 +03:00
CTCaer
7fab13b76d hos: correct meso version masking 
And also use the version instead to decide for relative INI1 base setting.
That's because MSS0 and MSS1 come with prepopulated INI1 base.
 2023-10-12 09:25:06 +03:00
CTCaer
d3d3768c8f hos: correct max KB 2023-10-12 08:07:46 +03:00
CTCaer
7040f1ada2 l4t: allow setting dram voltage even if no OC 
Mostly for allowing undervolting.
 2023-10-12 07:44:00 +03:00
CTCaer
697bde8667 hos: 17.0.0 support 2023-10-12 07:41:12 +03:00
CTCaer
03f11370c7 hos: allow reusage of embedded INI1 region 2023-10-12 07:36:00 +03:00
CTCaer
533fb08a1c nyx: info: K4U6E3S4AB-MGCL is now validated 2023-10-12 07:28:28 +03:00
CTCaer
c828539544 hos: pkg2: rename ini1 value offset 
And simplify the logic a bit.
 2023-10-12 07:26:55 +03:00
CTCaer
d1be18821d hos: reduce pkg1 id to 8 chars to save space 2023-10-12 07:16:23 +03:00
CTCaer
613fdf621d hos: rename KB defines 
From KB_FIRMWARE_VERSION to HOS_KB_VERSION
 2023-10-12 07:11:22 +03:00
CTCaer
5b13e81141 Adjust about-screens copyright year 2023-10-12 07:01:28 +03:00
CTCaer
ce137852b7 bdk: change some defines and comments 2023-10-12 06:59:15 +03:00
CTCaer
e84367e302 nyx: swap and fix config save text 2023-08-23 00:10:10 +03:00
CTCaer
e5a22230b1 Bump hekate to v6.0.6 and Nyx to v1.5.5 2023-08-22 16:56:59 +03:00
CTCaer
ce42e27f45 bdk: minerva: do not handle oc freq 
Arachne already handles it.
 2023-08-22 16:44:41 +03:00
CTCaer
01a8f30925 nyx: add contact me for unknown ram chips 2023-08-22 16:44:03 +03:00
CTCaer
d73a3fdd7c bdk: sdram: name 1a micron ram chips 
Again, as with 3rd gen samsung and hynix, that's an educated guess.
 2023-08-22 14:44:27 +03:00
CTCaer
fdf0dcc636 bdk: joycon: add info about sio imu report 2023-08-22 14:36:23 +03:00
CTCaer
976a02f8bc nyx: clock: fix year off-by-one 2023-08-07 21:12:18 +03:00
CTCaer
187b6d843e nyx: emummc: allow migrating emummc backup 
Now if an eMMC backup is not found, emuMMC backup will be used.
 2023-08-07 21:11:17 +03:00
CTCaer
6de29094fe nyx: gfx: add column control 
gfx_getpos/setpos can now get/set column offset.
setpos column can be fully custom. Otherwise GFX_COL_KEEP or GFX_COL_AUTO (2 columns) can be used.

Additionally, always restore column when printing debug info in log screen.
 2023-08-07 21:09:37 +03:00
CTCaer
f2bdc3f47c bdk: i2c: fix stack buffer overflow 2023-08-07 21:02:20 +03:00
CTCaer
09b1efe2a4 nyx: info: use updated defines 2023-07-31 17:09:04 +03:00
CTCaer
bb0a1fd0a2 minerva: add freqs up to 2366 MHz 2023-07-31 17:05:09 +03:00
CTCaer
1cc97ebc51 bdk: update various comments 2023-07-31 17:03:15 +03:00
CTCaer
1e28320e5a bdk: t210: add more mmio addresses 
And simplify relevant drivers that hardcoded them.
 2023-07-31 16:59:15 +03:00
CTCaer
0fe17cfb41 l4t: add latest api version info 2023-07-28 15:42:16 +03:00
CTCaer
91393700ff nyx: use restore/emummc folder for restoring 
In order to avoid mistakes, emuMMC can now only be restored from `backup/{emmc_sn}/restore/emummc`.
 2023-07-28 04:07:43 +03:00
CTCaer
cb964fe5d2 l4t: allow ram undervolting 2023-07-28 04:04:03 +03:00
CTCaer
010b08d4c7 l4t: t210b01: set real dram rate by default 
Since Arachne Register Cell (ARC) is now final and stable,
automatically set rated DRAM frequency for T210B01 by default.
1866 MHz for old ones and 2133 MHz for newer ones.

Setting anything from 1600000 and lower will disable that.
 2023-07-28 04:03:01 +03:00