mirror of
https://github.com/CTCaer/hekate
synced 2024-12-22 11:21:23 +00:00
sdmmc v2: Driver fixes
This commit is contained in:
CTCaer
parent
88b01994bd
commit
eac6426125
4 changed files with 172 additions and 84 deletions
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@ -135,10 +135,12 @@ static int _sdmmc_storage_check_status(sdmmc_storage_t *storage)
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static int _sdmmc_storage_readwrite_ex(sdmmc_storage_t *storage, u32 *blkcnt_out, u32 sector, u32 num_sectors, void *buf, u32 is_write)
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{
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u32 tmp = 0;
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sdmmc_cmd_t cmdbuf;
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sdmmc_req_t reqbuf;
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sdmmc_init_cmd(&cmdbuf, is_write ? MMC_WRITE_MULTIPLE_BLOCK : MMC_READ_MULTIPLE_BLOCK, sector, SDMMC_RSP_TYPE_1, 0);
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sdmmc_req_t reqbuf;
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reqbuf.buf = buf;
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reqbuf.num_sectors = num_sectors;
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reqbuf.blksize = 512;
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@ -148,7 +150,6 @@ static int _sdmmc_storage_readwrite_ex(sdmmc_storage_t *storage, u32 *blkcnt_out
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if (!sdmmc_execute_cmd(storage->sdmmc, &cmdbuf, &reqbuf, blkcnt_out))
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{
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u32 tmp = 0;
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sdmmc_stop_transmission(storage->sdmmc, &tmp);
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_sdmmc_storage_get_status(storage, &tmp, 0);
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@ -542,14 +543,10 @@ DPRINTF("[MMC] set blocklen to 512\n");
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return 0;
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DPRINTF("[MMC] switched buswidth\n");
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u8 *ext_csd = (u8 *)malloc(512);
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if (!_mmc_storage_get_ext_csd(storage, ext_csd))
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{
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free(ext_csd);
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if (!_mmc_storage_get_ext_csd(storage, (u8 *)SDMMC_UPPER_BUFFER))
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return 0;
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}
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free(ext_csd);
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DPRINTF("[MMC] got ext_csd\n");
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_mmc_storage_parse_cid(storage); //This needs to be after csd and ext_csd
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//gfx_hexdump(0, ext_csd, 512);
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@ -561,10 +558,6 @@ DPRINTF("[MMC] got ext_csd\n");
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_mmc_storage_enable_bkops(storage);
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DPRINTF("[MMC] BKOPS enabled\n");
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}
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else
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{
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DPRINTF("[MMC] BKOPS disabled\n");
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}
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if (!_mmc_storage_enable_highspeed(storage, storage->ext_csd.card_type, type))
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return 0;
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@ -803,19 +796,21 @@ int _sd_storage_switch(sdmmc_storage_t *storage, void *buf, int mode, int group,
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return _sdmmc_storage_check_result(tmp);
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}
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void _sd_storage_set_current_limit(sdmmc_storage_t *storage, u8 *buf)
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void _sd_storage_set_current_limit(sdmmc_storage_t *storage, u16 current_limit, u8 *buf)
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{
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u32 pwr = SD_SET_CURRENT_LIMIT_800;
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u32 pwr = SD_SET_CURRENT_LIMIT_200;
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if (current_limit & SD_MAX_CURRENT_800)
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pwr = SD_SET_CURRENT_LIMIT_800;
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else if (current_limit & SD_MAX_CURRENT_600)
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pwr = SD_SET_CURRENT_LIMIT_600;
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else if (current_limit & SD_MAX_CURRENT_400)
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pwr = SD_SET_CURRENT_LIMIT_400;
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_sd_storage_switch(storage, buf, SD_SWITCH_SET, 3, pwr);
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while (pwr > 0)
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{
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pwr--;
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_sd_storage_switch(storage, buf, SD_SWITCH_SET, 3, pwr);
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if (((buf[15] >> 4) & 0x0F) == pwr)
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break;
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}
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{
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switch (pwr)
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{
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case SD_SET_CURRENT_LIMIT_800:
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@ -832,6 +827,7 @@ DPRINTF("[SD] power limit raised to 400mA\n");
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DPRINTF("[SD] power limit defaulted to 200mA\n");
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break;
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}
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}
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}
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int _sd_storage_enable_highspeed(sdmmc_storage_t *storage, u32 hs_type, u8 *buf)
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@ -845,23 +841,26 @@ DPRINTF("[SD] supports switch to (U)HS mode\n");
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return 0;
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DPRINTF("[SD] supports selected (U)HS mode\n");
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if ((((u16)buf[0] << 8) | buf[1]) < 0x320)
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u16 total_pwr_consumption = ((u16)buf[0] << 8) | buf[1];
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DPRINTF("[SD] total max current: %d\n", total_pwr_consumption);
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if (total_pwr_consumption <= 800)
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{
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if (!_sd_storage_switch(storage, buf, SD_SWITCH_SET, 0, hs_type))
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return 0;
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if (type_out != (buf[16] & 0xF))
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return 0;
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}
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return 1;
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}
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DPRINTF("[SD] card max current over limit\n");
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return 0;
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}
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int _sd_storage_enable_uhs_low_volt(sdmmc_storage_t *storage, u32 type, u8 *buf)
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{
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// Try to raise the current limit to let the card perform better.
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_sd_storage_set_current_limit(storage, buf);
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if (sdmmc_get_bus_width(storage->sdmmc) != SDMMC_BUS_WIDTH_4)
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return 0;
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@ -870,6 +869,10 @@ int _sd_storage_enable_uhs_low_volt(sdmmc_storage_t *storage, u32 type, u8 *buf)
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//gfx_hexdump(0, (u8 *)buf, 64);
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u8 access_mode = buf[13];
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u16 current_limit = buf[7] | buf[6] << 8;
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// Try to raise the current limit to let the card perform better.
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_sd_storage_set_current_limit(storage, current_limit, buf);
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u32 hs_type = 0;
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switch (type)
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@ -942,6 +945,10 @@ int _sd_storage_enable_hs_high_volt(sdmmc_storage_t *storage, u8 *buf)
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//gfx_hexdump(0, (u8 *)buf, 64);
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u8 access_mode = buf[13];
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u16 current_limit = buf[7] | buf[6] << 8;
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// Try to raise the current limit to let the card perform better.
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_sd_storage_set_current_limit(storage, current_limit, buf);
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if (!(access_mode & SD_MODE_HIGH_SPEED))
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return 1;
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@ -1076,6 +1083,23 @@ static void _sd_storage_parse_csd(sdmmc_storage_t *storage)
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}
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}
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static bool _sdmmc_storage_supports_low_voltage(u32 bus_width, u32 type)
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{
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switch (type)
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{
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case SDHCI_TIMING_UHS_SDR12:
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case SDHCI_TIMING_UHS_SDR25:
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case SDHCI_TIMING_UHS_SDR50:
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case SDHCI_TIMING_UHS_SDR104:
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case SDHCI_TIMING_UHS_SDR82:
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case SDHCI_TIMING_UHS_DDR50:
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if (bus_width == SDMMC_BUS_WIDTH_4)
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return true;
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default:
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return false;
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}
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}
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void sdmmc_storage_init_wait_sd()
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{
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u32 sd_poweroff_time = (u32)get_tmr_ms() - sd_power_cycle_time_start;
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@ -1109,7 +1133,9 @@ DPRINTF("[SD] went to idle state\n");
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return 0;
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DPRINTF("[SD] after send if cond\n");
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if (!_sd_storage_get_op_cond(storage, is_version_1, bus_width == SDMMC_BUS_WIDTH_4 && type == 11))
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bool supports_low_voltage = _sdmmc_storage_supports_low_voltage(bus_width, type);
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if (!_sd_storage_get_op_cond(storage, is_version_1, supports_low_voltage))
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return 0;
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DPRINTF("[SD] got op cond\n");
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@ -1186,6 +1212,8 @@ DPRINTF("[SD] SD does not support wide bus width\n");
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if (!_sd_storage_enable_uhs_low_volt(storage, type, buf))
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return 0;
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DPRINTF("[SD] enabled UHS\n");
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sdmmc_card_clock_ctrl(sdmmc, SDMMC_AUTO_CAL_ENABLE);
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}
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else if (type != SDHCI_TIMING_SD_DS12 && (storage->scr.sda_vsn & 0xF) != 0)
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{
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@ -1193,10 +1221,16 @@ DPRINTF("[SD] enabled UHS\n");
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return 0;
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DPRINTF("[SD] enabled HS\n");
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switch (bus_width)
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{
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case SDMMC_BUS_WIDTH_4:
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storage->csd.busspeed = 25;
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break;
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case SDMMC_BUS_WIDTH_1:
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storage->csd.busspeed = 6;
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break;
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}
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}
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sdmmc_card_clock_ctrl(sdmmc, SDMMC_AUTO_CAL_ENABLE);
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// Parse additional card info from sd status.
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if (_sd_storage_get_ssr(storage, buf))
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@ -23,6 +23,16 @@
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u32 sd_power_cycle_time_start;
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typedef enum _sdmmc_type
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{
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MMC_SD = 0,
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MMC_EMMC = 1,
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EMMC_GPP = 0,
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EMMC_BOOT0 = 1,
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EMMC_BOOT1 = 2
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} sdmmc_type;
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typedef struct _mmc_cid
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{
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u32 manfid;
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@ -135,10 +135,12 @@ static int _sdmmc_storage_check_status(sdmmc_storage_t *storage)
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static int _sdmmc_storage_readwrite_ex(sdmmc_storage_t *storage, u32 *blkcnt_out, u32 sector, u32 num_sectors, void *buf, u32 is_write)
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{
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u32 tmp = 0;
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sdmmc_cmd_t cmdbuf;
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sdmmc_req_t reqbuf;
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sdmmc_init_cmd(&cmdbuf, is_write ? MMC_WRITE_MULTIPLE_BLOCK : MMC_READ_MULTIPLE_BLOCK, sector, SDMMC_RSP_TYPE_1, 0);
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sdmmc_req_t reqbuf;
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reqbuf.buf = buf;
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reqbuf.num_sectors = num_sectors;
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reqbuf.blksize = 512;
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@ -148,7 +150,6 @@ static int _sdmmc_storage_readwrite_ex(sdmmc_storage_t *storage, u32 *blkcnt_out
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if (!sdmmc_execute_cmd(storage->sdmmc, &cmdbuf, &reqbuf, blkcnt_out))
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{
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u32 tmp = 0;
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sdmmc_stop_transmission(storage->sdmmc, &tmp);
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_sdmmc_storage_get_status(storage, &tmp, 0);
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@ -542,14 +543,10 @@ DPRINTF("[MMC] set blocklen to 512\n");
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return 0;
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DPRINTF("[MMC] switched buswidth\n");
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u8 *ext_csd = (u8 *)malloc(512);
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if (!_mmc_storage_get_ext_csd(storage, ext_csd))
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{
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free(ext_csd);
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if (!_mmc_storage_get_ext_csd(storage, (u8 *)SDMMC_UPPER_BUFFER))
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return 0;
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}
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free(ext_csd);
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DPRINTF("[MMC] got ext_csd\n");
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_mmc_storage_parse_cid(storage); //This needs to be after csd and ext_csd
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//gfx_hexdump(0, ext_csd, 512);
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@ -561,10 +558,6 @@ DPRINTF("[MMC] got ext_csd\n");
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_mmc_storage_enable_bkops(storage);
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DPRINTF("[MMC] BKOPS enabled\n");
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}
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else
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{
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DPRINTF("[MMC] BKOPS disabled\n");
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}
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if (!_mmc_storage_enable_highspeed(storage, storage->ext_csd.card_type, type))
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return 0;
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@ -803,19 +796,21 @@ int _sd_storage_switch(sdmmc_storage_t *storage, void *buf, int mode, int group,
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return _sdmmc_storage_check_result(tmp);
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}
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void _sd_storage_set_current_limit(sdmmc_storage_t *storage, u8 *buf)
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void _sd_storage_set_current_limit(sdmmc_storage_t *storage, u16 current_limit, u8 *buf)
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{
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u32 pwr = SD_SET_CURRENT_LIMIT_800;
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u32 pwr = SD_SET_CURRENT_LIMIT_200;
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if (current_limit & SD_MAX_CURRENT_800)
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pwr = SD_SET_CURRENT_LIMIT_800;
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else if (current_limit & SD_MAX_CURRENT_600)
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pwr = SD_SET_CURRENT_LIMIT_600;
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else if (current_limit & SD_MAX_CURRENT_400)
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pwr = SD_SET_CURRENT_LIMIT_400;
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_sd_storage_switch(storage, buf, SD_SWITCH_SET, 3, pwr);
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while (pwr > 0)
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{
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pwr--;
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_sd_storage_switch(storage, buf, SD_SWITCH_SET, 3, pwr);
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if (((buf[15] >> 4) & 0x0F) == pwr)
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break;
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}
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{
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switch (pwr)
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{
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case SD_SET_CURRENT_LIMIT_800:
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@ -832,6 +827,7 @@ DPRINTF("[SD] power limit raised to 400mA\n");
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DPRINTF("[SD] power limit defaulted to 200mA\n");
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break;
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}
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}
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}
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int _sd_storage_enable_highspeed(sdmmc_storage_t *storage, u32 hs_type, u8 *buf)
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@ -845,23 +841,26 @@ DPRINTF("[SD] supports switch to (U)HS mode\n");
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return 0;
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DPRINTF("[SD] supports selected (U)HS mode\n");
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if ((((u16)buf[0] << 8) | buf[1]) < 0x320)
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u16 total_pwr_consumption = ((u16)buf[0] << 8) | buf[1];
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DPRINTF("[SD] total max current: %d\n", total_pwr_consumption);
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if (total_pwr_consumption <= 800)
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{
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if (!_sd_storage_switch(storage, buf, SD_SWITCH_SET, 0, hs_type))
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return 0;
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if (type_out != (buf[16] & 0xF))
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return 0;
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}
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return 1;
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}
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DPRINTF("[SD] card max current over limit\n");
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return 0;
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}
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int _sd_storage_enable_uhs_low_volt(sdmmc_storage_t *storage, u32 type, u8 *buf)
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{
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// Try to raise the current limit to let the card perform better.
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_sd_storage_set_current_limit(storage, buf);
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if (sdmmc_get_bus_width(storage->sdmmc) != SDMMC_BUS_WIDTH_4)
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return 0;
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@ -870,6 +869,10 @@ int _sd_storage_enable_uhs_low_volt(sdmmc_storage_t *storage, u32 type, u8 *buf)
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//gfx_hexdump(0, (u8 *)buf, 64);
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u8 access_mode = buf[13];
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u16 current_limit = buf[7] | buf[6] << 8;
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// Try to raise the current limit to let the card perform better.
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_sd_storage_set_current_limit(storage, current_limit, buf);
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u32 hs_type = 0;
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switch (type)
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@ -942,6 +945,10 @@ int _sd_storage_enable_hs_high_volt(sdmmc_storage_t *storage, u8 *buf)
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//gfx_hexdump(0, (u8 *)buf, 64);
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u8 access_mode = buf[13];
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u16 current_limit = buf[7] | buf[6] << 8;
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// Try to raise the current limit to let the card perform better.
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_sd_storage_set_current_limit(storage, current_limit, buf);
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if (!(access_mode & SD_MODE_HIGH_SPEED))
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return 1;
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@ -1076,6 +1083,23 @@ static void _sd_storage_parse_csd(sdmmc_storage_t *storage)
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}
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}
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static bool _sdmmc_storage_supports_low_voltage(u32 bus_width, u32 type)
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{
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switch (type)
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{
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case SDHCI_TIMING_UHS_SDR12:
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case SDHCI_TIMING_UHS_SDR25:
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case SDHCI_TIMING_UHS_SDR50:
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case SDHCI_TIMING_UHS_SDR104:
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case SDHCI_TIMING_UHS_SDR82:
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case SDHCI_TIMING_UHS_DDR50:
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if (bus_width == SDMMC_BUS_WIDTH_4)
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return true;
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default:
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return false;
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}
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}
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void sdmmc_storage_init_wait_sd()
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{
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u32 sd_poweroff_time = (u32)get_tmr_ms() - sd_power_cycle_time_start;
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@ -1109,7 +1133,9 @@ DPRINTF("[SD] went to idle state\n");
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return 0;
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DPRINTF("[SD] after send if cond\n");
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if (!_sd_storage_get_op_cond(storage, is_version_1, bus_width == SDMMC_BUS_WIDTH_4 && type == 11))
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bool supports_low_voltage = _sdmmc_storage_supports_low_voltage(bus_width, type);
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if (!_sd_storage_get_op_cond(storage, is_version_1, supports_low_voltage))
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return 0;
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DPRINTF("[SD] got op cond\n");
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@ -1186,6 +1212,8 @@ DPRINTF("[SD] SD does not support wide bus width\n");
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if (!_sd_storage_enable_uhs_low_volt(storage, type, buf))
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return 0;
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DPRINTF("[SD] enabled UHS\n");
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sdmmc_card_clock_ctrl(sdmmc, SDMMC_AUTO_CAL_ENABLE);
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}
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else if (type != SDHCI_TIMING_SD_DS12 && (storage->scr.sda_vsn & 0xF) != 0)
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{
|
||||
|
|
@ -1193,10 +1221,16 @@ DPRINTF("[SD] enabled UHS\n");
|
|||
return 0;
|
||||
|
||||
DPRINTF("[SD] enabled HS\n");
|
||||
switch (bus_width)
|
||||
{
|
||||
case SDMMC_BUS_WIDTH_4:
|
||||
storage->csd.busspeed = 25;
|
||||
break;
|
||||
case SDMMC_BUS_WIDTH_1:
|
||||
storage->csd.busspeed = 6;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
sdmmc_card_clock_ctrl(sdmmc, SDMMC_AUTO_CAL_ENABLE);
|
||||
|
||||
// Parse additional card info from sd status.
|
||||
if (_sd_storage_get_ssr(storage, buf))
|
||||
|
|
|
|||
|
|
@ -23,6 +23,16 @@
|
|||
|
||||
u32 sd_power_cycle_time_start;
|
||||
|
||||
typedef enum _sdmmc_type
|
||||
{
|
||||
MMC_SD = 0,
|
||||
MMC_EMMC = 1,
|
||||
|
||||
EMMC_GPP = 0,
|
||||
EMMC_BOOT0 = 1,
|
||||
EMMC_BOOT1 = 2
|
||||
} sdmmc_type;
|
||||
|
||||
typedef struct _mmc_cid
|
||||
{
|
||||
u32 manfid;
|
||||
|
|
|
|||
Loading…
Reference in a new issue