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bdk: vic: ease stress to APB when enabling VIC clk

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CTCaer 2022-10-13 00:16:08 +03:00
parent 1bef259571
commit c0cc9c9f4f
1 changed files with 6 additions and 0 deletions
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6
bdk/display/vic.c
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@ -536,9 +536,15 @@ int vic_compose()
int vic_init() int vic_init()
{ {
// Ease the stress to APB.
bpmp_freq_t prev_fid = bpmp_clk_rate_set(BPMP_CLK_NORMAL);
clock_enable_host1x(); clock_enable_host1x();
clock_enable_vic(); clock_enable_vic();
// Restore sys clock.
bpmp_clk_rate_set(prev_fid);
// Load Fetch Control Engine microcode. // Load Fetch Control Engine microcode.
for (u32 i = 0; i < sizeof(vic_fce_ucode) / sizeof(u32); i++) for (u32 i = 0; i < sizeof(vic_fce_ucode) / sizeof(u32); i++)
{ {