From c0cc9c9f4f59b84452e0c34b2585c789532289d8 Mon Sep 17 00:00:00 2001
From: CTCaer <ctcaer@gmail.com>
Date: Thu, 13 Oct 2022 00:16:08 +0300
Subject: [PATCH] bdk: vic: ease stress to APB when enabling VIC clk

---
 bdk/display/vic.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/bdk/display/vic.c b/bdk/display/vic.c
index c51c212..5bfc990 100644
--- a/bdk/display/vic.c
+++ b/bdk/display/vic.c
@@ -536,9 +536,15 @@ int vic_compose()
 
 int vic_init()
 {
+	// Ease the stress to APB.
+	bpmp_freq_t prev_fid = bpmp_clk_rate_set(BPMP_CLK_NORMAL);
+
 	clock_enable_host1x();
 	clock_enable_vic();
 
+	// Restore sys clock.
+	bpmp_clk_rate_set(prev_fid);
+
 	// Load Fetch Control Engine microcode.
 	for (u32 i = 0; i < sizeof(vic_fce_ucode) / sizeof(u32); i++)
 	{