mirror of
https://github.com/CTCaer/hekate
synced 2024-12-22 11:21:23 +00:00
bdk: whitespace refactor
This commit is contained in:
parent
1499f958dd
commit
70523e404f
26 changed files with 898 additions and 835 deletions
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@ -499,7 +499,8 @@ void display_init()
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case PANEL_SAM_AMS699VC01:
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_display_dsi_send_cmd(MIPI_DSI_DCS_SHORT_WRITE, MIPI_DCS_EXIT_SLEEP_MODE, 180000);
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// Set color mode to natural. Stock is Default (0x00) which is VIVID (0x65). (Reset value is 0x20).
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_display_dsi_send_cmd(MIPI_DSI_DCS_SHORT_WRITE_PARAM, MIPI_DCS_PRIV_SM_SET_COLOR_MODE | (DCS_SM_COLOR_MODE_NATURAL << 8), 0);
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_display_dsi_send_cmd(MIPI_DSI_DCS_SHORT_WRITE_PARAM,
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MIPI_DCS_PRIV_SM_SET_COLOR_MODE | (DCS_SM_COLOR_MODE_NATURAL << 8), 0);
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// Enable backlight and smooth PWM.
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_display_dsi_send_cmd(MIPI_DSI_DCS_SHORT_WRITE_PARAM,
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MIPI_DCS_SET_CONTROL_DISPLAY | ((DCS_CONTROL_DISPLAY_BRIGHTNESS_CTRL | DCS_CONTROL_DISPLAY_DIMMING_CTRL) << 8), 0);
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@ -618,7 +619,8 @@ void display_backlight_pwm_init()
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clock_enable_pwm();
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PWM(PWM_CONTROLLER_PWM_CSR_0) = PWM_CSR_EN; // Enable PWM and set it to 25KHz PFM. 29.5KHz is stock.
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// Enable PWM and set it to 25KHz PFM. 29.5KHz is stock.
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PWM(PWM_CONTROLLER_PWM_CSR_0) = PWM_CSR_EN;
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PINMUX_AUX(PINMUX_AUX_LCD_BL_PWM) = (PINMUX_AUX(PINMUX_AUX_LCD_BL_PWM) & ~PINMUX_FUNC_MASK) | 1; // Set PWM0 mode.
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gpio_config(GPIO_PORT_V, GPIO_PIN_0, GPIO_MODE_SPIO); // Backlight power mode.
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@ -626,7 +628,8 @@ void display_backlight_pwm_init()
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void display_backlight(bool enable)
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{
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gpio_write(GPIO_PORT_V, GPIO_PIN_0, enable ? GPIO_HIGH : GPIO_LOW); // Backlight PWM GPIO.
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// Backlight PWM GPIO.
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gpio_write(GPIO_PORT_V, GPIO_PIN_0, enable ? GPIO_HIGH : GPIO_LOW);
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}
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static void _display_dsi_backlight_brightness(u32 duty)
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@ -798,7 +801,8 @@ skip_panel_deinit:
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CLOCK(CLK_RST_CONTROLLER_CLK_ENB_L_CLR) = BIT(CLK_L_HOST1X) | BIT(CLK_L_DISP1);
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// Power down pads.
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DSI(_DSIREG(DSI_PAD_CONTROL_0)) = DSI_PAD_CONTROL_VS1_PULLDN_CLK | DSI_PAD_CONTROL_VS1_PULLDN(0xF) | DSI_PAD_CONTROL_VS1_PDIO_CLK | DSI_PAD_CONTROL_VS1_PDIO(0xF);
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DSI(_DSIREG(DSI_PAD_CONTROL_0)) = DSI_PAD_CONTROL_VS1_PULLDN_CLK | DSI_PAD_CONTROL_VS1_PULLDN(0xF) |
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DSI_PAD_CONTROL_VS1_PDIO_CLK | DSI_PAD_CONTROL_VS1_PDIO(0xF);
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DSI(_DSIREG(DSI_POWER_CONTROL)) = 0;
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// Switch LCD PWM backlight pin to special function mode and enable PWM0 mode.
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@ -890,52 +894,77 @@ u32 *display_init_framebuffer_log()
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void display_activate_console()
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{
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DISPLAY_A(_DIREG(DC_CMD_DISPLAY_WINDOW_HEADER)) = WINDOW_D_SELECT; // Select window D.
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DISPLAY_A(_DIREG(DC_WIN_WIN_OPTIONS)) = WIN_ENABLE; // Enable window DD.
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DISPLAY_A(_DIREG(DC_WIN_POSITION)) = 0xFF80;
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// Select window D.
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DISPLAY_A(_DIREG(DC_CMD_DISPLAY_WINDOW_HEADER)) = WINDOW_D_SELECT;
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// Enable and setup window D.
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DISPLAY_A(_DIREG(DC_WIN_WIN_OPTIONS)) = WIN_ENABLE;
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DISPLAY_A(_DIREG(DC_WIN_POSITION)) = 0xFF80; // X: -128.
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// Arm and activate changes.
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DISPLAY_A(_DIREG(DC_CMD_STATE_CONTROL)) = GENERAL_UPDATE | WIN_D_UPDATE;
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DISPLAY_A(_DIREG(DC_CMD_STATE_CONTROL)) = GENERAL_ACT_REQ | WIN_D_ACT_REQ;
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// Pull-down effect.
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for (u32 i = 0xFF80; i < 0x10000; i++)
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{
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// Set window position.
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DISPLAY_A(_DIREG(DC_WIN_POSITION)) = i & 0xFFFF;
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// Arm and activate changes.
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DISPLAY_A(_DIREG(DC_CMD_STATE_CONTROL)) = GENERAL_UPDATE | WIN_D_UPDATE;
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DISPLAY_A(_DIREG(DC_CMD_STATE_CONTROL)) = GENERAL_ACT_REQ | WIN_D_ACT_REQ;
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usleep(1000);
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}
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DISPLAY_A(_DIREG(DC_WIN_POSITION)) = 0;
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// Arm and activate changes.
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DISPLAY_A(_DIREG(DC_CMD_STATE_CONTROL)) = GENERAL_UPDATE | WIN_D_UPDATE;
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DISPLAY_A(_DIREG(DC_CMD_STATE_CONTROL)) = GENERAL_ACT_REQ | WIN_D_ACT_REQ;
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DISPLAY_A(_DIREG(DC_CMD_DISPLAY_WINDOW_HEADER)) = WINDOW_A_SELECT; // Select window A.
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// Re-select window A.
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DISPLAY_A(_DIREG(DC_CMD_DISPLAY_WINDOW_HEADER)) = WINDOW_A_SELECT;
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}
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void display_deactivate_console()
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{
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DISPLAY_A(_DIREG(DC_CMD_DISPLAY_WINDOW_HEADER)) = WINDOW_D_SELECT; // Select window D.
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// Select window D.
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DISPLAY_A(_DIREG(DC_CMD_DISPLAY_WINDOW_HEADER)) = WINDOW_D_SELECT;
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// Pull-up effect.
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for (u32 i = 0xFFFF; i > 0xFF7F; i--)
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{
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// Set window position.
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DISPLAY_A(_DIREG(DC_WIN_POSITION)) = i & 0xFFFF;
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// Arm and activate changes.
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DISPLAY_A(_DIREG(DC_CMD_STATE_CONTROL)) = GENERAL_UPDATE | WIN_D_UPDATE;
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DISPLAY_A(_DIREG(DC_CMD_STATE_CONTROL)) = GENERAL_ACT_REQ | WIN_D_ACT_REQ;
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usleep(500);
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}
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// Disable window D.
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DISPLAY_A(_DIREG(DC_WIN_POSITION)) = 0;
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DISPLAY_A(_DIREG(DC_WIN_WIN_OPTIONS)) = 0; // Disable window DD.
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DISPLAY_A(_DIREG(DC_WIN_WIN_OPTIONS)) = 0;
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// Arm and activate changes.
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DISPLAY_A(_DIREG(DC_CMD_STATE_CONTROL)) = GENERAL_UPDATE | WIN_D_UPDATE;
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DISPLAY_A(_DIREG(DC_CMD_STATE_CONTROL)) = GENERAL_ACT_REQ | WIN_D_ACT_REQ;
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DISPLAY_A(_DIREG(DC_CMD_DISPLAY_WINDOW_HEADER)) = WINDOW_A_SELECT; // Select window A.
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// Re-select window A.
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DISPLAY_A(_DIREG(DC_CMD_DISPLAY_WINDOW_HEADER)) = WINDOW_A_SELECT;
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}
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void display_init_cursor(void *crs_fb, u32 size)
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{
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// Setup cursor.
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DISPLAY_A(_DIREG(DC_DISP_CURSOR_START_ADDR)) = CURSOR_CLIPPING(CURSOR_CLIP_WIN_A) | size | ((u32)crs_fb >> 10);
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DISPLAY_A(_DIREG(DC_DISP_BLEND_CURSOR_CONTROL)) =
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CURSOR_BLEND_R8G8B8A8 | CURSOR_BLEND_DST_FACTOR(CURSOR_BLEND_K1) | CURSOR_BLEND_SRC_FACTOR(CURSOR_BLEND_K1) | 0xFF;
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DISPLAY_A(_DIREG(DC_DISP_BLEND_CURSOR_CONTROL)) = CURSOR_BLEND_R8G8B8A8 |
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CURSOR_BLEND_DST_FACTOR(CURSOR_BLEND_K1) |
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CURSOR_BLEND_SRC_FACTOR(CURSOR_BLEND_K1) | 0xFF;
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// Enable cursor window.
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DISPLAY_A(_DIREG(DC_DISP_DISP_WIN_OPTIONS)) |= CURSOR_ENABLE;
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// Arm and activate changes.
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@ -945,8 +974,10 @@ void display_init_cursor(void *crs_fb, u32 size)
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void display_set_pos_cursor(u32 x, u32 y)
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{
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// Set cursor position.
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DISPLAY_A(_DIREG(DC_DISP_CURSOR_POSITION)) = x | (y << 16);
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// Arm and activate changes.
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DISPLAY_A(_DIREG(DC_CMD_STATE_CONTROL)) = GENERAL_UPDATE | CURSOR_UPDATE;
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DISPLAY_A(_DIREG(DC_CMD_STATE_CONTROL)) = GENERAL_ACT_REQ | CURSOR_ACT_REQ;
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}
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@ -955,6 +986,7 @@ void display_deinit_cursor()
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{
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DISPLAY_A(_DIREG(DC_DISP_BLEND_CURSOR_CONTROL)) = 0;
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DISPLAY_A(_DIREG(DC_DISP_DISP_WIN_OPTIONS)) &= ~CURSOR_ENABLE;
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DISPLAY_A(_DIREG(DC_CMD_STATE_CONTROL)) = GENERAL_UPDATE | CURSOR_UPDATE;
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DISPLAY_A(_DIREG(DC_CMD_STATE_CONTROL)) = GENERAL_ACT_REQ | CURSOR_ACT_REQ;
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}
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@ -83,7 +83,7 @@ void set_als_cfg(als_ctxt_t *als_ctxt, u8 gain, u8 cycle)
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void get_als_lux(als_ctxt_t *als_ctxt)
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{
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u32 data[2];
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u32 visible_light;
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u32 vi_light;
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u32 ir_light;
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u64 lux = 0;
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u32 itime_us = BH1730_ITIME_CYCLE_TO_US * als_ctxt->cycle;
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@ -94,14 +94,14 @@ void get_als_lux(als_ctxt_t *als_ctxt)
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data[1] = i2c_recv_byte(I2C_2, BH1730_I2C_ADDR, BH1730_ADDR(BH1730_DATA1LOW_REG)) +
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(i2c_recv_byte(I2C_2, BH1730_I2C_ADDR, BH1730_ADDR(BH1730_DATA1HIGH_REG)) << 8);
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visible_light = data[0];
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vi_light = data[0];
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ir_light = data[1];
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als_ctxt->over_limit = visible_light > 65534 || ir_light > 65534;
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als_ctxt->vi_light = visible_light;
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als_ctxt->vi_light = vi_light;
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als_ctxt->ir_light = ir_light;
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als_ctxt->over_limit = vi_light > 65534 || ir_light > 65534;
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if (!visible_light)
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if (!vi_light)
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{
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als_ctxt->lux = 0;
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@ -116,7 +116,7 @@ void get_als_lux(als_ctxt_t *als_ctxt)
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// Apply optical window calibration coefficients.
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for (u32 i = 0; i < opt_win_cal_count; i++)
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{
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if (1000 * ir_light / visible_light < opt_win_cal[i].rc)
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if (1000 * ir_light / vi_light < opt_win_cal[i].rc)
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{
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lux = ((u64)opt_win_cal[i].cv * data[0]) - (opt_win_cal[i].ci * data[1]);
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break;
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@ -445,11 +445,11 @@ static void _jc_conn_check()
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jc_l.connected = false;
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jc_l.rumble_sent = false;
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jc_gamepad.buttons &= ~JC_BTN_MASK_L;
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jc_gamepad.conn_l = false;
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jc_gamepad.batt_info_l = 0;
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jc_gamepad.bt_conn_l.type = 0;
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jc_gamepad.buttons &= ~JC_BTN_MASK_L;
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}
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if (!jc_r.detected)
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@ -462,11 +462,11 @@ static void _jc_conn_check()
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jc_r.connected = false;
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jc_r.rumble_sent = false;
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jc_gamepad.buttons &= ~JC_BTN_MASK_R;
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jc_gamepad.conn_r = false;
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jc_gamepad.batt_info_r = 0;
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jc_gamepad.bt_conn_r.type = 0;
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jc_gamepad.buttons &= ~JC_BTN_MASK_R;
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}
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}
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@ -727,6 +727,7 @@ static void _jc_sio_parse_payload(joycon_ctxt_t *jc, u8 cmd, const u8* payload,
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jc_gamepad.batt_info_l = jc_l.connected;
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jc_gamepad.batt_info_r = gpio_read(GPIO_PORT_E, GPIO_PIN_7); // Set IRQ status.
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jc_gamepad.conn_l = jc_l.connected;
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jc_gamepad.conn_r = jc_l.connected;
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break;
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@ -115,6 +115,7 @@ static void _touch_process_contact_event(touch_event *event, bool touching)
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event->z = event->raw[5] | (event->raw[6] << 8);
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event->z = event->z << 6;
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u16 tmp = 0x40;
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if ((event->raw[7] & 0x3F) != 1 && (event->raw[7] & 0x3F) != 0x3F)
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tmp = event->raw[7] & 0x3F;
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@ -44,6 +44,7 @@ static void *_heap_alloc(u32 size)
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node->size = size;
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node->prev = NULL;
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node->next = NULL;
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_heap.first = node;
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_heap.last = node;
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@ -103,6 +104,7 @@ static void *_heap_alloc(u32 size)
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new_node->size = size;
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new_node->prev = node;
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new_node->next = NULL;
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node->next = new_node;
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_heap.last = new_node;
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@ -1155,6 +1155,7 @@ static void _sdram_config_t210b01(const sdram_params_t210b01_t *params)
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EMC(EMC_EINPUT_DURATION) = params->emc_einput_duration;
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EMC(EMC_PUTERM_EXTRA) = params->emc_puterm_extra;
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EMC(EMC_PUTERM_WIDTH) = params->emc_puterm_width;
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EMC(EMC_DBG) = params->emc_dbg;
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EMC(EMC_QRST) = params->emc_qrst;
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EMC(EMC_ISSUE_QRST) = 1;
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@ -71,6 +71,7 @@ void smmu_flush_all()
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{
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MC(MC_SMMU_PTC_FLUSH) = 0;
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smmu_flush_regs();
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MC(MC_SMMU_TLB_FLUSH) = 0;
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smmu_flush_regs();
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}
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@ -92,7 +92,8 @@ static int _se_wait()
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// Check for errors.
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if ((SE(SE_INT_STATUS_REG) & SE_INT_ERR_STAT) ||
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(SE(SE_STATUS_REG) & SE_STATUS_STATE_MASK) != SE_STATUS_STATE_IDLE ||
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SE(SE_ERR_STATUS_REG) != 0)
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(SE(SE_ERR_STATUS_REG) != 0)
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)
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{
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return 0;
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}
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@ -335,7 +336,8 @@ int se_aes_crypt_ctr(u32 ks, void *dst, u32 dst_size, const void *src, u32 src_s
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SE(SE_SPARE_REG) = SE_ECO(SE_ERRATA_FIX_ENABLE);
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SE(SE_CONFIG_REG) = SE_CONFIG_ENC_ALG(ALG_AES_ENC) | SE_CONFIG_DST(DST_MEMORY);
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SE(SE_CRYPTO_CONFIG_REG) = SE_CRYPTO_KEY_INDEX(ks) | SE_CRYPTO_CORE_SEL(CORE_ENCRYPT) |
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SE_CRYPTO_XOR_POS(XOR_BOTTOM) | SE_CRYPTO_INPUT_SEL(INPUT_LNR_CTR) | SE_CRYPTO_CTR_CNTN(1);
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SE_CRYPTO_XOR_POS(XOR_BOTTOM) | SE_CRYPTO_INPUT_SEL(INPUT_LNR_CTR) |
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SE_CRYPTO_CTR_CNTN(1);
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_se_aes_ctr_set(ctr);
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u32 src_size_aligned = src_size & 0xFFFFFFF0;
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@ -20,16 +20,17 @@
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#include "tsec.h"
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#include "tsec_t210.h"
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#include <memory_map.h>
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#include <mem/heap.h>
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#include <mem/mc.h>
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#include <mem/smmu.h>
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#include <sec/se_t210.h>
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#include <soc/bpmp.h>
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#include <soc/clock.h>
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#include <soc/kfuse.h>
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#include <soc/pmc.h>
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#include <soc/timer.h>
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#include <soc/t210.h>
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#include <mem/heap.h>
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#include <mem/mc.h>
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#include <mem/smmu.h>
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#include <soc/timer.h>
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// #include <gfx_utils.h>
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@ -83,7 +84,6 @@ int tsec_query(void *tsec_keys, tsec_ctxt_t *tsec_ctxt)
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clock_enable_sor0();
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clock_enable_sor1();
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clock_enable_kfuse();
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kfuse_wait_ready();
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if (type == TSEC_FW_TYPE_NEW)
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@ -128,6 +128,7 @@ int tsec_query(void *tsec_keys, tsec_ctxt_t *tsec_ctxt)
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fwbuf = (u8 *)malloc(SZ_16K);
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u8 *fwbuf_aligned = (u8 *)ALIGN((u32)fwbuf, 0x100);
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memcpy(fwbuf_aligned, tsec_ctxt->fw, tsec_ctxt->size);
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TSEC(TSEC_DMATRFBASE) = (u32)fwbuf_aligned >> 8;
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}
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@ -180,7 +181,7 @@ int tsec_query(void *tsec_keys, tsec_ctxt_t *tsec_ctxt)
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mc = page_alloc(1);
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memcpy(mc, (void *)MC_BASE, SZ_PAGE);
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mc[MC_IRAM_BOM / 4] = 0;
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mc[MC_IRAM_TOM / 4] = 0x80000000;
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mc[MC_IRAM_TOM / 4] = DRAM_START;
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smmu_map(pdir, MC_BASE, (u32)mc, 1, _READABLE | _NONSECURE);
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// IRAM
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@ -72,10 +72,10 @@ static clock_t _clock_tsec = {
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CLK_RST_CONTROLLER_RST_DEVICES_U, CLK_RST_CONTROLLER_CLK_OUT_ENB_U, CLK_RST_CONTROLLER_CLK_SOURCE_TSEC, CLK_U_TSEC, 0, 2 // 204MHz.
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};
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static clock_t _clock_nvdec = {
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CLK_RST_CONTROLLER_RST_DEVICES_Y, CLK_RST_CONTROLLER_CLK_OUT_ENB_Y, 0x698, CLK_Y_NVDEC, 4, 0 // 408 MHz.
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CLK_RST_CONTROLLER_RST_DEVICES_Y, CLK_RST_CONTROLLER_CLK_OUT_ENB_Y, CLK_RST_CONTROLLER_CLK_SOURCE_NVDEC, CLK_Y_NVDEC, 4, 0 // 408 MHz.
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};
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static clock_t _clock_nvjpg = {
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CLK_RST_CONTROLLER_RST_DEVICES_Y, CLK_RST_CONTROLLER_CLK_OUT_ENB_Y, 0x69C, CLK_Y_NVJPG, 4, 0 // 408 MHz.
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CLK_RST_CONTROLLER_RST_DEVICES_Y, CLK_RST_CONTROLLER_CLK_OUT_ENB_Y, CLK_RST_CONTROLLER_CLK_SOURCE_NVJPG, CLK_Y_NVJPG, 4, 0 // 408 MHz.
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};
|
||||
static clock_t _clock_sor_safe = {
|
||||
CLK_RST_CONTROLLER_RST_DEVICES_Y, CLK_RST_CONTROLLER_CLK_OUT_ENB_Y, CLK_NO_SOURCE, CLK_Y_SOR_SAFE, 0, 0
|
||||
|
|
|
@ -157,6 +157,8 @@
|
|||
#define CLK_RST_CONTROLLER_CLK_SOURCE_EMC_DLL 0x664
|
||||
#define CLK_RST_CONTROLLER_CLK_SOURCE_UART_FST_MIPI_CAL 0x66C
|
||||
#define CLK_RST_CONTROLLER_CLK_SOURCE_SDMMC_LEGACY_TM 0x694
|
||||
#define CLK_RST_CONTROLLER_CLK_SOURCE_NVDEC 0x698
|
||||
#define CLK_RST_CONTROLLER_CLK_SOURCE_NVJPG 0x69C
|
||||
#define CLK_RST_CONTROLLER_CLK_SOURCE_NVENC 0x6A0
|
||||
#define CLK_RST_CONTROLLER_CLK_SOURCE_APE 0x6C0
|
||||
#define CLK_RST_CONTROLLER_CLK_SOURCE_USB2_HSIC_TRK 0x6CC
|
||||
|
|
|
@ -43,18 +43,24 @@ void uart_init(u32 idx, u32 baud, u32 mode)
|
|||
uart->UART_LCR = UART_LCR_DLAB | UART_LCR_WORD_LENGTH_8; // Enable DLAB & set 8n1 mode.
|
||||
uart->UART_THR_DLAB = (u8)div; // Divisor latch LSB.
|
||||
uart->UART_IER_DLAB = (u8)(div >> 8); // Divisor latch MSB.
|
||||
|
||||
// Disable DLAB and set STOP bits setting if applicable.
|
||||
uart->UART_LCR = uart_lcr_stop | UART_LCR_WORD_LENGTH_8;
|
||||
(void)uart->UART_SPR;
|
||||
|
||||
// Setup and flush fifo.
|
||||
// Enable fifo.
|
||||
uart->UART_IIR_FCR = UART_IIR_FCR_EN_FIFO;
|
||||
(void)uart->UART_SPR;
|
||||
usleep(20);
|
||||
uart->UART_MCR = 0; // Disable hardware flow control.
|
||||
|
||||
// Disable hardware flow control.
|
||||
uart->UART_MCR = 0;
|
||||
usleep(96);
|
||||
|
||||
// Clear tx/rx fifos.
|
||||
uart->UART_IIR_FCR = UART_IIR_FCR_EN_FIFO | UART_IIR_FCR_TX_CLR | UART_IIR_FCR_RX_CLR;
|
||||
|
||||
// Set hardware flow control.
|
||||
uart->UART_MCR = mode;
|
||||
|
||||
// Wait 3 symbols for baudrate change.
|
||||
|
|
|
@ -497,13 +497,12 @@ static void _mmc_storage_parse_ext_csd(sdmmc_storage_t *storage, u8 *buf)
|
|||
storage->ext_csd.dev_life_est_a = buf[EXT_CSD_DEVICE_LIFE_TIME_EST_TYP_A];
|
||||
storage->ext_csd.dev_life_est_b = buf[EXT_CSD_DEVICE_LIFE_TIME_EST_TYP_B];
|
||||
|
||||
storage->ext_csd.cache_size =
|
||||
buf[EXT_CSD_CACHE_SIZE] |
|
||||
storage->ext_csd.cache_size = buf[EXT_CSD_CACHE_SIZE] |
|
||||
(buf[EXT_CSD_CACHE_SIZE + 1] << 8) |
|
||||
(buf[EXT_CSD_CACHE_SIZE + 2] << 16) |
|
||||
(buf[EXT_CSD_CACHE_SIZE + 3] << 24);
|
||||
storage->ext_csd.max_enh_mult =
|
||||
(buf[EXT_CSD_MAX_ENH_SIZE_MULT] |
|
||||
|
||||
storage->ext_csd.max_enh_mult = (buf[EXT_CSD_MAX_ENH_SIZE_MULT] |
|
||||
(buf[EXT_CSD_MAX_ENH_SIZE_MULT + 1] << 8) |
|
||||
(buf[EXT_CSD_MAX_ENH_SIZE_MULT + 2] << 16)) *
|
||||
buf[EXT_CSD_HC_WP_GRP_SIZE] * buf[EXT_CSD_HC_ERASE_GRP_SIZE];
|
||||
|
|
|
@ -173,8 +173,8 @@ static void _sdmmc_pad_config_fallback(sdmmc_t *sdmmc, u32 power)
|
|||
break;
|
||||
|
||||
case SDMMC_4: // 50 Ohm 2X Driver. PU:16, PD:16, B01: PU:10, PD:10.
|
||||
APB_MISC(APB_MISC_GP_EMMC4_PAD_CFGPADCTRL) =
|
||||
(APB_MISC(APB_MISC_GP_EMMC4_PAD_CFGPADCTRL) & 0xFFFFC003) | (sdmmc->t210b01 ? 0xA28 : 0x1040);
|
||||
APB_MISC(APB_MISC_GP_EMMC4_PAD_CFGPADCTRL) = (APB_MISC(APB_MISC_GP_EMMC4_PAD_CFGPADCTRL) & 0xFFFFC003) |
|
||||
(sdmmc->t210b01 ? 0xA28 : 0x1040);
|
||||
(void)APB_MISC(APB_MISC_GP_EMMC4_PAD_CFGPADCTRL); // Commit write.
|
||||
break;
|
||||
}
|
||||
|
|
|
@ -78,8 +78,8 @@ void set_fan_duty(u32 duty)
|
|||
regulator_5v_disable(REGULATOR_5V_FAN);
|
||||
|
||||
// Disable fan.
|
||||
PINMUX_AUX(PINMUX_AUX_LCD_GPIO2) =
|
||||
PINMUX_INPUT_ENABLE | PINMUX_PARKED | PINMUX_TRISTATE | PINMUX_PULL_DOWN; // Set source to PWM1.
|
||||
PINMUX_AUX(PINMUX_AUX_LCD_GPIO2) = PINMUX_INPUT_ENABLE | PINMUX_PARKED |
|
||||
PINMUX_TRISTATE | PINMUX_PULL_DOWN; // Set source to PWM1.
|
||||
}
|
||||
else // Set PWM duty.
|
||||
{
|
||||
|
|
|
@ -283,40 +283,40 @@ static void raise_exception(usbd_gadget_ums_t *ums, enum ums_state new_state)
|
|||
}
|
||||
}
|
||||
|
||||
static void ums_handle_ep0_ctrl(usbd_gadget_ums_t *ums)
|
||||
static void _handle_ep0_ctrl(usbd_gadget_ums_t *ums)
|
||||
{
|
||||
if (usb_ops.usbd_handle_ep0_ctrl_setup())
|
||||
raise_exception(ums, UMS_STATE_PROTOCOL_RESET);
|
||||
}
|
||||
|
||||
static int ums_wedge_bulk_in_endpoint(usbd_gadget_ums_t *ums)
|
||||
static int _wedge_bulk_in_endpoint(usbd_gadget_ums_t *ums)
|
||||
{
|
||||
/* usbd_set_ep_wedge(bulk_ctxt->bulk_in); */
|
||||
|
||||
return UMS_RES_OK;
|
||||
}
|
||||
|
||||
static int ums_set_stall(u32 ep)
|
||||
static int _set_ep_stall(u32 ep)
|
||||
{
|
||||
usb_ops.usbd_set_ep_stall(ep, USB_EP_CFG_STALL);
|
||||
|
||||
return UMS_RES_OK;
|
||||
}
|
||||
|
||||
static int ums_clear_stall(u32 ep)
|
||||
static int _clear_ep_stall(u32 ep)
|
||||
{
|
||||
usb_ops.usbd_set_ep_stall(ep, USB_EP_CFG_CLEAR);
|
||||
|
||||
return UMS_RES_OK;
|
||||
}
|
||||
|
||||
static void ums_flush_endpoint(u32 ep)
|
||||
static void _flush_endpoint(u32 ep)
|
||||
{
|
||||
if (usb_ops.usbd_flush_endpoint)
|
||||
usb_ops.usbd_flush_endpoint(ep);
|
||||
}
|
||||
|
||||
static void _ums_transfer_start(usbd_gadget_ums_t *ums, bulk_ctxt_t *bulk_ctxt, u32 ep, u32 sync_timeout)
|
||||
static void _transfer_start(usbd_gadget_ums_t *ums, bulk_ctxt_t *bulk_ctxt, u32 ep, u32 sync_timeout)
|
||||
{
|
||||
if (ep == bulk_ctxt->bulk_in)
|
||||
{
|
||||
|
@ -327,7 +327,7 @@ static void _ums_transfer_start(usbd_gadget_ums_t *ums, bulk_ctxt_t *bulk_ctxt,
|
|||
if (bulk_ctxt->bulk_in_status == USB_ERROR_XFER_ERROR)
|
||||
{
|
||||
ums->set_text(ums->label, "#FFDD00 Error:# EP IN transfer!");
|
||||
ums_flush_endpoint(bulk_ctxt->bulk_in);
|
||||
_flush_endpoint(bulk_ctxt->bulk_in);
|
||||
}
|
||||
else if (bulk_ctxt->bulk_in_status == USB2_ERROR_XFER_NOT_ALIGNED)
|
||||
ums->set_text(ums->label, "#FFDD00 Error:# EP IN Buffer not aligned!");
|
||||
|
@ -344,7 +344,7 @@ static void _ums_transfer_start(usbd_gadget_ums_t *ums, bulk_ctxt_t *bulk_ctxt,
|
|||
if (bulk_ctxt->bulk_out_status == USB_ERROR_XFER_ERROR)
|
||||
{
|
||||
ums->set_text(ums->label, "#FFDD00 Error:# EP OUT transfer!");
|
||||
ums_flush_endpoint(bulk_ctxt->bulk_out);
|
||||
_flush_endpoint(bulk_ctxt->bulk_out);
|
||||
}
|
||||
else if (bulk_ctxt->bulk_out_status == USB2_ERROR_XFER_NOT_ALIGNED)
|
||||
ums->set_text(ums->label, "#FFDD00 Error:# EP OUT Buffer not aligned!");
|
||||
|
@ -354,7 +354,7 @@ static void _ums_transfer_start(usbd_gadget_ums_t *ums, bulk_ctxt_t *bulk_ctxt,
|
|||
}
|
||||
}
|
||||
|
||||
static void _ums_transfer_out_big_read(usbd_gadget_ums_t *ums, bulk_ctxt_t *bulk_ctxt)
|
||||
static void _transfer_out_big_read(usbd_gadget_ums_t *ums, bulk_ctxt_t *bulk_ctxt)
|
||||
{
|
||||
bulk_ctxt->bulk_out_status = usb_ops.usb_device_ep1_out_read_big(
|
||||
bulk_ctxt->bulk_out_buf, bulk_ctxt->bulk_out_length,
|
||||
|
@ -363,13 +363,13 @@ static void _ums_transfer_out_big_read(usbd_gadget_ums_t *ums, bulk_ctxt_t *bulk
|
|||
if (bulk_ctxt->bulk_out_status == USB_ERROR_XFER_ERROR)
|
||||
{
|
||||
ums->set_text(ums->label, "#FFDD00 Error:# EP OUT transfer!");
|
||||
ums_flush_endpoint(bulk_ctxt->bulk_out);
|
||||
_flush_endpoint(bulk_ctxt->bulk_out);
|
||||
}
|
||||
|
||||
bulk_ctxt->bulk_out_buf_state = BUF_STATE_FULL;
|
||||
}
|
||||
|
||||
static void _ums_transfer_finish(usbd_gadget_ums_t *ums, bulk_ctxt_t *bulk_ctxt, u32 ep, u32 sync_timeout)
|
||||
static void _transfer_finish(usbd_gadget_ums_t *ums, bulk_ctxt_t *bulk_ctxt, u32 ep, u32 sync_timeout)
|
||||
{
|
||||
if (ep == bulk_ctxt->bulk_in)
|
||||
{
|
||||
|
@ -379,7 +379,7 @@ static void _ums_transfer_finish(usbd_gadget_ums_t *ums, bulk_ctxt_t *bulk_ctxt,
|
|||
if (bulk_ctxt->bulk_in_status == USB_ERROR_XFER_ERROR)
|
||||
{
|
||||
ums->set_text(ums->label, "#FFDD00 Error:# EP IN transfer!");
|
||||
ums_flush_endpoint(bulk_ctxt->bulk_in);
|
||||
_flush_endpoint(bulk_ctxt->bulk_in);
|
||||
}
|
||||
|
||||
bulk_ctxt->bulk_in_buf_state = BUF_STATE_EMPTY;
|
||||
|
@ -392,14 +392,14 @@ static void _ums_transfer_finish(usbd_gadget_ums_t *ums, bulk_ctxt_t *bulk_ctxt,
|
|||
if (bulk_ctxt->bulk_out_status == USB_ERROR_XFER_ERROR)
|
||||
{
|
||||
ums->set_text(ums->label, "#FFDD00 Error:# EP OUT transfer!");
|
||||
ums_flush_endpoint(bulk_ctxt->bulk_out);
|
||||
_flush_endpoint(bulk_ctxt->bulk_out);
|
||||
}
|
||||
|
||||
bulk_ctxt->bulk_out_buf_state = BUF_STATE_FULL;
|
||||
}
|
||||
}
|
||||
|
||||
static void _ums_reset_buffer(bulk_ctxt_t *bulk_ctxt, u32 ep)
|
||||
static void _reset_buffer(bulk_ctxt_t *bulk_ctxt, u32 ep)
|
||||
{
|
||||
if (ep == bulk_ctxt->bulk_in)
|
||||
bulk_ctxt->bulk_in_buf = (u8 *)USB_EP_BULK_IN_BUF_ADDR;
|
||||
|
@ -488,6 +488,7 @@ static int _scsi_read(usbd_gadget_ums_t *ums, bulk_ctxt_t *bulk_ctxt)
|
|||
ums->lun.sense_data = SS_LOGICAL_BLOCK_ADDRESS_OUT_OF_RANGE;
|
||||
ums->lun.sense_data_info = lba_offset;
|
||||
ums->lun.info_valid = 1;
|
||||
|
||||
bulk_ctxt->bulk_in_length = 0;
|
||||
bulk_ctxt->bulk_in_buf_state = BUF_STATE_FULL;
|
||||
break;
|
||||
|
@ -499,7 +500,7 @@ static int _scsi_read(usbd_gadget_ums_t *ums, bulk_ctxt_t *bulk_ctxt)
|
|||
|
||||
// Wait for the async USB transfer to finish.
|
||||
if (!first_read)
|
||||
_ums_transfer_finish(ums, bulk_ctxt, bulk_ctxt->bulk_in, USB_XFER_SYNCED);
|
||||
_transfer_finish(ums, bulk_ctxt, bulk_ctxt->bulk_in, USB_XFER_SYNCED);
|
||||
|
||||
lba_offset += amount;
|
||||
amount_left -= amount;
|
||||
|
@ -524,7 +525,7 @@ static int _scsi_read(usbd_gadget_ums_t *ums, bulk_ctxt_t *bulk_ctxt)
|
|||
break;
|
||||
|
||||
// Start the USB transfer.
|
||||
_ums_transfer_start(ums, bulk_ctxt, bulk_ctxt->bulk_in, USB_XFER_START);
|
||||
_transfer_start(ums, bulk_ctxt, bulk_ctxt->bulk_in, USB_XFER_START);
|
||||
first_read = false;
|
||||
|
||||
// Increment our buffer to read new data.
|
||||
|
@ -610,7 +611,7 @@ static int _scsi_write(usbd_gadget_ums_t *ums, bulk_ctxt_t *bulk_ctxt)
|
|||
|
||||
bulk_ctxt->bulk_out_length = amount;
|
||||
|
||||
_ums_transfer_out_big_read(ums, bulk_ctxt);
|
||||
_transfer_out_big_read(ums, bulk_ctxt);
|
||||
}
|
||||
|
||||
if (bulk_ctxt->bulk_out_buf_state == BUF_STATE_FULL)
|
||||
|
@ -623,6 +624,7 @@ static int _scsi_write(usbd_gadget_ums_t *ums, bulk_ctxt_t *bulk_ctxt)
|
|||
ums->lun.sense_data = SS_COMMUNICATION_FAILURE;
|
||||
ums->lun.sense_data_info = lba_offset;
|
||||
ums->lun.info_valid = 1;
|
||||
|
||||
s_printf(txt_buf, "#FFDD00 Error:# Write - Comm failure %d!", bulk_ctxt->bulk_out_status);
|
||||
ums->set_text(ums->label, txt_buf);
|
||||
break;
|
||||
|
@ -1116,8 +1118,9 @@ static int _scsi_read_format_capacities(usbd_gadget_ums_t *ums, bulk_ctxt_t *bul
|
|||
|
||||
// Check whether the command is properly formed and whether its data size
|
||||
// and direction agree with the values we already have.
|
||||
static int _ums_check_scsi_cmd(usbd_gadget_ums_t *ums, u32 cmnd_size,
|
||||
enum data_direction data_dir, u32 mask, int needs_medium)
|
||||
static int _check_scsi_cmd(usbd_gadget_ums_t *ums, u32 cmnd_size,
|
||||
enum data_direction data_dir, u32 mask,
|
||||
int needs_medium)
|
||||
{
|
||||
//const char dirletter[4] = {'u', 'o', 'i', 'n'};
|
||||
DPRINTF("SCSI command: %X; Dc=%d, D%c=%X; Hc=%d, H%c=%X\n",
|
||||
|
@ -1204,7 +1207,7 @@ DPRINTF("SCSI command: %X; Dc=%d, D%c=%X; Hc=%d, H%c=%X\n",
|
|||
return UMS_RES_OK;
|
||||
}
|
||||
|
||||
static int _ums_parse_scsi_cmd(usbd_gadget_ums_t *ums, bulk_ctxt_t *bulk_ctxt)
|
||||
static int _parse_scsi_cmd(usbd_gadget_ums_t *ums, bulk_ctxt_t *bulk_ctxt)
|
||||
{
|
||||
u32 len;
|
||||
int reply = UMS_RES_INVALID_ARG;
|
||||
|
@ -1219,21 +1222,21 @@ static int _ums_parse_scsi_cmd(usbd_gadget_ums_t *ums, bulk_ctxt_t *bulk_ctxt)
|
|||
u32 mask = (1<<4);
|
||||
if (ums->cmnd[1] == 1 && ums->cmnd[2] == 0x80) // Inquiry S/N.
|
||||
mask = (1<<1) | (1<<2) | (1<<4);
|
||||
reply = _ums_check_scsi_cmd(ums, 6, DATA_DIR_TO_HOST, mask, 0);
|
||||
reply = _check_scsi_cmd(ums, 6, DATA_DIR_TO_HOST, mask, 0);
|
||||
if (reply == 0)
|
||||
reply = _scsi_inquiry(ums, bulk_ctxt);
|
||||
break;
|
||||
|
||||
case SC_LOG_SENSE:
|
||||
ums->data_size_from_cmnd = get_array_be_to_le16(&ums->cmnd[7]);
|
||||
reply = _ums_check_scsi_cmd(ums, 10, DATA_DIR_TO_HOST, (1<<1) | (1<<2) | (3<<7), 0);
|
||||
reply = _check_scsi_cmd(ums, 10, DATA_DIR_TO_HOST, (1<<1) | (1<<2) | (3<<7), 0);
|
||||
if (reply == 0)
|
||||
reply = _scsi_log_sense(ums, bulk_ctxt);
|
||||
break;
|
||||
|
||||
case SC_MODE_SELECT_6:
|
||||
ums->data_size_from_cmnd = ums->cmnd[4];
|
||||
reply = _ums_check_scsi_cmd(ums, 6, DATA_DIR_FROM_HOST, (1<<1) | (1<<4), 0);
|
||||
reply = _check_scsi_cmd(ums, 6, DATA_DIR_FROM_HOST, (1<<1) | (1<<4), 0);
|
||||
if (reply == 0)
|
||||
{
|
||||
// We don't support MODE SELECT.
|
||||
|
@ -1244,7 +1247,7 @@ static int _ums_parse_scsi_cmd(usbd_gadget_ums_t *ums, bulk_ctxt_t *bulk_ctxt)
|
|||
|
||||
case SC_MODE_SELECT_10:
|
||||
ums->data_size_from_cmnd = get_array_be_to_le16(&ums->cmnd[7]);
|
||||
reply = _ums_check_scsi_cmd(ums, 10, DATA_DIR_FROM_HOST, (1<<1) | (3<<7), 0);
|
||||
reply = _check_scsi_cmd(ums, 10, DATA_DIR_FROM_HOST, (1<<1) | (3<<7), 0);
|
||||
if (reply == 0)
|
||||
{
|
||||
// We don't support MODE SELECT.
|
||||
|
@ -1255,21 +1258,21 @@ static int _ums_parse_scsi_cmd(usbd_gadget_ums_t *ums, bulk_ctxt_t *bulk_ctxt)
|
|||
|
||||
case SC_MODE_SENSE_6:
|
||||
ums->data_size_from_cmnd = ums->cmnd[4];
|
||||
reply = _ums_check_scsi_cmd(ums, 6, DATA_DIR_TO_HOST, (1<<1) | (1<<2) | (1<<4), 0);
|
||||
reply = _check_scsi_cmd(ums, 6, DATA_DIR_TO_HOST, (1<<1) | (1<<2) | (1<<4), 0);
|
||||
if (reply == 0)
|
||||
reply = _scsi_mode_sense(ums, bulk_ctxt);
|
||||
break;
|
||||
|
||||
case SC_MODE_SENSE_10:
|
||||
ums->data_size_from_cmnd = get_array_be_to_le16(&ums->cmnd[7]);
|
||||
reply = _ums_check_scsi_cmd(ums, 10, DATA_DIR_TO_HOST, (1<<1) | (1<<2) | (3<<7), 0);
|
||||
reply = _check_scsi_cmd(ums, 10, DATA_DIR_TO_HOST, (1<<1) | (1<<2) | (3<<7), 0);
|
||||
if (reply == 0)
|
||||
reply = _scsi_mode_sense(ums, bulk_ctxt);
|
||||
break;
|
||||
|
||||
case SC_PREVENT_ALLOW_MEDIUM_REMOVAL:
|
||||
ums->data_size_from_cmnd = 0;
|
||||
reply = _ums_check_scsi_cmd(ums, 6, DATA_DIR_NONE, (1<<4), 0);
|
||||
reply = _check_scsi_cmd(ums, 6, DATA_DIR_NONE, (1<<4), 0);
|
||||
if (reply == 0)
|
||||
reply = _scsi_prevent_allow_removal(ums);
|
||||
break;
|
||||
|
@ -1277,68 +1280,68 @@ static int _ums_parse_scsi_cmd(usbd_gadget_ums_t *ums, bulk_ctxt_t *bulk_ctxt)
|
|||
case SC_READ_6:
|
||||
len = ums->cmnd[4];
|
||||
ums->data_size_from_cmnd = (len == 0 ? 256 : len) << UMS_DISK_LBA_SHIFT;
|
||||
reply = _ums_check_scsi_cmd(ums, 6, DATA_DIR_TO_HOST, (7<<1) | (1<<4), 1);
|
||||
reply = _check_scsi_cmd(ums, 6, DATA_DIR_TO_HOST, (7<<1) | (1<<4), 1);
|
||||
if (reply == 0)
|
||||
reply = _scsi_read(ums, bulk_ctxt);
|
||||
break;
|
||||
|
||||
case SC_READ_10:
|
||||
ums->data_size_from_cmnd = get_array_be_to_le16(&ums->cmnd[7]) << UMS_DISK_LBA_SHIFT;
|
||||
reply = _ums_check_scsi_cmd(ums, 10, DATA_DIR_TO_HOST, (1<<1) | (0xf<<2) | (3<<7), 1);
|
||||
reply = _check_scsi_cmd(ums, 10, DATA_DIR_TO_HOST, (1<<1) | (0xf<<2) | (3<<7), 1);
|
||||
if (reply == 0)
|
||||
reply = _scsi_read(ums, bulk_ctxt);
|
||||
break;
|
||||
|
||||
case SC_READ_12:
|
||||
ums->data_size_from_cmnd = get_array_be_to_le32(&ums->cmnd[6]) << UMS_DISK_LBA_SHIFT;
|
||||
reply = _ums_check_scsi_cmd(ums, 12, DATA_DIR_TO_HOST, (1<<1) | (0xf<<2) | (0xf<<6), 1);
|
||||
reply = _check_scsi_cmd(ums, 12, DATA_DIR_TO_HOST, (1<<1) | (0xf<<2) | (0xf<<6), 1);
|
||||
if (reply == 0)
|
||||
reply = _scsi_read(ums, bulk_ctxt);
|
||||
break;
|
||||
|
||||
case SC_READ_CAPACITY:
|
||||
ums->data_size_from_cmnd = 8;
|
||||
reply = _ums_check_scsi_cmd(ums, 10, DATA_DIR_TO_HOST, (0xf<<2) | (1<<8), 1);
|
||||
reply = _check_scsi_cmd(ums, 10, DATA_DIR_TO_HOST, (0xf<<2) | (1<<8), 1);
|
||||
if (reply == 0)
|
||||
reply = _scsi_read_capacity(ums, bulk_ctxt);
|
||||
break;
|
||||
case SC_READ_FORMAT_CAPACITIES:
|
||||
ums->data_size_from_cmnd = get_array_be_to_le16(&ums->cmnd[7]);
|
||||
reply = _ums_check_scsi_cmd(ums, 10, DATA_DIR_TO_HOST, (3<<7), 1);
|
||||
reply = _check_scsi_cmd(ums, 10, DATA_DIR_TO_HOST, (3<<7), 1);
|
||||
if (reply == 0)
|
||||
reply = _scsi_read_format_capacities(ums, bulk_ctxt);
|
||||
break;
|
||||
|
||||
case SC_REQUEST_SENSE:
|
||||
ums->data_size_from_cmnd = ums->cmnd[4];
|
||||
reply = _ums_check_scsi_cmd(ums, 6, DATA_DIR_TO_HOST, (1<<4), 0);
|
||||
reply = _check_scsi_cmd(ums, 6, DATA_DIR_TO_HOST, (1<<4), 0);
|
||||
if (reply == 0)
|
||||
reply = _scsi_request_sense(ums, bulk_ctxt);
|
||||
break;
|
||||
|
||||
case SC_START_STOP_UNIT:
|
||||
ums->data_size_from_cmnd = 0;
|
||||
reply = _ums_check_scsi_cmd(ums, 6, DATA_DIR_NONE, (1<<1) | (1<<4), 0);
|
||||
reply = _check_scsi_cmd(ums, 6, DATA_DIR_NONE, (1<<1) | (1<<4), 0);
|
||||
if (reply == 0)
|
||||
reply = _scsi_start_stop(ums);
|
||||
break;
|
||||
|
||||
case SC_SYNCHRONIZE_CACHE:
|
||||
ums->data_size_from_cmnd = 0;
|
||||
reply = _ums_check_scsi_cmd(ums, 10, DATA_DIR_NONE, (0xf<<2) | (3<<7), 1);
|
||||
reply = _check_scsi_cmd(ums, 10, DATA_DIR_NONE, (0xf<<2) | (3<<7), 1);
|
||||
if (reply == 0)
|
||||
reply = 0; // Don't bother
|
||||
break;
|
||||
|
||||
case SC_TEST_UNIT_READY:
|
||||
ums->data_size_from_cmnd = 0;
|
||||
reply = _ums_check_scsi_cmd(ums, 6, DATA_DIR_NONE, 0, 1);
|
||||
reply = _check_scsi_cmd(ums, 6, DATA_DIR_NONE, 0, 1);
|
||||
break;
|
||||
|
||||
// This command is used by Windows. We support a minimal version and BytChk must be 0.
|
||||
case SC_VERIFY:
|
||||
ums->data_size_from_cmnd = 0;
|
||||
reply = _ums_check_scsi_cmd(ums, 10, DATA_DIR_NONE, (1<<1) | (0xf<<2) | (3<<7), 1);
|
||||
reply = _check_scsi_cmd(ums, 10, DATA_DIR_NONE, (1<<1) | (0xf<<2) | (3<<7), 1);
|
||||
if (reply == 0)
|
||||
reply = _scsi_verify(ums, bulk_ctxt);
|
||||
break;
|
||||
|
@ -1346,21 +1349,21 @@ static int _ums_parse_scsi_cmd(usbd_gadget_ums_t *ums, bulk_ctxt_t *bulk_ctxt)
|
|||
case SC_WRITE_6:
|
||||
len = ums->cmnd[4];
|
||||
ums->data_size_from_cmnd = (len == 0 ? 256 : len) << UMS_DISK_LBA_SHIFT;
|
||||
reply = _ums_check_scsi_cmd(ums, 6, DATA_DIR_FROM_HOST, (7<<1) | (1<<4), 1);
|
||||
reply = _check_scsi_cmd(ums, 6, DATA_DIR_FROM_HOST, (7<<1) | (1<<4), 1);
|
||||
if (reply == 0)
|
||||
reply = _scsi_write(ums, bulk_ctxt);
|
||||
break;
|
||||
|
||||
case SC_WRITE_10:
|
||||
ums->data_size_from_cmnd = get_array_be_to_le16(&ums->cmnd[7]) << UMS_DISK_LBA_SHIFT;
|
||||
reply = _ums_check_scsi_cmd(ums, 10, DATA_DIR_FROM_HOST, (1<<1) | (0xf<<2) | (3<<7), 1);
|
||||
reply = _check_scsi_cmd(ums, 10, DATA_DIR_FROM_HOST, (1<<1) | (0xf<<2) | (3<<7), 1);
|
||||
if (reply == 0)
|
||||
reply = _scsi_write(ums, bulk_ctxt);
|
||||
break;
|
||||
|
||||
case SC_WRITE_12:
|
||||
ums->data_size_from_cmnd = get_array_be_to_le32(&ums->cmnd[6]) << UMS_DISK_LBA_SHIFT;
|
||||
reply = _ums_check_scsi_cmd(ums, 12, DATA_DIR_FROM_HOST, (1<<1) | (0xf<<2) | (0xf<<6), 1);
|
||||
reply = _check_scsi_cmd(ums, 12, DATA_DIR_FROM_HOST, (1<<1) | (0xf<<2) | (0xf<<6), 1);
|
||||
if (reply == 0)
|
||||
reply = _scsi_write(ums, bulk_ctxt);
|
||||
break;
|
||||
|
@ -1374,7 +1377,7 @@ static int _ums_parse_scsi_cmd(usbd_gadget_ums_t *ums, bulk_ctxt_t *bulk_ctxt)
|
|||
case SC_SEND_DIAGNOSTIC:
|
||||
default:
|
||||
ums->data_size_from_cmnd = 0;
|
||||
reply = _ums_check_scsi_cmd(ums, ums->cmnd_size, DATA_DIR_UNKNOWN, 0xFF, 0);
|
||||
reply = _check_scsi_cmd(ums, ums->cmnd_size, DATA_DIR_UNKNOWN, 0xFF, 0);
|
||||
if (reply == 0)
|
||||
{
|
||||
ums->lun.sense_data = SS_INVALID_COMMAND;
|
||||
|
@ -1386,7 +1389,7 @@ static int _ums_parse_scsi_cmd(usbd_gadget_ums_t *ums, bulk_ctxt_t *bulk_ctxt)
|
|||
if (reply == UMS_RES_INVALID_ARG)
|
||||
reply = 0; // Error reply length.
|
||||
|
||||
// Set up reply buffer for finish_reply(). Otherwise it's already set.
|
||||
// Set up reply buffer for _finish_reply(). Otherwise it's already set.
|
||||
if (reply >= 0 && ums->data_dir == DATA_DIR_TO_HOST)
|
||||
{
|
||||
reply = MIN((u32)reply, ums->data_size_from_cmnd);
|
||||
|
@ -1398,7 +1401,7 @@ static int _ums_parse_scsi_cmd(usbd_gadget_ums_t *ums, bulk_ctxt_t *bulk_ctxt)
|
|||
return UMS_RES_OK;
|
||||
}
|
||||
|
||||
static int pad_with_zeros(usbd_gadget_ums_t *ums, bulk_ctxt_t *bulk_ctxt)
|
||||
static int _pad_with_zeros(usbd_gadget_ums_t *ums, bulk_ctxt_t *bulk_ctxt)
|
||||
{
|
||||
bulk_ctxt->bulk_in_buf_state = BUF_STATE_EMPTY; // For the first iteration.
|
||||
u32 current_len_to_keep = bulk_ctxt->bulk_in_length;
|
||||
|
@ -1409,7 +1412,7 @@ static int pad_with_zeros(usbd_gadget_ums_t *ums, bulk_ctxt_t *bulk_ctxt)
|
|||
u32 nsend = MIN(ums->usb_amount_left, USB_EP_BUFFER_MAX_SIZE);
|
||||
memset(bulk_ctxt->bulk_in_buf + current_len_to_keep, 0, nsend - current_len_to_keep);
|
||||
bulk_ctxt->bulk_in_length = nsend;
|
||||
_ums_transfer_start(ums, bulk_ctxt, bulk_ctxt->bulk_in, USB_XFER_SYNCED_DATA);
|
||||
_transfer_start(ums, bulk_ctxt, bulk_ctxt->bulk_in, USB_XFER_SYNCED_DATA);
|
||||
ums->usb_amount_left -= nsend;
|
||||
current_len_to_keep = 0;
|
||||
}
|
||||
|
@ -1417,7 +1420,7 @@ static int pad_with_zeros(usbd_gadget_ums_t *ums, bulk_ctxt_t *bulk_ctxt)
|
|||
return UMS_RES_OK;
|
||||
}
|
||||
|
||||
static int throw_away_data(usbd_gadget_ums_t *ums, bulk_ctxt_t *bulk_ctxt)
|
||||
static int _throw_away_data(usbd_gadget_ums_t *ums, bulk_ctxt_t *bulk_ctxt)
|
||||
{
|
||||
if (bulk_ctxt->bulk_out_buf_state != BUF_STATE_EMPTY || ums->usb_amount_left > 0)
|
||||
{
|
||||
|
@ -1427,7 +1430,7 @@ static int throw_away_data(usbd_gadget_ums_t *ums, bulk_ctxt_t *bulk_ctxt)
|
|||
u32 amount = MIN(ums->usb_amount_left, USB_EP_BUFFER_MAX_SIZE);
|
||||
|
||||
bulk_ctxt->bulk_out_length = amount;
|
||||
_ums_transfer_start(ums, bulk_ctxt, bulk_ctxt->bulk_out, USB_XFER_SYNCED_DATA);
|
||||
_transfer_start(ums, bulk_ctxt, bulk_ctxt->bulk_out, USB_XFER_SYNCED_DATA);
|
||||
ums->usb_amount_left -= amount;
|
||||
|
||||
return UMS_RES_OK;
|
||||
|
@ -1448,7 +1451,7 @@ static int throw_away_data(usbd_gadget_ums_t *ums, bulk_ctxt_t *bulk_ctxt)
|
|||
return UMS_RES_OK;
|
||||
}
|
||||
|
||||
static int finish_reply(usbd_gadget_ums_t *ums, bulk_ctxt_t *bulk_ctxt)
|
||||
static int _finish_reply(usbd_gadget_ums_t *ums, bulk_ctxt_t *bulk_ctxt)
|
||||
{
|
||||
int rc = UMS_RES_OK;
|
||||
|
||||
|
@ -1461,8 +1464,8 @@ static int finish_reply(usbd_gadget_ums_t *ums, bulk_ctxt_t *bulk_ctxt)
|
|||
case DATA_DIR_UNKNOWN:
|
||||
if (ums->can_stall)
|
||||
{
|
||||
ums_set_stall(bulk_ctxt->bulk_out);
|
||||
rc = ums_set_stall(bulk_ctxt->bulk_in);
|
||||
_set_ep_stall(bulk_ctxt->bulk_out);
|
||||
rc = _set_ep_stall(bulk_ctxt->bulk_in);
|
||||
ums->set_text(ums->label, "#FFDD00 Error:# Direction unknown. Stalled both EP!");
|
||||
} // Else do nothing.
|
||||
break;
|
||||
|
@ -1474,7 +1477,7 @@ static int finish_reply(usbd_gadget_ums_t *ums, bulk_ctxt_t *bulk_ctxt)
|
|||
// If there's no residue, simply send the last buffer.
|
||||
if (!ums->residue)
|
||||
{
|
||||
_ums_transfer_start(ums, bulk_ctxt, bulk_ctxt->bulk_in, USB_XFER_SYNCED_DATA);
|
||||
_transfer_start(ums, bulk_ctxt, bulk_ctxt->bulk_in, USB_XFER_SYNCED_DATA);
|
||||
|
||||
/* For Bulk-only, if we're allowed to stall then send the
|
||||
* short packet and halt the bulk-in endpoint. If we can't
|
||||
|
@ -1482,16 +1485,16 @@ static int finish_reply(usbd_gadget_ums_t *ums, bulk_ctxt_t *bulk_ctxt)
|
|||
}
|
||||
else if (ums->can_stall)
|
||||
{
|
||||
_ums_transfer_start(ums, bulk_ctxt, bulk_ctxt->bulk_in, USB_XFER_SYNCED_DATA);
|
||||
rc = ums_set_stall(bulk_ctxt->bulk_in);
|
||||
_transfer_start(ums, bulk_ctxt, bulk_ctxt->bulk_in, USB_XFER_SYNCED_DATA);
|
||||
rc = _set_ep_stall(bulk_ctxt->bulk_in);
|
||||
ums->set_text(ums->label, "#FFDD00 Error:# Residue. Stalled EP IN!");
|
||||
}
|
||||
else
|
||||
rc = pad_with_zeros(ums, bulk_ctxt);
|
||||
rc = _pad_with_zeros(ums, bulk_ctxt);
|
||||
}
|
||||
|
||||
// In case we used SDMMC transfer, reset the buffer address.
|
||||
_ums_reset_buffer(bulk_ctxt, bulk_ctxt->bulk_in);
|
||||
_reset_buffer(bulk_ctxt, bulk_ctxt->bulk_in);
|
||||
break;
|
||||
|
||||
// We have processed all we want from the data the host has sent.
|
||||
|
@ -1505,7 +1508,7 @@ static int finish_reply(usbd_gadget_ums_t *ums, bulk_ctxt_t *bulk_ctxt)
|
|||
rc = UMS_RES_PROT_FATAL;
|
||||
}
|
||||
else // We can't stall. Read in the excess data and throw it away.
|
||||
rc = throw_away_data(ums, bulk_ctxt);
|
||||
rc = _throw_away_data(ums, bulk_ctxt);
|
||||
}
|
||||
|
||||
break;
|
||||
|
@ -1540,7 +1543,7 @@ static int finish_reply(usbd_gadget_ums_t *ums, bulk_ctxt_t *bulk_ctxt)
|
|||
* Line always at SE0.
|
||||
*/
|
||||
|
||||
static int received_cbw(usbd_gadget_ums_t *ums, bulk_ctxt_t *bulk_ctxt)
|
||||
static int _received_cbw(usbd_gadget_ums_t *ums, bulk_ctxt_t *bulk_ctxt)
|
||||
{
|
||||
// Was this a real packet? Should it be ignored?
|
||||
if (bulk_ctxt->bulk_out_status || bulk_ctxt->bulk_out_ignore || ums->lun.unmounted)
|
||||
|
@ -1610,7 +1613,7 @@ static int received_cbw(usbd_gadget_ums_t *ums, bulk_ctxt_t *bulk_ctxt)
|
|||
* we can simply accept and discard any data received
|
||||
* until the next reset.
|
||||
*/
|
||||
ums_wedge_bulk_in_endpoint(ums);
|
||||
_wedge_bulk_in_endpoint(ums);
|
||||
bulk_ctxt->bulk_out_ignore = 1;
|
||||
return UMS_RES_INVALID_ARG;
|
||||
}
|
||||
|
@ -1626,8 +1629,8 @@ static int received_cbw(usbd_gadget_ums_t *ums, bulk_ctxt_t *bulk_ctxt)
|
|||
* bulk pipes if we are allowed to. */
|
||||
if (ums->can_stall)
|
||||
{
|
||||
ums_set_stall(bulk_ctxt->bulk_out);
|
||||
ums_set_stall(bulk_ctxt->bulk_in);
|
||||
_set_ep_stall(bulk_ctxt->bulk_out);
|
||||
_set_ep_stall(bulk_ctxt->bulk_in);
|
||||
ums->set_text(ums->label, "#FFDD00 Error:# CBW unknown - Stalled both EP!");
|
||||
}
|
||||
|
||||
|
@ -1657,7 +1660,7 @@ static int received_cbw(usbd_gadget_ums_t *ums, bulk_ctxt_t *bulk_ctxt)
|
|||
return UMS_RES_OK;
|
||||
}
|
||||
|
||||
static int get_next_command(usbd_gadget_ums_t *ums, bulk_ctxt_t *bulk_ctxt)
|
||||
static int _get_next_command(usbd_gadget_ums_t *ums, bulk_ctxt_t *bulk_ctxt)
|
||||
{
|
||||
int rc = UMS_RES_OK;
|
||||
|
||||
|
@ -1671,9 +1674,9 @@ static int get_next_command(usbd_gadget_ums_t *ums, bulk_ctxt_t *bulk_ctxt)
|
|||
|
||||
// Queue a request to read a Bulk-only CBW.
|
||||
if (!ums->cbw_req_queued)
|
||||
_ums_transfer_start(ums, bulk_ctxt, bulk_ctxt->bulk_out, USB_XFER_SYNCED_CMD);
|
||||
_transfer_start(ums, bulk_ctxt, bulk_ctxt->bulk_out, USB_XFER_SYNCED_CMD);
|
||||
else
|
||||
_ums_transfer_finish(ums, bulk_ctxt, bulk_ctxt->bulk_out, USB_XFER_SYNCED_CMD);
|
||||
_transfer_finish(ums, bulk_ctxt, bulk_ctxt->bulk_out, USB_XFER_SYNCED_CMD);
|
||||
|
||||
/*
|
||||
* On XUSB do not allow multiple requests for CBW to be done.
|
||||
|
@ -1694,13 +1697,13 @@ static int get_next_command(usbd_gadget_ums_t *ums, bulk_ctxt_t *bulk_ctxt)
|
|||
// //wait irq.
|
||||
// }
|
||||
|
||||
rc = received_cbw(ums, bulk_ctxt);
|
||||
rc = _received_cbw(ums, bulk_ctxt);
|
||||
bulk_ctxt->bulk_out_buf_state = BUF_STATE_EMPTY;
|
||||
|
||||
return rc;
|
||||
}
|
||||
|
||||
static void send_status(usbd_gadget_ums_t *ums, bulk_ctxt_t *bulk_ctxt)
|
||||
static void _send_status(usbd_gadget_ums_t *ums, bulk_ctxt_t *bulk_ctxt)
|
||||
{
|
||||
u8 status = USB_STATUS_PASS;
|
||||
u32 sd = ums->lun.sense_data;
|
||||
|
@ -1728,16 +1731,16 @@ static void send_status(usbd_gadget_ums_t *ums, bulk_ctxt_t *bulk_ctxt)
|
|||
csw->Status = status;
|
||||
|
||||
bulk_ctxt->bulk_in_length = USB_BULK_CS_WRAP_LEN;
|
||||
_ums_transfer_start(ums, bulk_ctxt, bulk_ctxt->bulk_in, USB_XFER_SYNCED_CMD);
|
||||
_transfer_start(ums, bulk_ctxt, bulk_ctxt->bulk_in, USB_XFER_SYNCED_CMD);
|
||||
}
|
||||
|
||||
static void handle_exception(usbd_gadget_ums_t *ums, bulk_ctxt_t *bulk_ctxt)
|
||||
static void _handle_exception(usbd_gadget_ums_t *ums, bulk_ctxt_t *bulk_ctxt)
|
||||
{
|
||||
enum ums_state old_state;
|
||||
|
||||
// Clear out the controller's fifos.
|
||||
ums_flush_endpoint(bulk_ctxt->bulk_in);
|
||||
ums_flush_endpoint(bulk_ctxt->bulk_out);
|
||||
_flush_endpoint(bulk_ctxt->bulk_in);
|
||||
_flush_endpoint(bulk_ctxt->bulk_out);
|
||||
|
||||
/* Reset the I/O buffer states and pointers, the SCSI
|
||||
* state, and the exception. Then invoke the handler. */
|
||||
|
@ -1764,7 +1767,7 @@ static void handle_exception(usbd_gadget_ums_t *ums, bulk_ctxt_t *bulk_ctxt)
|
|||
case UMS_STATE_NORMAL:
|
||||
break;
|
||||
case UMS_STATE_ABORT_BULK_OUT:
|
||||
send_status(ums, bulk_ctxt);
|
||||
_send_status(ums, bulk_ctxt);
|
||||
break;
|
||||
|
||||
case UMS_STATE_PROTOCOL_RESET:
|
||||
|
@ -1774,7 +1777,7 @@ static void handle_exception(usbd_gadget_ums_t *ums, bulk_ctxt_t *bulk_ctxt)
|
|||
if (bulk_ctxt->bulk_out_ignore)
|
||||
{
|
||||
bulk_ctxt->bulk_out_ignore = 0;
|
||||
ums_clear_stall(bulk_ctxt->bulk_in);
|
||||
_clear_ep_stall(bulk_ctxt->bulk_in);
|
||||
}
|
||||
ums->lun.unit_attention_data = SS_RESET_OCCURRED;
|
||||
break;
|
||||
|
@ -1859,15 +1862,17 @@ int usb_device_gadget_ums(usb_ctxt_t *usbs)
|
|||
sd_end();
|
||||
sd_mount();
|
||||
sd_unmount();
|
||||
|
||||
ums.lun.sdmmc = &sd_sdmmc;
|
||||
ums.lun.storage = &sd_storage;
|
||||
}
|
||||
else
|
||||
{
|
||||
ums.lun.sdmmc = &emmc_sdmmc;
|
||||
ums.lun.storage = &emmc_storage;
|
||||
emmc_initialize(false);
|
||||
sdmmc_storage_set_mmc_partition(ums.lun.storage, ums.lun.partition - 1);
|
||||
|
||||
ums.lun.sdmmc = &emmc_sdmmc;
|
||||
ums.lun.storage = &emmc_storage;
|
||||
}
|
||||
|
||||
ums.set_text(ums.label, "#C7EA46 Status:# Waiting for connection");
|
||||
|
@ -1905,26 +1910,26 @@ int usb_device_gadget_ums(usb_ctxt_t *usbs)
|
|||
|
||||
if (ums.state != UMS_STATE_NORMAL)
|
||||
{
|
||||
handle_exception(&ums, &ums.bulk_ctxt);
|
||||
_handle_exception(&ums, &ums.bulk_ctxt);
|
||||
continue;
|
||||
}
|
||||
|
||||
ums_handle_ep0_ctrl(&ums);
|
||||
_handle_ep0_ctrl(&ums);
|
||||
|
||||
if (get_next_command(&ums, &ums.bulk_ctxt) || (ums.state > UMS_STATE_NORMAL))
|
||||
if (_get_next_command(&ums, &ums.bulk_ctxt) || (ums.state > UMS_STATE_NORMAL))
|
||||
continue;
|
||||
|
||||
ums_handle_ep0_ctrl(&ums);
|
||||
_handle_ep0_ctrl(&ums);
|
||||
|
||||
if (_ums_parse_scsi_cmd(&ums, &ums.bulk_ctxt) || (ums.state > UMS_STATE_NORMAL))
|
||||
if (_parse_scsi_cmd(&ums, &ums.bulk_ctxt) || (ums.state > UMS_STATE_NORMAL))
|
||||
continue;
|
||||
|
||||
ums_handle_ep0_ctrl(&ums);
|
||||
_handle_ep0_ctrl(&ums);
|
||||
|
||||
if (finish_reply(&ums, &ums.bulk_ctxt) || (ums.state > UMS_STATE_NORMAL))
|
||||
if (_finish_reply(&ums, &ums.bulk_ctxt) || (ums.state > UMS_STATE_NORMAL))
|
||||
continue;
|
||||
|
||||
send_status(&ums, &ums.bulk_ctxt);
|
||||
_send_status(&ums, &ums.bulk_ctxt);
|
||||
} while (ums.state != UMS_STATE_TERMINATED);
|
||||
|
||||
if (ums.lun.prevent_medium_removal)
|
||||
|
|
|
@ -195,8 +195,7 @@ static int _usbd_reset_usb_otg_phy_device_mode()
|
|||
usbd_otg->regs->otgsc = USB2D_OTGSC_USB_ID_PULLUP;
|
||||
|
||||
// Clear all relevant interrupt statuses.
|
||||
usbd_otg->regs->usbsts =
|
||||
USB2D_USBSTS_UI | USB2D_USBSTS_UEI | USB2D_USBSTS_PCI |
|
||||
usbd_otg->regs->usbsts = USB2D_USBSTS_UI | USB2D_USBSTS_UEI | USB2D_USBSTS_PCI |
|
||||
USB2D_USBSTS_FRI | USB2D_USBSTS_SEI | USB2D_USBSTS_AAI |
|
||||
USB2D_USBSTS_URI | USB2D_USBSTS_SRI | USB2D_USBSTS_SLI;
|
||||
|
||||
|
@ -225,8 +224,7 @@ static void _usb_charger_detect()
|
|||
gpio_config(GPIO_PORT_V, GPIO_PIN_3, GPIO_MODE_GPIO);
|
||||
|
||||
// Configure charger pin.
|
||||
PINMUX_AUX(PINMUX_AUX_USB_VBUS_EN1) &=
|
||||
~(PINMUX_INPUT_ENABLE | PINMUX_PARKED | PINMUX_TRISTATE | PINMUX_PULL_MASK);
|
||||
PINMUX_AUX(PINMUX_AUX_USB_VBUS_EN1) &= ~(PINMUX_INPUT_ENABLE | PINMUX_PARKED | PINMUX_TRISTATE | PINMUX_PULL_MASK);
|
||||
gpio_config(GPIO_PORT_CC, GPIO_PIN_5, GPIO_MODE_GPIO);
|
||||
gpio_output_enable(GPIO_PORT_CC, GPIO_PIN_5, GPIO_OUTPUT_ENABLE);
|
||||
|
||||
|
@ -364,8 +362,8 @@ int usb_device_init()
|
|||
AHB_GIZMO(AHB_GIZMO_AHB_MEM) |= AHB_MEM_DONT_SPLIT_AHB_WR | AHB_MEM_ENB_FAST_REARBITRATE;
|
||||
AHB_GIZMO(AHB_GIZMO_USB) |= AHB_GIZMO_IMMEDIATE;
|
||||
AHB_GIZMO(AHB_ARBITRATION_PRIORITY_CTRL) = PRIORITY_CTRL_WEIGHT(7) | PRIORITY_SELECT_USB;
|
||||
AHB_GIZMO(AHB_AHB_MEM_PREFETCH_CFG1) =
|
||||
MEM_PREFETCH_ENABLE | MEM_PREFETCH_USB_MST_ID | MEM_PREFETCH_ADDR_BNDRY(12) | 0x1000; // Addr boundary 64KB, Inactivity 4096 cycles.
|
||||
AHB_GIZMO(AHB_AHB_MEM_PREFETCH_CFG1) = MEM_PREFETCH_ENABLE | MEM_PREFETCH_USB_MST_ID |
|
||||
MEM_PREFETCH_ADDR_BNDRY(12) | 0x1000; // Addr boundary 64KB, Inactivity 4096 cycles.
|
||||
|
||||
// Set software and hardware context storage and clear it.
|
||||
usbdaemon = (usbd_t *)USBD_ADDR; // Depends on USB_TD_BUFFER_PAGE_SIZE aligned address.
|
||||
|
@ -529,9 +527,7 @@ static void _usbd_initialize_ep_ctrl(u32 endpoint)
|
|||
{
|
||||
u32 endpoint_type = usbd_otg->regs->endptctrl[actual_ep] & ~USB2D_ENDPTCTRL_RX_EP_TYPE_MASK;
|
||||
if (actual_ep)
|
||||
{
|
||||
endpoint_type |= usbd_otg->gadget ? USB2D_ENDPTCTRL_RX_EP_TYPE_INTR : USB2D_ENDPTCTRL_RX_EP_TYPE_BULK;
|
||||
}
|
||||
else
|
||||
endpoint_type |= USB2D_ENDPTCTRL_RX_EP_TYPE_CTRL;
|
||||
|
||||
|
@ -668,8 +664,10 @@ static void _usbd_mark_ep_complete(u32 endpoint)
|
|||
usb_dir_t direction = endpoint & 1;
|
||||
|
||||
usbd_flush_endpoint(endpoint);
|
||||
|
||||
memset((void *)&usbdaemon->dtds[endpoint * 4], 0, sizeof(dTD_t) * 4);
|
||||
memset((void *)&usbdaemon->qhs[endpoint], 0, sizeof(dQH_t));
|
||||
|
||||
usbdaemon->ep_configured[endpoint] = 0;
|
||||
usbdaemon->ep_bytes_requested[endpoint] = 0;
|
||||
|
||||
|
@ -850,8 +848,7 @@ static int _usbd_ep_ack(usb_ep_t ep)
|
|||
static void _usbd_set_ep0_stall()
|
||||
{
|
||||
// EP Control endpoints must be always stalled together.
|
||||
usbd_otg->regs->endptctrl[0] =
|
||||
USB2D_ENDPTCTRL_TX_EP_ENABLE | USB2D_ENDPTCTRL_TX_EP_STALL |
|
||||
usbd_otg->regs->endptctrl[0] = USB2D_ENDPTCTRL_TX_EP_ENABLE | USB2D_ENDPTCTRL_TX_EP_STALL |
|
||||
USB2D_ENDPTCTRL_RX_EP_ENABLE | USB2D_ENDPTCTRL_RX_EP_STALL;
|
||||
}
|
||||
|
||||
|
|
|
@ -941,8 +941,8 @@ int xusb_device_init()
|
|||
AHB_GIZMO(AHB_GIZMO_AHB_MEM) |= AHB_MEM_DONT_SPLIT_AHB_WR | AHB_MEM_ENB_FAST_REARBITRATE;
|
||||
AHB_GIZMO(AHB_GIZMO_USB3) |= AHB_GIZMO_IMMEDIATE;
|
||||
AHB_GIZMO(AHB_ARBITRATION_PRIORITY_CTRL) = PRIORITY_CTRL_WEIGHT(7) | PRIORITY_SELECT_USB3;
|
||||
AHB_GIZMO(AHB_AHB_MEM_PREFETCH_CFG1) =
|
||||
MEM_PREFETCH_ENABLE | MEM_PREFETCH_USB3_MST_ID | MEM_PREFETCH_ADDR_BNDRY(12) | 0x1000; // Addr boundary 64KB, Inactivity 4096 cycles.
|
||||
AHB_GIZMO(AHB_AHB_MEM_PREFETCH_CFG1) = MEM_PREFETCH_ENABLE | MEM_PREFETCH_USB3_MST_ID |
|
||||
MEM_PREFETCH_ADDR_BNDRY(12) | 0x1000; // Addr boundary 64KB, Inactivity 4096 cycles.
|
||||
|
||||
// Initialize context.
|
||||
usbd_xotg = &usbd_xotg_controller_ctxt;
|
||||
|
@ -1015,7 +1015,9 @@ static int _xusb_queue_trb(u32 ep_idx, void *trb, bool ring_doorbell)
|
|||
link_trb = (link_trb_t *)next_trb;
|
||||
link_trb->cycle = usbd_xotg->cntrl_producer_cycle & 1;
|
||||
link_trb->toggle_cycle = 1;
|
||||
|
||||
next_trb = (data_trb_t *)(link_trb->ring_seg_ptrlo << 4);
|
||||
|
||||
usbd_xotg->cntrl_producer_cycle ^= 1;
|
||||
}
|
||||
usbd_xotg->cntrl_epenqueue_ptr = next_trb;
|
||||
|
@ -1031,7 +1033,9 @@ static int _xusb_queue_trb(u32 ep_idx, void *trb, bool ring_doorbell)
|
|||
link_trb = (link_trb_t *)next_trb;
|
||||
link_trb->cycle = usbd_xotg->bulkout_producer_cycle & 1;
|
||||
link_trb->toggle_cycle = 1;
|
||||
|
||||
next_trb = (data_trb_t *)(link_trb->ring_seg_ptrlo << 4);
|
||||
|
||||
usbd_xotg->bulkout_producer_cycle ^= 1;
|
||||
}
|
||||
usbd_xotg->bulkout_epenqueue_ptr = next_trb;
|
||||
|
@ -1047,7 +1051,9 @@ static int _xusb_queue_trb(u32 ep_idx, void *trb, bool ring_doorbell)
|
|||
link_trb = (link_trb_t *)next_trb;
|
||||
link_trb->cycle = usbd_xotg->bulkin_producer_cycle & 1;
|
||||
link_trb->toggle_cycle = 1;
|
||||
|
||||
next_trb = (data_trb_t *)(link_trb->ring_seg_ptrlo << 4);
|
||||
|
||||
usbd_xotg->bulkin_producer_cycle ^= 1;
|
||||
}
|
||||
usbd_xotg->bulkin_epenqueue_ptr = next_trb;
|
||||
|
@ -1064,9 +1070,11 @@ static int _xusb_queue_trb(u32 ep_idx, void *trb, bool ring_doorbell)
|
|||
{
|
||||
// Flush data before transfer.
|
||||
bpmp_mmu_maintenance(BPMP_MMU_MAINT_CLEAN_WAY, false);
|
||||
|
||||
u32 target_id = (ep_idx << 8) & 0xFFFF;
|
||||
if (ep_idx == XUSB_EP_CTRL_IN)
|
||||
target_id |= usbd_xotg->ctrl_seq_num << 16;
|
||||
|
||||
XUSB_DEV_XHCI(XUSB_DEV_XHCI_DB) = target_id;
|
||||
}
|
||||
|
||||
|
@ -1131,6 +1139,7 @@ static int _xusb_issue_status_trb(usb_dir_t direction)
|
|||
if (usbd_xotg->cntrl_epenqueue_ptr == usbd_xotg->cntrl_epdequeue_ptr || direction == USB_DIR_OUT)
|
||||
{
|
||||
_xusb_create_status_trb(&trb, direction);
|
||||
|
||||
res = _xusb_queue_trb(XUSB_EP_CTRL_IN, &trb, EP_RING_DOORBELL);
|
||||
usbd_xotg->wait_for_event_trb = XUSB_TRB_STATUS;
|
||||
}
|
||||
|
@ -1146,6 +1155,7 @@ static int _xusb_issue_normal_trb(u8 *buf, u32 len, usb_dir_t direction)
|
|||
u32 ep_idx = USB_EP_BULK_IN;
|
||||
if (direction == USB_DIR_OUT)
|
||||
ep_idx = USB_EP_BULK_OUT;
|
||||
|
||||
int res = _xusb_queue_trb(ep_idx, &trb, EP_RING_DOORBELL);
|
||||
if (!res)
|
||||
usbd_xotg->wait_for_event_trb = XUSB_TRB_NORMAL;
|
||||
|
@ -1161,6 +1171,7 @@ static int _xusb_issue_data_trb(u8 *buf, u32 len, usb_dir_t direction)
|
|||
if (usbd_xotg->cntrl_epenqueue_ptr == usbd_xotg->cntrl_epdequeue_ptr)
|
||||
{
|
||||
_xusb_create_data_trb(&trb, buf, len, direction);
|
||||
|
||||
res = _xusb_queue_trb(XUSB_EP_CTRL_IN, &trb, EP_RING_DOORBELL);
|
||||
if (!res)
|
||||
usbd_xotg->wait_for_event_trb = XUSB_TRB_DATA;
|
||||
|
@ -1430,8 +1441,8 @@ static int _xusb_handle_get_ep_status(u32 ep_idx)
|
|||
u32 ep_mask = BIT(ep_idx);
|
||||
static u8 xusb_ep_status_descriptor[2] = {0};
|
||||
|
||||
xusb_ep_status_descriptor[0] =
|
||||
(XUSB_DEV_XHCI(XUSB_DEV_XHCI_EP_HALT) & ep_mask) ? USB_STATUS_EP_HALTED : USB_STATUS_EP_OK;
|
||||
xusb_ep_status_descriptor[0] = (XUSB_DEV_XHCI(XUSB_DEV_XHCI_EP_HALT) & ep_mask) ? USB_STATUS_EP_HALTED : USB_STATUS_EP_OK;
|
||||
|
||||
return _xusb_issue_data_trb(xusb_ep_status_descriptor, 2, USB_DIR_IN);
|
||||
}
|
||||
|
||||
|
@ -1453,6 +1464,7 @@ static int _xusb_handle_get_class_request(usb_ctrl_setup_t *ctrl_setup)
|
|||
case USB_REQUEST_BULK_RESET:
|
||||
usbd_xotg->bulk_reset_req = true;
|
||||
return _xusb_issue_status_trb(USB_DIR_IN); // DELAYED_STATUS;
|
||||
|
||||
case USB_REQUEST_BULK_GET_MAX_LUN:
|
||||
if (!usbd_xotg->max_lun_set)
|
||||
goto stall;
|
||||
|
@ -1950,8 +1962,7 @@ int xusb_device_enumerate(usb_gadget_type gadget)
|
|||
// Override access to High/Full Speed.
|
||||
XUSB_DEV_XHCI(XUSB_DEV_XHCI_CFG_DEV_FE) = (XUSB_DEV_XHCI(XUSB_DEV_XHCI_CFG_DEV_FE) & ~XHCI_CFG_DEV_FE_PORTREGSEL_MASK) | XHCI_CFG_DEV_FE_PORTREGSEL_HSFS;
|
||||
|
||||
XUSB_DEV_XHCI(XUSB_DEV_XHCI_PORTSC) =
|
||||
(XUSB_DEV_XHCI(XUSB_DEV_XHCI_PORTSC) & ~XHCI_PORTSC_PLS_MASK) | XHCI_PORTSC_LWS | XHCI_PORTSC_PLS_RXDETECT;
|
||||
XUSB_DEV_XHCI(XUSB_DEV_XHCI_PORTSC) = (XUSB_DEV_XHCI(XUSB_DEV_XHCI_PORTSC) & ~XHCI_PORTSC_PLS_MASK) | XHCI_PORTSC_LWS | XHCI_PORTSC_PLS_RXDETECT;
|
||||
XUSB_DEV_XHCI(XUSB_DEV_XHCI_CFG_DEV_FE) &= ~XHCI_CFG_DEV_FE_PORTREGSEL_MASK;
|
||||
|
||||
// Enable VBUS and set ID to Float.
|
||||
|
@ -2014,6 +2025,7 @@ int xusb_device_ep1_out_read(u8 *buf, u32 len, u32 *bytes_read, u32 sync_tries)
|
|||
int res = USB_RES_OK;
|
||||
usbd_xotg->tx_count[USB_DIR_OUT] = 0;
|
||||
usbd_xotg->tx_bytes[USB_DIR_OUT] = len;
|
||||
|
||||
_xusb_issue_normal_trb(buf, len, USB_DIR_OUT);
|
||||
usbd_xotg->tx_count[USB_DIR_OUT]++;
|
||||
|
||||
|
@ -2083,6 +2095,7 @@ int xusb_device_ep1_in_write(u8 *buf, u32 len, u32 *bytes_written, u32 sync_trie
|
|||
int res = USB_RES_OK;
|
||||
usbd_xotg->tx_count[USB_DIR_IN] = 0;
|
||||
usbd_xotg->tx_bytes[USB_DIR_IN] = len;
|
||||
|
||||
_xusb_issue_normal_trb(buf, len, USB_DIR_IN);
|
||||
usbd_xotg->tx_count[USB_DIR_IN]++;
|
||||
|
||||
|
|
|
@ -57,8 +57,8 @@ int ini_parse(link_t *dst, char *ini_path, bool is_dir)
|
|||
{
|
||||
FIL fp;
|
||||
u32 lblen;
|
||||
u32 pathlen = strlen(ini_path);
|
||||
u32 k = 0;
|
||||
u32 pathlen = strlen(ini_path);
|
||||
ini_sec_t *csec = NULL;
|
||||
|
||||
char *lbuf = NULL;
|
||||
|
|
Loading…
Reference in a new issue