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589 commits 41 branches 81 tags 30 MiB
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18 commits

Author SHA1 Message Date
TuxSH 05b8b42164 [exosphere] Rewrite crt0/init and ld script 2018-05-11 14:07:37 +02:00
Michael Scire c2eed3caf6 Integrate 5.x SMC API changes, add 4.x specific setup, implement target firmware selection 2018-03-25 15:05:08 -06:00
TuxSH 52f7adfc50 Add spsr_el3 to cpu_context 2018-03-11 12:53:52 +01:00
Michael Scire 7e780301de Fix AES-GCM code. 2018-03-08 17:26:42 -08:00
TuxSH 4f0e8b8467 Fix bug in user_generate_specific_aes_key, add other read/write le/be funcs 2018-03-07 15:11:53 +01:00
Michael Scire 6592744b3b Add debug region to mapped memory 2018-03-07 04:00:19 -08:00
Michael Scire 1fa64fccbf Add pre-defined panic utilities 2018-03-04 17:23:54 -08:00
TuxSH a6c7a2c57e Refactor 32-bit register definitions 2018-03-03 20:23:13 +01:00
TuxSH be6b67669f Finish writing warmboot _crt0_ 2018-03-03 16:58:23 +01:00
TuxSH bf63a077b1 Implement critical section (Lamport's Baker s algorithm)... 
thanks @fincs for sample code
 2018-03-02 23:37:36 +01:00
Michael Scire 0a80a7caf5 Fix coldboot init, Exosphere makes it to PK2LDR in this commit. 2018-03-01 20:10:05 -08:00
TuxSH 63d0b08ac4 Rewrite relocation stuff 2018-03-02 02:47:19 +01:00
TuxSH 3d4dcdde13 Fix ttbl init pointer arith bug, other fixes 2018-02-28 23:35:30 +01:00
Michael Scire 66b3b3a706 Implement Panic() stub. 2018-02-27 19:43:07 -08:00
TuxSH c7d83c6eb6 Rewrite the memory map-related code... 
...other style fixes, etc.
 2018-02-26 22:09:35 +01:00
Michael Scire bda9dcbe73 Start implementing smcCpuSuspend 2018-02-26 02:00:17 -08:00
TuxSH 969b781a68 Failed attempt to fix loops not being unrolled, other fixes. 2018-02-25 21:41:16 +01:00
TuxSH b0ea9c1a0b Move source files to src/, add Makefile, fix all build and linkage errors, etc. 2018-02-25 20:00:50 +01:00