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2021 commits 42 branches 82 tags 31 MiB
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Author SHA1 Message Date
TuxSH
114cdc5aa4 thermosphere: use barriers and caches *properly*. Cache code refactoring 
- set/way cache ops create losses of coherency, do not broadcast and are only meant to be used on boot, period.

Cache ops by VA are **the only way** to do data cache maintenance.

Fix a bug where the L2 cache was evicted by each core. It shouldn't have.

- Cleaning dcache to PoU and invalidating icache to PoU, by VA is sufficient for self-modifying code

- Since we operate within a single cluster and don't do DMA, we almost always operate within the inner shareability domain

(commit untested on real hw)
 2020-02-04 19:12:21 +00:00
TuxSH
fbdd941061 thermosphere: add debug pause logic 2020-02-04 19:12:21 +00:00
TuxSH
3e7e658594 thermosphere: add common asm macros 2020-02-04 19:12:21 +00:00
TuxSH
84a2dc4ad9 thermosphere: add fpu regs save/restore 2020-02-04 19:12:21 +00:00
TuxSH
c085a67150 thermosphere: add cctx->userFrame 2020-02-04 19:12:21 +00:00
TuxSH
674f3d0fc9 thermosphere: fix ptimer time freezing (again) 2020-02-04 19:12:21 +00:00
TuxSH
e5f6440c3f thermosphere: properly implement guest timer stuff 2020-02-04 19:12:21 +00:00
TuxSH
3b542e749f thermosphere: add TransportInterface abstraction layer 2020-02-04 19:12:21 +00:00
TuxSH
26bda4f32d thermosphere: refactor tegra uart code, etc. 2020-02-04 19:12:21 +00:00
TuxSH
a552c254e0 thermosphere: pl011 uart refactor 2020-02-04 19:12:20 +00:00
TuxSH
57548e67fb thermosphere: fix pl101 uart reg definitions 2020-02-04 19:12:20 +00:00
TuxSH
edb942a032 thermosphere: add proper memory/instruction barriers for breakpoint stuff 2020-02-04 19:12:20 +00:00
TuxSH
0dd5f1f6d4 thermosphere: add hypervisor timer code 2020-02-04 19:12:20 +00:00
TuxSH
4d8a07943c thermosphere: qemu: get rid of arm tf 
qemu impls psci anyway
 2020-02-04 19:12:20 +00:00
TuxSH
f19c67435a thermosphere: refactor exception handlers & add stolen time/emulated ptimer logic 2020-02-04 19:12:20 +00:00
TuxSH
2f999497df thermosphere: rewrite sysreg trapping code, add skeleton code for timer val trap handling; support A32 EL1 once again 2020-02-04 19:12:20 +00:00
TuxSH
a67d682c10 thermosphere: don't trap memory register writes/don't migrate sw breakpoints 
Makes no sense on a system with ASLR
 2020-02-04 19:12:20 +00:00
TuxSH
2219494675 thermosphere: vgic: largely reduce the number of mmio accesses 
since we have to use 64 bits for VirqState anyway
 2020-02-04 19:12:20 +00:00
TuxSH
d560330a9d thermosphere: make the pending virq list ordering stable 2020-02-04 19:12:20 +00:00
TuxSH
3424e0bf71 thermosphere: fix wrong icfgr shift; fix list handling bug 2020-02-04 19:12:20 +00:00
TuxSH
7d30fce54c thermosphere: vgic: fix OOB accesses, fix icfgr and itargetsr handling 
qemu actually allows SPIs to use the N-N model
 2020-02-04 19:12:20 +00:00
TuxSH
81a3b4fff5 thermosphere: fix is/ic registers usage; fix offset calculation 2020-02-04 19:12:20 +00:00
TuxSH
d43d1af62a thermosphere: fix truncation in vgicCleanupPendingList 2020-02-04 19:12:20 +00:00
TuxSH
7573d1ad3e thermosphere: honor irq config for ppis 2020-02-04 19:12:20 +00:00
TuxSH
5f83df2599 thermosphere: yikes 2020-02-04 19:12:20 +00:00
TuxSH
aeca48503b thermosphere: use strict volatile bitfields just in case 2020-02-04 19:12:20 +00:00
TuxSH
0fb5f81e8a thermosphere: vgic: fix critical bug in vgicUpdateState, add more checks 
Yikes.
 2020-02-04 19:12:20 +00:00
TuxSH
b0d258209c thermosphere: add CFI where needed, add PANIC macro, etc. 2020-02-04 19:12:20 +00:00
TuxSH
c365fff119 thermosphere: vgic: mostly fix vSGI handling, remove unimplementable/unused stuff + bugfixes 
Still somewhat broken, though
 2020-02-04 19:12:20 +00:00
TuxSH
0b532a0dfb thermosphere: fix guest access to irq 25, etc; we don't need to raise VI manually 
See Armv8a TRM "Virtual IRQ exception"
 2020-02-04 19:12:20 +00:00
TuxSH
1345aef693 thermosphere: add PPI definitions 2020-02-04 19:12:20 +00:00
TuxSH
eda6a8d8d6 vgic: fix multiple bugs 2020-02-04 19:12:20 +00:00
TuxSH
f75f584f2f thermosphere: fix various vgic bugs; fix register access OOB bug (xzr) 2020-02-04 19:12:20 +00:00
TuxSH
62fe082cd4 thermosphere: vgic: fix enabled state of virqs 2020-02-04 19:12:20 +00:00
TuxSH
6cef320bc1 thermosphere: fix multiple bugs 2020-02-04 19:12:19 +00:00
TuxSH
e7b351ddb8 thermosphere: vgic code draft 2020-02-04 19:12:19 +00:00
TuxSH
9787bca325 thermosphere: also trap GICH (to deny access) 2020-02-04 19:12:19 +00:00
TuxSH
bb1ba5308d thermosphere: handle stage2 data aborts, trap gicd accesses 2020-02-04 19:12:19 +00:00
TuxSH
442f4ef9ef thermosphere: implement stop point broadcast 2020-02-04 19:12:19 +00:00
TuxSH
3af20ff7a2 thermopshere: add "execute function" sgi 2020-02-04 19:12:19 +00:00
TuxSH
322d796004 thermosphere: barrier & active core mask 2020-02-04 19:12:19 +00:00
TuxSH
c34df08ed9 thermosphere: handle physical IRQs 2020-02-04 19:12:19 +00:00
TuxSH
62fd2cd94d thermosphere: add gicv2 register definitions 2020-02-04 19:12:19 +00:00
TuxSH
e71974085e thermosphere: sw breakpoint code, etc. 2020-02-04 19:12:19 +00:00
TuxSH
577daaebf0 thermosphere: remove breakpoint/watchpoint reg dump functions 2020-02-04 19:12:19 +00:00
TuxSH
aad18182f4 thermosphere: add watchpoint + watchpoint merging code 2020-02-04 19:12:19 +00:00
TuxSH
0435b73f63 thermosphere: refactor crt0 + watchpoint init 2020-02-04 19:12:19 +00:00
TuxSH
bd93b01e57 thermosphere: add actual breakpoint code 2020-02-04 19:12:19 +00:00
TuxSH
88218f606c thermosphere: add breakpoint/watchpoint enable/reset code 2020-02-04 19:12:19 +00:00
TuxSH
5081174d27 thermopshere: refactor & fix single-stepping code 2020-02-04 19:12:19 +00:00