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https://github.com/Atmosphere-NX/Atmosphere
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thermosphere: set correct gpio config for uart (thanks @hexkyz)
This commit is contained in:
parent
1d225ed5f8
commit
20e5689f04
4 changed files with 278 additions and 2 deletions
145
thermosphere/src/gpio.c
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145
thermosphere/src/gpio.c
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/*
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* Copyright (c) 2018-2019 Atmosphère-NX
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <string.h>
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#include <stdint.h>
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#include <errno.h>
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#include "gpio.h"
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#include "utils.h"
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/**
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* Returns a GPIO bank object that corresponds to the given GPIO pin,
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* which can be created using the TEGRA_GPIO macro or passed from the name macro.
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*
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* @param pin The GPIO to get the bank for.
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* @return The GPIO bank object to use for working with the given bank.
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*/
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static volatile tegra_gpio_bank_t *gpio_get_bank(uint32_t pin)
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{
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volatile tegra_gpio_t *gpio = gpio_get_regs();
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uint32_t bank_number = pin >> GPIO_BANK_SHIFT;
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return &gpio->bank[bank_number];
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}
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/**
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* @return the port number for working with the given GPIO.
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*/
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static volatile uint32_t gpio_get_port(uint32_t pin)
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{
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return (pin >> GPIO_PORT_SHIFT) & GPIO_PORT_MASK;
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}
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/**
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* @return a mask to be used to work with the given GPIO
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*/
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static volatile uint32_t gpio_get_mask(uint32_t pin)
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{
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uint32_t pin_number = pin & GPIO_PIN_MASK;
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return (1 << pin_number);
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}
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/**
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* Performs a simple GPIO configuration operation.
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*
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* @param pin The GPIO pin to work with, as created with TEGRA_GPIO, or a named GPIO.
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* @param should_be_set True iff the relevant bit should be set; or false if it should be cleared.
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* @param offset The offset into a gpio_bank structure
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*/
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static void gpio_simple_register_set(uint32_t pin, bool should_be_set, uint32_t offset)
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{
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// Retrieve the register set that corresponds to the given pin and offset.
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uintptr_t cluster_addr = (uintptr_t)gpio_get_bank(pin) + offset;
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uint32_t *cluster = (uint32_t *)cluster_addr;
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// Figure out the offset into the cluster,
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// and the mask to be used.
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uint32_t port = gpio_get_port(pin);
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uint32_t mask = gpio_get_mask(pin);
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// Set or clear the bit, as appropriate.
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if (should_be_set)
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cluster[port] |= mask;
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else
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cluster[port] &= ~mask;
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}
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/**
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* Performs a simple GPIO configuration operation.
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*
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* @param pin The GPIO pin to work with, as created with TEGRA_GPIO, or a named GPIO.
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* @param should_be_set True iff the relevant bit should be set; or false if it should be cleared.
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* @param offset The offset into a gpio_bank structure
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*/
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static bool gpio_simple_register_get(uint32_t pin, uint32_t offset)
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{
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// Retrieve the register set that corresponds to the given pin and offset.
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uintptr_t cluster_addr = (uintptr_t)gpio_get_bank(pin) + offset;
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uint32_t *cluster = (uint32_t *)cluster_addr;
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// Figure out the offset into the cluster,
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// and the mask to be used.
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uint32_t port = gpio_get_port(pin);
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uint32_t mask = gpio_get_mask(pin);
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// Convert the given value to a boolean.
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return !!(cluster[port] & mask);
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}
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/**
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* Configures a given pin as either GPIO or SFIO.
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*
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* @param pin The GPIO pin to work with, as created with TEGRA_GPIO, or a named GPIO.
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* @param mode The relevant mode.
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*/
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void gpio_configure_mode(uint32_t pin, uint32_t mode)
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{
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gpio_simple_register_set(pin, mode == GPIO_MODE_GPIO, offsetof(tegra_gpio_bank_t, config));
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}
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/**
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* Configures a given pin as either INPUT or OUPUT.
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*
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* @param pin The GPIO pin to work with, as created with TEGRA_GPIO, or a named GPIO.
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* @param direction The relevant direction.
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*/
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void gpio_configure_direction(uint32_t pin, uint32_t dir)
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{
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gpio_simple_register_set(pin, dir == GPIO_DIRECTION_OUTPUT, offsetof(tegra_gpio_bank_t, direction));
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}
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/**
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* Drives a relevant GPIO pin as either HIGH or LOW.
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*
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* @param pin The GPIO pin to work with, as created with TEGRA_GPIO, or a named GPIO.
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* @param mode The relevant mode.
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*/
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void gpio_write(uint32_t pin, uint32_t value)
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{
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gpio_simple_register_set(pin, value == GPIO_LEVEL_HIGH, offsetof(tegra_gpio_bank_t, out));
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}
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/**
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* Drives a relevant GPIO pin as either HIGH or LOW.
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*
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* @param pin The GPIO pin to work with, as created with TEGRA_GPIO, or a named GPIO.
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* @param mode The relevant mode.
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*/
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uint32_t gpio_read(uint32_t pin)
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{
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return gpio_simple_register_get(pin, offsetof(tegra_gpio_bank_t, in));
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}
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123
thermosphere/src/gpio.h
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123
thermosphere/src/gpio.h
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@ -0,0 +1,123 @@
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/*
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* Copyright (c) 2018-2019 Atmosphère-NX
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#pragma once
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#include "types.h"
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#define GPIO_BASE 0x6000D000
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#define MAKE_GPIO_REG(n) MAKE_REG32(GPIO_BASE + n)
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#define TEGRA_GPIO_PORTS 4
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#define TEGRA_GPIO_BANKS 8
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#define GPIO_BANK_SHIFT 5
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#define GPIO_PORT_SHIFT 3
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#define GPIO_PORT_MASK 0x03
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#define GPIO_PIN_MASK 0x07
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typedef enum {
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TEGRA_GPIO_PORT_A = 0,
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TEGRA_GPIO_PORT_B = 1,
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TEGRA_GPIO_PORT_C = 2,
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TEGRA_GPIO_PORT_D = 3,
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TEGRA_GPIO_PORT_E = 4,
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TEGRA_GPIO_PORT_F = 5,
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TEGRA_GPIO_PORT_G = 6,
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TEGRA_GPIO_PORT_H = 7,
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TEGRA_GPIO_PORT_I = 8,
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TEGRA_GPIO_PORT_J = 9,
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TEGRA_GPIO_PORT_K = 10,
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TEGRA_GPIO_PORT_L = 11,
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TEGRA_GPIO_PORT_M = 12,
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TEGRA_GPIO_PORT_N = 13,
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TEGRA_GPIO_PORT_O = 14,
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TEGRA_GPIO_PORT_P = 15,
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TEGRA_GPIO_PORT_Q = 16,
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TEGRA_GPIO_PORT_R = 17,
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TEGRA_GPIO_PORT_S = 18,
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TEGRA_GPIO_PORT_T = 19,
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TEGRA_GPIO_PORT_U = 20,
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TEGRA_GPIO_PORT_V = 21,
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TEGRA_GPIO_PORT_W = 22,
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TEGRA_GPIO_PORT_X = 23,
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TEGRA_GPIO_PORT_Y = 24,
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TEGRA_GPIO_PORT_Z = 25,
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TEGRA_GPIO_PORT_AA = 26,
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TEGRA_GPIO_PORT_BB = 27,
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TEGRA_GPIO_PORT_CC = 28,
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TEGRA_GPIO_PORT_DD = 29,
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TEGRA_GPIO_PORT_EE = 30,
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TEGRA_GPIO_PORT_FF = 31,
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} tegra_gpio_port;
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typedef struct {
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uint32_t config[TEGRA_GPIO_PORTS];
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uint32_t direction[TEGRA_GPIO_PORTS];
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uint32_t out[TEGRA_GPIO_PORTS];
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uint32_t in[TEGRA_GPIO_PORTS];
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uint32_t int_status[TEGRA_GPIO_PORTS];
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uint32_t int_enable[TEGRA_GPIO_PORTS];
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uint32_t int_level[TEGRA_GPIO_PORTS];
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uint32_t int_clear[TEGRA_GPIO_PORTS];
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uint32_t masked_config[TEGRA_GPIO_PORTS];
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uint32_t masked_dir_out[TEGRA_GPIO_PORTS];
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uint32_t masked_out[TEGRA_GPIO_PORTS];
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uint32_t masked_in[TEGRA_GPIO_PORTS];
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uint32_t masked_int_status[TEGRA_GPIO_PORTS];
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uint32_t masked_int_enable[TEGRA_GPIO_PORTS];
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uint32_t masked_int_level[TEGRA_GPIO_PORTS];
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uint32_t masked_int_clear[TEGRA_GPIO_PORTS];
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} tegra_gpio_bank_t;
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typedef struct {
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tegra_gpio_bank_t bank[TEGRA_GPIO_BANKS];
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} tegra_gpio_t;
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static inline volatile tegra_gpio_t *gpio_get_regs(void)
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{
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return (volatile tegra_gpio_t *)GPIO_BASE;
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}
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#define TEGRA_GPIO(port, offset) \
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((TEGRA_GPIO_PORT_##port * 8) + offset)
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/* Mode select */
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#define GPIO_MODE_GPIO 0
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#define GPIO_MODE_SFIO 1
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/* Direction */
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#define GPIO_DIRECTION_INPUT 0
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#define GPIO_DIRECTION_OUTPUT 1
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/* Level */
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#define GPIO_LEVEL_LOW 0
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#define GPIO_LEVEL_HIGH 1
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/* Named GPIOs */
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#define GPIO_BUTTON_VOL_DOWN TEGRA_GPIO(X, 7)
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#define GPIO_BUTTON_VOL_UP TEGRA_GPIO(X, 6)
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#define GPIO_MICROSD_CARD_DETECT TEGRA_GPIO(Z, 1)
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#define GPIO_MICROSD_WRITE_PROTECT TEGRA_GPIO(Z, 4)
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#define GPIO_MICROSD_SUPPLY_ENABLE TEGRA_GPIO(E, 4)
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#define GPIO_LCD_BL_P5V TEGRA_GPIO(I, 0)
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#define GPIO_LCD_BL_N5V TEGRA_GPIO(I, 1)
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#define GPIO_LCD_BL_PWM TEGRA_GPIO(V, 0)
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#define GPIO_LCD_BL_EN TEGRA_GPIO(V, 1)
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#define GPIO_LCD_BL_RST TEGRA_GPIO(V, 2)
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void gpio_configure_mode(uint32_t pin, uint32_t mode);
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void gpio_configure_direction(uint32_t pin, uint32_t dir);
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void gpio_write(uint32_t pin, uint32_t value);
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uint32_t gpio_read(uint32_t pin);
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@ -2,14 +2,18 @@
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#include "uart.h"
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#include "car.h"
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#include "log.h"
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#include "gpio.h"
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int main(void)
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{
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// Init uart (hardcoded atm)
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uart_select(UART_C);
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clkrst_reboot(CARDEVICE_UARTC);
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gpio_configure_mode(TEGRA_GPIO(G, 0), GPIO_MODE_GPIO); // Leave UART-B as GPIO
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gpio_configure_mode(TEGRA_GPIO(D, 1), GPIO_MODE_SFIO); // Change UART-C to SPIO
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uart_select(UART_C); // Configure pinmux for UART-C
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clkrst_reboot(CARDEVICE_UARTC); // Enable UART-C clock
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uart_init(UART_C, 115200, true);
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//uart_send(UART_C, "0123\n", 3);
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serialLog("Hello from Thermosphere!\n");
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return 0;
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}
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@ -30,6 +30,8 @@ void uart_select(UartDevice dev) {
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void uart_init(UartDevice dev, u32 baud, bool txInverted) {
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volatile uart_t *uart = get_uart_device(dev);
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uart_wait_idle(dev, UART_VENDOR_STATE_TX_IDLE);
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/* Set baud rate. */
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u32 rate = (8 * baud + 408000000) / (16 * baud);
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uart->UART_LCR = UART_LCR_DLAB; /* Enable DLAB. */
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@ -49,6 +51,8 @@ void uart_init(UartDevice dev, u32 baud, bool txInverted) {
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uart->UART_RX_FIFO_CFG = 1; /* Set RX_FIFO trigger level */
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uart->UART_MIE = 0;
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uart->UART_ASR = 0;
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uart_wait_idle(dev, UART_VENDOR_STATE_TX_IDLE | UART_VENDOR_STATE_RX_IDLE);
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}
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/* This function blocks until the UART device (dev) is in the desired state (status). Make sure the desired state can be reached! */
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