diff --git a/thermosphere/src/gpio.c b/thermosphere/src/gpio.c
new file mode 100644
index 000000000..e0de22df2
--- /dev/null
+++ b/thermosphere/src/gpio.c
@@ -0,0 +1,145 @@
+/*
+ * Copyright (c) 2018-2019 Atmosphère-NX
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see .
+ */
+
+#include
+#include
+#include
+
+#include "gpio.h"
+#include "utils.h"
+
+/**
+ * Returns a GPIO bank object that corresponds to the given GPIO pin,
+ * which can be created using the TEGRA_GPIO macro or passed from the name macro.
+ *
+ * @param pin The GPIO to get the bank for.
+ * @return The GPIO bank object to use for working with the given bank.
+ */
+static volatile tegra_gpio_bank_t *gpio_get_bank(uint32_t pin)
+{
+ volatile tegra_gpio_t *gpio = gpio_get_regs();
+ uint32_t bank_number = pin >> GPIO_BANK_SHIFT;
+
+ return &gpio->bank[bank_number];
+}
+
+/**
+ * @return the port number for working with the given GPIO.
+ */
+static volatile uint32_t gpio_get_port(uint32_t pin)
+{
+ return (pin >> GPIO_PORT_SHIFT) & GPIO_PORT_MASK;
+}
+
+/**
+ * @return a mask to be used to work with the given GPIO
+ */
+static volatile uint32_t gpio_get_mask(uint32_t pin)
+{
+ uint32_t pin_number = pin & GPIO_PIN_MASK;
+ return (1 << pin_number);
+}
+
+/**
+ * Performs a simple GPIO configuration operation.
+ *
+ * @param pin The GPIO pin to work with, as created with TEGRA_GPIO, or a named GPIO.
+ * @param should_be_set True iff the relevant bit should be set; or false if it should be cleared.
+ * @param offset The offset into a gpio_bank structure
+ */
+static void gpio_simple_register_set(uint32_t pin, bool should_be_set, uint32_t offset)
+{
+ // Retrieve the register set that corresponds to the given pin and offset.
+ uintptr_t cluster_addr = (uintptr_t)gpio_get_bank(pin) + offset;
+ uint32_t *cluster = (uint32_t *)cluster_addr;
+
+ // Figure out the offset into the cluster,
+ // and the mask to be used.
+ uint32_t port = gpio_get_port(pin);
+ uint32_t mask = gpio_get_mask(pin);
+
+ // Set or clear the bit, as appropriate.
+ if (should_be_set)
+ cluster[port] |= mask;
+ else
+ cluster[port] &= ~mask;
+}
+
+/**
+ * Performs a simple GPIO configuration operation.
+ *
+ * @param pin The GPIO pin to work with, as created with TEGRA_GPIO, or a named GPIO.
+ * @param should_be_set True iff the relevant bit should be set; or false if it should be cleared.
+ * @param offset The offset into a gpio_bank structure
+ */
+static bool gpio_simple_register_get(uint32_t pin, uint32_t offset)
+{
+ // Retrieve the register set that corresponds to the given pin and offset.
+ uintptr_t cluster_addr = (uintptr_t)gpio_get_bank(pin) + offset;
+ uint32_t *cluster = (uint32_t *)cluster_addr;
+
+ // Figure out the offset into the cluster,
+ // and the mask to be used.
+ uint32_t port = gpio_get_port(pin);
+ uint32_t mask = gpio_get_mask(pin);
+
+ // Convert the given value to a boolean.
+ return !!(cluster[port] & mask);
+}
+
+/**
+ * Configures a given pin as either GPIO or SFIO.
+ *
+ * @param pin The GPIO pin to work with, as created with TEGRA_GPIO, or a named GPIO.
+ * @param mode The relevant mode.
+ */
+void gpio_configure_mode(uint32_t pin, uint32_t mode)
+{
+ gpio_simple_register_set(pin, mode == GPIO_MODE_GPIO, offsetof(tegra_gpio_bank_t, config));
+}
+
+/**
+ * Configures a given pin as either INPUT or OUPUT.
+ *
+ * @param pin The GPIO pin to work with, as created with TEGRA_GPIO, or a named GPIO.
+ * @param direction The relevant direction.
+ */
+void gpio_configure_direction(uint32_t pin, uint32_t dir)
+{
+ gpio_simple_register_set(pin, dir == GPIO_DIRECTION_OUTPUT, offsetof(tegra_gpio_bank_t, direction));
+}
+
+/**
+ * Drives a relevant GPIO pin as either HIGH or LOW.
+ *
+ * @param pin The GPIO pin to work with, as created with TEGRA_GPIO, or a named GPIO.
+ * @param mode The relevant mode.
+ */
+void gpio_write(uint32_t pin, uint32_t value)
+{
+ gpio_simple_register_set(pin, value == GPIO_LEVEL_HIGH, offsetof(tegra_gpio_bank_t, out));
+}
+
+/**
+ * Drives a relevant GPIO pin as either HIGH or LOW.
+ *
+ * @param pin The GPIO pin to work with, as created with TEGRA_GPIO, or a named GPIO.
+ * @param mode The relevant mode.
+ */
+uint32_t gpio_read(uint32_t pin)
+{
+ return gpio_simple_register_get(pin, offsetof(tegra_gpio_bank_t, in));
+}
diff --git a/thermosphere/src/gpio.h b/thermosphere/src/gpio.h
new file mode 100644
index 000000000..c27f38c84
--- /dev/null
+++ b/thermosphere/src/gpio.h
@@ -0,0 +1,123 @@
+/*
+ * Copyright (c) 2018-2019 Atmosphère-NX
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see .
+ */
+
+#pragma once
+#include "types.h"
+
+#define GPIO_BASE 0x6000D000
+#define MAKE_GPIO_REG(n) MAKE_REG32(GPIO_BASE + n)
+
+#define TEGRA_GPIO_PORTS 4
+#define TEGRA_GPIO_BANKS 8
+#define GPIO_BANK_SHIFT 5
+#define GPIO_PORT_SHIFT 3
+#define GPIO_PORT_MASK 0x03
+#define GPIO_PIN_MASK 0x07
+
+typedef enum {
+ TEGRA_GPIO_PORT_A = 0,
+ TEGRA_GPIO_PORT_B = 1,
+ TEGRA_GPIO_PORT_C = 2,
+ TEGRA_GPIO_PORT_D = 3,
+ TEGRA_GPIO_PORT_E = 4,
+ TEGRA_GPIO_PORT_F = 5,
+ TEGRA_GPIO_PORT_G = 6,
+ TEGRA_GPIO_PORT_H = 7,
+ TEGRA_GPIO_PORT_I = 8,
+ TEGRA_GPIO_PORT_J = 9,
+ TEGRA_GPIO_PORT_K = 10,
+ TEGRA_GPIO_PORT_L = 11,
+ TEGRA_GPIO_PORT_M = 12,
+ TEGRA_GPIO_PORT_N = 13,
+ TEGRA_GPIO_PORT_O = 14,
+ TEGRA_GPIO_PORT_P = 15,
+ TEGRA_GPIO_PORT_Q = 16,
+ TEGRA_GPIO_PORT_R = 17,
+ TEGRA_GPIO_PORT_S = 18,
+ TEGRA_GPIO_PORT_T = 19,
+ TEGRA_GPIO_PORT_U = 20,
+ TEGRA_GPIO_PORT_V = 21,
+ TEGRA_GPIO_PORT_W = 22,
+ TEGRA_GPIO_PORT_X = 23,
+ TEGRA_GPIO_PORT_Y = 24,
+ TEGRA_GPIO_PORT_Z = 25,
+ TEGRA_GPIO_PORT_AA = 26,
+ TEGRA_GPIO_PORT_BB = 27,
+ TEGRA_GPIO_PORT_CC = 28,
+ TEGRA_GPIO_PORT_DD = 29,
+ TEGRA_GPIO_PORT_EE = 30,
+ TEGRA_GPIO_PORT_FF = 31,
+} tegra_gpio_port;
+
+typedef struct {
+ uint32_t config[TEGRA_GPIO_PORTS];
+ uint32_t direction[TEGRA_GPIO_PORTS];
+ uint32_t out[TEGRA_GPIO_PORTS];
+ uint32_t in[TEGRA_GPIO_PORTS];
+ uint32_t int_status[TEGRA_GPIO_PORTS];
+ uint32_t int_enable[TEGRA_GPIO_PORTS];
+ uint32_t int_level[TEGRA_GPIO_PORTS];
+ uint32_t int_clear[TEGRA_GPIO_PORTS];
+ uint32_t masked_config[TEGRA_GPIO_PORTS];
+ uint32_t masked_dir_out[TEGRA_GPIO_PORTS];
+ uint32_t masked_out[TEGRA_GPIO_PORTS];
+ uint32_t masked_in[TEGRA_GPIO_PORTS];
+ uint32_t masked_int_status[TEGRA_GPIO_PORTS];
+ uint32_t masked_int_enable[TEGRA_GPIO_PORTS];
+ uint32_t masked_int_level[TEGRA_GPIO_PORTS];
+ uint32_t masked_int_clear[TEGRA_GPIO_PORTS];
+} tegra_gpio_bank_t;
+
+typedef struct {
+ tegra_gpio_bank_t bank[TEGRA_GPIO_BANKS];
+} tegra_gpio_t;
+
+static inline volatile tegra_gpio_t *gpio_get_regs(void)
+{
+ return (volatile tegra_gpio_t *)GPIO_BASE;
+}
+
+#define TEGRA_GPIO(port, offset) \
+ ((TEGRA_GPIO_PORT_##port * 8) + offset)
+
+/* Mode select */
+#define GPIO_MODE_GPIO 0
+#define GPIO_MODE_SFIO 1
+
+/* Direction */
+#define GPIO_DIRECTION_INPUT 0
+#define GPIO_DIRECTION_OUTPUT 1
+
+/* Level */
+#define GPIO_LEVEL_LOW 0
+#define GPIO_LEVEL_HIGH 1
+
+/* Named GPIOs */
+#define GPIO_BUTTON_VOL_DOWN TEGRA_GPIO(X, 7)
+#define GPIO_BUTTON_VOL_UP TEGRA_GPIO(X, 6)
+#define GPIO_MICROSD_CARD_DETECT TEGRA_GPIO(Z, 1)
+#define GPIO_MICROSD_WRITE_PROTECT TEGRA_GPIO(Z, 4)
+#define GPIO_MICROSD_SUPPLY_ENABLE TEGRA_GPIO(E, 4)
+#define GPIO_LCD_BL_P5V TEGRA_GPIO(I, 0)
+#define GPIO_LCD_BL_N5V TEGRA_GPIO(I, 1)
+#define GPIO_LCD_BL_PWM TEGRA_GPIO(V, 0)
+#define GPIO_LCD_BL_EN TEGRA_GPIO(V, 1)
+#define GPIO_LCD_BL_RST TEGRA_GPIO(V, 2)
+
+void gpio_configure_mode(uint32_t pin, uint32_t mode);
+void gpio_configure_direction(uint32_t pin, uint32_t dir);
+void gpio_write(uint32_t pin, uint32_t value);
+uint32_t gpio_read(uint32_t pin);
diff --git a/thermosphere/src/main.c b/thermosphere/src/main.c
index 71cb59f63..5235adfe4 100644
--- a/thermosphere/src/main.c
+++ b/thermosphere/src/main.c
@@ -2,14 +2,18 @@
#include "uart.h"
#include "car.h"
#include "log.h"
+#include "gpio.h"
int main(void)
{
// Init uart (hardcoded atm)
- uart_select(UART_C);
- clkrst_reboot(CARDEVICE_UARTC);
+ gpio_configure_mode(TEGRA_GPIO(G, 0), GPIO_MODE_GPIO); // Leave UART-B as GPIO
+ gpio_configure_mode(TEGRA_GPIO(D, 1), GPIO_MODE_SFIO); // Change UART-C to SPIO
+ uart_select(UART_C); // Configure pinmux for UART-C
+ clkrst_reboot(CARDEVICE_UARTC); // Enable UART-C clock
uart_init(UART_C, 115200, true);
+ //uart_send(UART_C, "0123\n", 3);
serialLog("Hello from Thermosphere!\n");
return 0;
}
diff --git a/thermosphere/src/uart.c b/thermosphere/src/uart.c
index 1e99d6141..4f8eaf6c4 100644
--- a/thermosphere/src/uart.c
+++ b/thermosphere/src/uart.c
@@ -30,6 +30,8 @@ void uart_select(UartDevice dev) {
void uart_init(UartDevice dev, u32 baud, bool txInverted) {
volatile uart_t *uart = get_uart_device(dev);
+ uart_wait_idle(dev, UART_VENDOR_STATE_TX_IDLE);
+
/* Set baud rate. */
u32 rate = (8 * baud + 408000000) / (16 * baud);
uart->UART_LCR = UART_LCR_DLAB; /* Enable DLAB. */
@@ -49,6 +51,8 @@ void uart_init(UartDevice dev, u32 baud, bool txInverted) {
uart->UART_RX_FIFO_CFG = 1; /* Set RX_FIFO trigger level */
uart->UART_MIE = 0;
uart->UART_ASR = 0;
+
+ uart_wait_idle(dev, UART_VENDOR_STATE_TX_IDLE | UART_VENDOR_STATE_RX_IDLE);
}
/* This function blocks until the UART device (dev) is in the desired state (status). Make sure the desired state can be reached! */