mirror of
https://github.com/CTCaer/hekate
synced 2024-07-25 17:53:37 +00:00
73 lines
2 KiB
C
73 lines
2 KiB
C
/*
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* Copyright (c) 2018-2019 CTCaer
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <string.h>
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#include "hw_init.h"
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#include "bpmp.h"
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#include "clock.h"
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#include "gpio.h"
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#include "pmc.h"
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#include "t210.h"
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#include "../mem/minerva.h"
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#include "../gfx/di.h"
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#include "../input/touch.h"
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#include "../storage/sdmmc.h"
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#include "../utils/util.h"
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extern sdmmc_t sd_sdmmc;
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void reconfig_hw_workaround(bool extra_reconfig, u32 magic)
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{
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// Flush and disable MMU.
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bpmp_mmu_disable();
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bpmp_clk_rate_set(BPMP_CLK_NORMAL);
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minerva_change_freq(FREQ_204);
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touch_power_off();
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// Re-enable clocks to Audio Processing Engine as a workaround to hanging.
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CLOCK(CLK_RST_CONTROLLER_CLK_OUT_ENB_V) |= (1 << 10); // Enable AHUB clock.
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CLOCK(CLK_RST_CONTROLLER_CLK_OUT_ENB_Y) |= (1 << 6); // Enable APE clock.
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if (extra_reconfig)
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{
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msleep(10);
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PMC(APBDEV_PMC_PWR_DET_VAL) |= PMC_PWR_DET_SDMMC1_IO_EN;
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clock_disable_cl_dvfs();
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// Disable Joy-con GPIOs.
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gpio_config(GPIO_PORT_G, GPIO_PIN_0, GPIO_MODE_SPIO);
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gpio_config(GPIO_PORT_D, GPIO_PIN_1, GPIO_MODE_SPIO);
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gpio_config(GPIO_PORT_E, GPIO_PIN_6, GPIO_MODE_SPIO);
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gpio_config(GPIO_PORT_H, GPIO_PIN_6, GPIO_MODE_SPIO);
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}
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// Power off display.
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display_end();
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// Enable clock to USBD and init SDMMC1 to avoid hangs with bad hw inits.
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if (magic == 0xBAADF00D)
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{
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CLOCK(CLK_RST_CONTROLLER_CLK_OUT_ENB_L) |= (1 << 22);
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sdmmc_init(&sd_sdmmc, SDMMC_1, SDMMC_POWER_3_3, SDMMC_BUS_WIDTH_1, 5, 0);
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clock_disable_cl_dvfs();
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msleep(200);
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}
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} |