mirror of
https://github.com/CTCaer/hekate
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185526d134
BDK will allow developers to use the full collection of drivers, with limited editing, if any, for making payloads for Nintendo Switch. Using a single source for everything will also help decoupling Switch specific code and easily port it to other Tegra X1/X1+ platforms. And maybe even to lower targets. Everything is now centrilized into bdk folder. Every module or project can utilize it by simply including it. This is just the start and it will continue to improve.
69 lines
1.9 KiB
C
69 lines
1.9 KiB
C
/*
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* BPMP-Lite Cache/MMU and Frequency driver for Tegra X1
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*
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* Copyright (c) 2019-2020 CTCaer
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef _BPMP_H_
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#define _BPMP_H_
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#include "../utils/types.h"
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typedef enum
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{
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BPMP_MMU_MAINT_NOP = 0,
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BPMP_MMU_MAINT_CLEAN_PHY = 1,
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BPMP_MMU_MAINT_INVALID_PHY = 2,
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BPMP_MMU_MAINT_CLEAN_INVALID_PHY = 3,
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BPMP_MMU_MAINT_CLEAN_LINE = 9,
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BPMP_MMU_MAINT_INVALID_LINE = 10,
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BPMP_MMU_MAINT_CLEAN_INVALID_LINE = 11,
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BPMP_MMU_MAINT_CLEAN_WAY = 17,
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BPMP_MMU_MAINT_INVALID_WAY = 18,
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BPMP_MMU_MAINT_CLN_INV_WAY = 19
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} bpmp_maintenance_t;
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typedef struct _bpmp_mmu_entry_t
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{
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u32 start_addr;
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u32 end_addr;
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u32 attr;
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u32 enable;
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} bpmp_mmu_entry_t;
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typedef enum
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{
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BPMP_CLK_NORMAL, // 408MHz 0% - 136MHz APB.
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BPMP_CLK_HIGH_BOOST, // 544MHz 33% - 136MHz APB.
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BPMP_CLK_SUPER_BOOST, // 576MHz 41% - 144MHz APB.
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BPMP_CLK_HYPER_BOOST, // 589MHz 44% - 147MHz APB.
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//BPMP_CLK_DEV_BOOST, // 608MHz 49% - 152MHz APB.
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BPMP_CLK_MAX
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} bpmp_freq_t;
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#define BPMP_CLK_DEFAULT_BOOST BPMP_CLK_HYPER_BOOST
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void bpmp_mmu_maintenance(u32 op, bool force);
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void bpmp_mmu_set_entry(int idx, bpmp_mmu_entry_t *entry, bool apply);
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void bpmp_mmu_enable();
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void bpmp_mmu_disable();
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void bpmp_clk_rate_get();
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void bpmp_clk_rate_set(bpmp_freq_t fid);
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void bpmp_usleep(u32 us);
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void bpmp_msleep(u32 ms);
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void bpmp_halt();
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#endif
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