mirror of
https://github.com/CTCaer/hekate
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185526d134
BDK will allow developers to use the full collection of drivers, with limited editing, if any, for making payloads for Nintendo Switch. Using a single source for everything will also help decoupling Switch specific code and easily port it to other Tegra X1/X1+ platforms. And maybe even to lower targets. Everything is now centrilized into bdk folder. Every module or project can utilize it by simply including it. This is just the start and it will continue to improve.
119 lines
4.2 KiB
C
119 lines
4.2 KiB
C
/*
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* Copyright (c) 2018 naehrwert
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* Copyright (c) 2019 CTCaer
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef _MAX7762X_H_
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#define _MAX7762X_H_
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#include "../utils/types.h"
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/*
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* Switch Power domains (max77620):
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* Name | Usage | uV step | uV min | uV default | uV max | Init
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*-------+---------------+---------+--------+------------+---------+------------------
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* sd0 | SoC | 12500 | 600000 | 625000 | 1400000 | 1.125V (pkg1.1)
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* sd1 | SDRAM | 12500 | 600000 | 1125000 | 1125000 | 1.1V (pkg1.1)
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* sd2 | ldo{0-1, 7-8} | 12500 | 600000 | 1325000 | 1350000 | 1.325V (pcv)
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* sd3 | 1.8V general | 12500 | 600000 | 1800000 | 1800000 |
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* ldo0 | Display Panel | 25000 | 800000 | 1200000 | 1200000 | 1.2V (pkg1.1)
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* ldo1 | XUSB, PCIE | 25000 | 800000 | 1050000 | 1050000 | 1.05V (pcv)
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* ldo2 | SDMMC1 | 50000 | 800000 | 1800000 | 3300000 |
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* ldo3 | GC ASIC | 50000 | 800000 | 3100000 | 3100000 | 3.1V (pcv)
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* ldo4 | RTC | 12500 | 800000 | 850000 | 850000 |
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* ldo5 | GC Card | 50000 | 800000 | 1800000 | 1800000 | 1.8V (pcv)
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* ldo6 | Touch, ALS | 50000 | 800000 | 2900000 | 2900000 | 2.9V
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* ldo7 | XUSB | 50000 | 800000 | 1050000 | 1050000 |
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* ldo8 | XUSB, DC | 50000 | 800000 | 1050000 | 1050000 |
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*/
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/*
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* MAX77620_AME_GPIO: control GPIO modes (bits 0 - 7 correspond to GPIO0 - GPIO7); 0 -> GPIO, 1 -> alt-mode
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* MAX77620_REG_GPIOx: 0x9 sets output and enable
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*/
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/*! MAX77620 partitions. */
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#define REGULATOR_SD0 0
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#define REGULATOR_SD1 1
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#define REGULATOR_SD2 2
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#define REGULATOR_SD3 3
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#define REGULATOR_LDO0 4
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#define REGULATOR_LDO1 5
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#define REGULATOR_LDO2 6
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#define REGULATOR_LDO3 7
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#define REGULATOR_LDO4 8
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#define REGULATOR_LDO5 9
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#define REGULATOR_LDO6 10
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#define REGULATOR_LDO7 11
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#define REGULATOR_LDO8 12
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#define REGULATOR_MAX 12
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#define MAX77621_CPU_I2C_ADDR 0x1B
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#define MAX77621_GPU_I2C_ADDR 0x1C
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#define MAX77621_VOUT_REG 0
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#define MAX77621_VOUT_DVS_REG 1
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#define MAX77621_CONTROL1_REG 2
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#define MAX77621_CONTROL2_REG 3
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/* MAX77621_VOUT */
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#define MAX77621_VOUT_ENABLE (1 << 7)
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#define MAX77621_VOUT_MASK 0x7F
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#define MAX77621_VOUT_0_95V 0x37
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#define MAX77621_VOUT_1_09V 0x4F
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/* MAX77621_VOUT_DVC_DVS */
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#define MAX77621_DVS_VOUT_MASK 0x7F
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/* MAX77621_CONTROL1 */
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#define MAX77621_SNS_ENABLE (1 << 7)
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#define MAX77621_FPWM_EN_M (1 << 6)
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#define MAX77621_NFSR_ENABLE (1 << 5)
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#define MAX77621_AD_ENABLE (1 << 4)
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#define MAX77621_BIAS_ENABLE (1 << 3)
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#define MAX77621_FREQSHIFT_9PER (1 << 2)
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#define MAX77621_RAMP_12mV_PER_US 0x0
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#define MAX77621_RAMP_25mV_PER_US 0x1
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#define MAX77621_RAMP_50mV_PER_US 0x2
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#define MAX77621_RAMP_200mV_PER_US 0x3
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#define MAX77621_RAMP_MASK 0x3
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/* MAX77621_CONTROL2 */
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#define MAX77621_WDTMR_ENABLE (1 << 6)
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#define MAX77621_DISCH_ENBABLE (1 << 5)
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#define MAX77621_FT_ENABLE (1 << 4)
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#define MAX77621_T_JUNCTION_120 (1 << 7)
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#define MAX77621_CKKADV_TRIP_DISABLE 0xC
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#define MAX77621_CKKADV_TRIP_75mV_PER_US 0x0
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#define MAX77621_CKKADV_TRIP_150mV_PER_US 0x4
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#define MAX77621_CKKADV_TRIP_75mV_PER_US_HIST_DIS 0x8
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#define MAX77621_INDUCTOR_MIN_30_PER 0x0
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#define MAX77621_INDUCTOR_NOMINAL 0x1
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#define MAX77621_INDUCTOR_PLUS_30_PER 0x2
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#define MAX77621_INDUCTOR_PLUS_60_PER 0x3
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int max77620_regulator_get_status(u32 id);
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int max77620_regulator_config_fps(u32 id);
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int max77620_regulator_set_voltage(u32 id, u32 mv);
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int max77620_regulator_enable(u32 id, int enable);
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int max77620_regulator_set_volt_and_flags(u32 id, u32 mv, u8 flags);
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void max77620_config_default();
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void max77620_low_battery_monitor_config(bool enable);
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#endif
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