Commit graph

779 commits

Author SHA1 Message Date
CTCaer
91759aba95 r2p/update: Fix check for the 'if not forced' case
This fixes the following case:
When force is 0 and the payload is not hekate, the function jumps to the 'is old' check.

This skips the is magic value check and only does the version check.

In case the foreign payload has a low value on that offset, it causes an overwrite which is unneeded.
2020-01-17 09:35:16 +02:00
CTCaer
5a9bbaf900 fss0: Fix parsing Sept from fusee-secondary 2020-01-17 09:27:53 +02:00
CTCaer
01a767cbfa fss0: Fix heap corruption when sept is loaded from fss 2020-01-17 09:26:13 +02:00
CTCaer
8552a7282c ini: Fix heap corruption caused by backlight option
Additionally, name all text size values so it doesn't happen again in the future.
2020-01-17 09:22:28 +02:00
CTCaer
2a161b572b sdmmc: Set power cycle wait to 0 at boot 2020-01-17 09:19:58 +02:00
CTCaer
422852795f ini: Remove \r stripping as is done by FatFS 2020-01-17 09:18:31 +02:00
CTCaer
4d53f21387 mtc: Clear init magic on chainload
Fixes a hang caused when rebooting 2 payload from L4T with old hekate in vendor partition.

L4T does not overwrite the nyx storage where the Minerva configuration is stored.
This makes new Minerva parse the wrong tables from old hekate and eventually hang the RAM, which causes an exception on BPMP.
2020-01-14 23:41:15 +02:00
CTCaer
9263e2192f nyx: Fix low battery voltage color 2020-01-07 06:50:33 +02:00
CTCaer
c99a87dd09 clock: Move PLLC config from bpmp.c to clock.c 2020-01-07 06:46:22 +02:00
CTCaer
009db77426 bpmp: Switch to PLLC for SCLK/BPMP clock source 2020-01-07 06:26:29 +02:00
CTCaer
4e5ded7cb3
Merge pull request #340 from cclauss/patch-1
Fix compatibility with python 3
2020-01-07 06:14:51 +02:00
Christian Clauss
50f31cad14
import sys for lines 17 and 34 2020-01-04 18:05:42 +01:00
CTCaer
2f43145131 uart: Add invert, get/set IIR and fifo empty functions 2019-12-16 22:16:40 +02:00
CTCaer
e3fca2bce5 uart: Add timeout and len report to uart receive 2019-12-16 22:15:21 +02:00
CTCaer
da112a0ae9 uart: Proper uart init 2019-12-16 22:12:09 +02:00
CTCaer
90060d1d83 mtc: Don't rely on clean BSS for Minerva lib 2019-12-16 22:06:13 +02:00
CTCaer
1ccce5f1a2 gfx: Fix off-by-one in right half of 16px rendering 2019-12-16 21:49:54 +02:00
CTCaer
8584493c7f sept: Add support for loading sept from fss0
If `fss0=` key is detected, sept will be loaded from fusee-secondary.bin instead of `sept/sept_*`.

This will negate missing sept and failed to decrypt pkg2 errors, when booting HOS, for users that forget to update sept folder.
2019-12-16 00:53:22 +02:00
CTCaer
9b2d906648 hos: Add message for possible cause of unk pkg1 2019-12-14 22:43:00 +02:00
CTCaer
2aaa0331ac rtc: Add epoch convertion functions
Thanks @shchmue for the HOS conversion
2019-12-14 22:27:07 +02:00
CTCaer
7604239237 bpmp: Update driver to latest 2019-12-14 22:21:42 +02:00
CTCaer
562a6fb61d Bump hekate to v5.1.1 and Nyx to v0.8.4 2019-12-12 00:24:13 +02:00
CTCaer
938562cc0a Add info in readme about auto updating update.bin 2019-12-12 00:23:04 +02:00
CTCaer
1e4d63731b nyx: Fix about screen 2nd pane left margin 2019-12-12 00:20:14 +02:00
CTCaer
8ff01301cb btn: Fix bootwait=0 for real 2019-12-12 00:15:08 +02:00
CTCaer
a664118fc7 r2p: Update r2p payload
2 modes:
- With updater2p; Forces the reboot to payload binary to be hekate
- Without; Checks if hekate and then if old
2019-12-12 00:13:32 +02:00
CTCaer
87d376654b util: Update update.bin if old 2019-12-12 00:07:18 +02:00
CTCaer
c6e92311f9 Add error printing for issues with libraries
It will now show erros for the following:
- Missing or old libsys_minerva.bso (DRAM training).
- Missing libsys_lp0.bso (LP0 sleep mode).
- Missing or old Nyx version
2019-12-11 11:22:11 +02:00
CTCaer
24d30a40f9 hos: Add Atmosphere's system mem increase patches 2019-12-10 19:20:02 +02:00
CTCaer
ae283aef59 util: Always return result if not a single press req
This also fixes issues with 0 time out.
2019-12-10 13:49:28 +02:00
CTCaer
e4f7928513 minerva: Fix compatibility check for hekate main
Init now also returns status.
2019-12-09 22:27:01 +02:00
CTCaer
bd8a5ece58 heap: Fix type for heap monitor memset size 2019-12-09 19:30:45 +02:00
CTCaer
d0850516ab Bump hekate to v5.1.0 and Nyx to v0.8.3 2019-12-08 18:59:00 +02:00
CTCaer
4c5a78de6f hos: Fix pkg2 keygen with newer sept
This change also adds support for older sept binaries.
2019-12-08 18:32:09 +02:00
CTCaer
97d3b745d9 exo: Add support for user access to PMU flag 2019-12-08 03:02:17 +02:00
CTCaer
c12c696e53 hos: Add 9.1.0 support 2019-12-08 03:01:21 +02:00
CTCaer
f256bd5909 Move all I/DRAM addresses into a memory map
Many addresses were moved around to pack the memory usage!
2019-12-08 02:23:03 +02:00
CTCaer
0290892b23 nyx hw reconfig: Add fan and 5V regulators deinit
Additionally re-arrange minerva and mmu after these.
2019-12-08 01:41:57 +02:00
CTCaer
643a8ea8f9 fan: Update driver
Make use of 5V regulator driver and fixe some bugs
2019-12-08 01:38:12 +02:00
CTCaer
a6d8854499 power: Add 5V regulator driver 2019-12-08 01:36:35 +02:00
CTCaer
96bafd8bd7 nyx: Use color when battery voltage < 3200mV
For status bar and Battery Info.
2019-12-08 01:32:26 +02:00
CTCaer
65ee728939 nyx: Enable fan when temps are high 2019-12-08 01:26:26 +02:00
CTCaer
e1748a0727 nyx: Boost eMMC backup/restore verification times
This change allows SE to start verifying the first buffer while the 2nd is populated. Effectively cutting verification down to almost half.
2019-12-08 01:20:05 +02:00
CTCaer
6734513d47 Add missing dependencies for 2 previous commits
- hos/mtc: Add FSP WAR and boost HOS booting times
- autoboot: Support VOL-+ combo for fastboot
2019-12-08 01:15:35 +02:00
CTCaer
dbe6ed4060 autoboot: Fix custom bootlogo for boot via id 2019-12-08 01:11:13 +02:00
CTCaer
943477fdde autoboot: Support VOL-+ combo for fastboot
This is conditional:
In order to not cancel booting while trying to enter fastboot in android, the combo MUST be initiated with `VOL+` (hold) -> `VOL-` (hold)
2019-12-07 23:37:07 +02:00
CTCaer
35e853fd03 touch: Change I2C4 pinmuxing as per HOS 2019-12-07 23:23:01 +02:00
CTCaer
7e26be6587 lvgl: Optimize color blending
The manual optimization done dramatically increases performance in software color blending.
Isolated gains reach 20-30%.

Color blending calculates 2 +1 color channels instead of the expensive 1+1+1 calculations.

This is as best as it gets without going in asm optimizations.
2019-12-07 20:47:19 +02:00
CTCaer
733da0f4d5 nyx: Remove compiler flags to gain extra perf
- Removing no-inline produces 30-50% performance gains on specific real time sensitive functions used for rendering.
On overall, this will give 5-10% observed performance gains.

- Strict aliasing produces some extra small gains.
2019-12-07 20:35:17 +02:00
Kostas Missos
a357395cc6 nyx: Remove LTO in order to increase performance
Perf gains from removing LTO linker flag amounts to actually more than 5% average in real usage scenarios in Nyx.
(These include overall timings with static waits included. So basically as observed by user.)

Gains observed, on many isolated cases, were between 15-35%.

Additionally, this will make compiling fast again.
2019-12-07 20:26:51 +02:00