CTCaer
|
9a520d63a6
|
bdk: smmu: refactor driver and allow other asid
|
2024-03-13 01:54:46 +02:00 |
|
CTCaer
|
20e661fc01
|
bdk: refactor flow control defines
|
2024-03-13 01:50:45 +02:00 |
|
CTCaer
|
3a4fa12f42
|
bdk: smmu: powergate ccplex after enabling smmu
|
2024-03-13 01:44:58 +02:00 |
|
CTCaer
|
fb31cb2926
|
bdk: ccplex: add no rst vector lock & powergating
Allow not locking the reset vectors and launch a new payload after powergating ccplex.
|
2024-03-13 01:37:52 +02:00 |
|
CTCaer
|
f126486266
|
bdk: sdmmc: utilize block size defines
|
2024-03-12 15:47:14 +02:00 |
|
CTCaer
|
25b7ffecd1
|
bdk: fatfs: always align malloc to lba
|
2024-03-12 15:43:44 +02:00 |
|
CTCaer
|
7d1600b85c
|
bdk: consolidate ffsystem into bdk
|
2024-03-12 15:16:18 +02:00 |
|
CTCaer
|
83ac40c4b9
|
bdk: rtc: handle offset adjustment in-place
|
2024-03-12 15:08:55 +02:00 |
|
CTCaer
|
4131ff12d7
|
bdk: sdram: adjust sdmmc1 la for l4t
|
2024-02-21 10:50:15 +02:00 |
|
CTCaer
|
9ea847578e
|
bdk: display: add another oem clone
|
2024-02-21 10:40:46 +02:00 |
|
CTCaer
|
6d69ef3cf6
|
bdk: sprintf: allow padding > 9
|
2024-02-16 16:01:54 +02:00 |
|
CTCaer
|
f05563579e
|
bdk: max77620: raise sd1 max voltage
For T210.
|
2024-02-16 15:55:40 +02:00 |
|
CTCaer
|
644747230c
|
bdk: dram: add FPGA code for 3rd gen micron
|
2024-02-16 15:54:22 +02:00 |
|
CTCaer
|
1f30b8deb7
|
bdk: minerva: add custom option in table
|
2024-02-16 15:51:02 +02:00 |
|
CTCaer
|
bfc6069b2d
|
bdk: display: add OEM panel id
|
2024-02-14 00:08:06 +02:00 |
|
CTCaer
|
4576ed81ef
|
sdram: acquire per chip mrr info
|
2024-02-12 04:08:39 +02:00 |
|
CTCaer
|
b37430dc1d
|
bdk: update copyright year
|
2024-01-07 12:38:10 +02:00 |
|
CTCaer
|
75543875e2
|
bdk: mc: remove some redundant carveout cfg
|
2024-01-07 12:33:29 +02:00 |
|
CTCaer
|
30c320d6e7
|
bdk: sdram: update all ram info comments
|
2024-01-06 22:05:24 +02:00 |
|
CTCaer
|
eff27d92f2
|
bdk: sdram: update default wpr overrides
Since it's only used in L4T set them to the correct latest reg tool values.
HOS overrides them anyway.
|
2024-01-06 22:03:54 +02:00 |
|
CTCaer
|
3874840d77
|
bdk: sdram: update cfg for 8GB erista
|
2024-01-06 21:59:18 +02:00 |
|
CTCaer
|
74e252aaf2
|
bdk: sdram: update latest reg tool vpr overrides
Set them to default config and remove them from patching.
|
2024-01-06 21:58:51 +02:00 |
|
CTCaer
|
c7333e710c
|
bdk: strtol: support unsigned 32bit hex
If base is 16 and input is not negative allow unsigned 32bit parsing.
This allows parsing numbers of up to 4294967295 in that case.
|
2024-01-06 21:55:21 +02:00 |
|
CTCaer
|
dab5eb9aa0
|
bdk: sprintf: do not accept null chars
Skip NULL chars on putc since they break the resulted string.
|
2024-01-06 21:52:48 +02:00 |
|
CTCaer
|
92093ff08e
|
bdk: se: deduplicate sha hash extraction
|
2023-12-27 21:07:52 +02:00 |
|
CTCaer
|
2cc6cd45d9
|
bdk: dram: small refactor
|
2023-12-27 21:06:09 +02:00 |
|
CTCaer
|
a6ec41744b
|
bdk: sdram: refactor patching offsets
|
2023-12-27 21:04:04 +02:00 |
|
CTCaer
|
bb6e4deb4c
|
bdk: remove unused lp0 cfg from bdk
|
2023-12-27 21:02:33 +02:00 |
|
CTCaer
|
41d3565353
|
bdk: sdmmc: deduplicate function modes get
And parse the whole info
|
2023-12-27 15:01:20 +02:00 |
|
CTCaer
|
b584a3f53a
|
bdk: add several defines
|
2023-12-25 04:08:34 +02:00 |
|
CTCaer
|
7f98fb736a
|
bdk: hwinit: reorder sdmmc1 reg disable
|
2023-12-25 04:07:26 +02:00 |
|
CTCaer
|
87c50732c0
|
bdk: fuse: simplify idle wait
|
2023-12-25 03:47:26 +02:00 |
|
CTCaer
|
504659a39b
|
bdk: actmon: switch to averaged sampling
|
2023-12-25 03:46:05 +02:00 |
|
CTCaer
|
e47a819948
|
bdk: se: add more useful functions
- aes cmac 128bit
- aes hashing
- option to clear updated aes iv
|
2023-12-25 03:44:52 +02:00 |
|
CTCaer
|
913cdee8e8
|
bdk: sdram: rename 3rd gen t210b01 hynix ram
Confirmed to be a Hynix H54G46CYRBX267 and not a H9HCNNNBKMMLXR-NEI
|
2023-12-25 03:02:11 +02:00 |
|
CTCaer
|
eff55ff378
|
bdk: touch: rename samsung touch panel
BH2109 is the board model and not the touch panel.
|
2023-12-25 02:41:42 +02:00 |
|
CTCaer
|
09dfcfc57d
|
bdk: display: deduplicate interrupt code
|
2023-12-25 02:40:38 +02:00 |
|
CTCaer
|
239c48c790
|
bdk: usb: hid: improve stick calibration
Wait a bit before calibrating stick centers, in order to avoid bad values.
|
2023-12-25 02:37:40 +02:00 |
|
CTCaer
|
ce137852b7
|
bdk: change some defines and comments
|
2023-10-12 06:59:15 +03:00 |
|
CTCaer
|
ce42e27f45
|
bdk: minerva: do not handle oc freq
Arachne already handles it.
|
2023-08-22 16:44:41 +03:00 |
|
CTCaer
|
d73a3fdd7c
|
bdk: sdram: name 1a micron ram chips
Again, as with 3rd gen samsung and hynix, that's an educated guess.
|
2023-08-22 14:44:27 +03:00 |
|
CTCaer
|
fdf0dcc636
|
bdk: joycon: add info about sio imu report
|
2023-08-22 14:36:23 +03:00 |
|
CTCaer
|
f2bdc3f47c
|
bdk: i2c: fix stack buffer overflow
|
2023-08-07 21:02:20 +03:00 |
|
CTCaer
|
1cc97ebc51
|
bdk: update various comments
|
2023-07-31 17:03:15 +03:00 |
|
CTCaer
|
1e28320e5a
|
bdk: t210: add more mmio addresses
And simplify relevant drivers that hardcoded them.
|
2023-07-31 16:59:15 +03:00 |
|
CTCaer
|
f291a5cfa7
|
bdk: max17050: add reg dumping
|
2023-07-28 03:34:11 +03:00 |
|
CTCaer
|
9187fa7a8c
|
bdk: fuse: add all t210b01 fuses
And use B01 to distinguish the ones only on that SoC.
|
2023-07-22 07:10:12 +03:00 |
|
CTCaer
|
b9bc35a22e
|
bdk: dram: correct old comments
|
2023-07-21 18:39:46 +03:00 |
|
CTCaer
|
d7ad9b874b
|
bdk: use the typedefs on jc calib
|
2023-06-11 13:27:48 +03:00 |
|
CTCaer
|
820e6d5a6e
|
bdk: update cal0 struct
|
2023-06-10 23:48:45 +03:00 |
|