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Author SHA1 Message Date
CTCaer 6a74f6ed04 minerva: make is_pllmb and fsp automatic 
No need to keep these values around.
Software will automatically check the proper registers to get status.
 2022-01-16 01:43:16 +02:00
Kostas Missos cae9044c17 Minerva our DRAM trainer 
Supports up to 1600MHz and periodic training.

For more check here: https://github.com/CTCaer/minerva_tc
 2018-11-04 03:15:32 +02:00