nold/hekate
1
0
Fork 0
mirror of https://github.com/CTCaer/hekate synced 2024-12-22 19:31:12 +00:00
Code Issues Projects Releases Packages Wiki Activity
870 commits 2 branches 75 tags 7 MiB
Commit graph

96 commits

Author SHA1 Message Date
CTCaer
60b629e57f Move display related objects to display parrent 2020-12-28 05:19:23 +02:00
CTCaer
df80339060 mc: Simplify clock enable/reset 
Additionally utilize the redirect flag.
 2020-12-27 12:50:20 +02:00
CTCaer
11ca6caf5f clock: Add more defines and simplify some logic 2020-12-26 17:28:08 +02:00
CTCaer
15afdf53e4 clock: Add module actual frequency getter 2020-12-26 17:25:23 +02:00
CTCaer
d15f958b48 irq: Disable irq if not handled. 2020-12-26 17:22:56 +02:00
CTCaer
5fd3bdede7 pmc: Add defines for power rails 2020-12-26 17:20:26 +02:00
CTCaer
e2dd218f33 pmc: Add latest pmc secure scratch lock 2020-12-26 16:48:00 +02:00
CTCaer
2628044ba8 fuse: Move more parsing into its specific object 2020-12-26 16:34:12 +02:00
CTCaer
601c85c23e util: Refactor power management (reboot/power off) 2020-12-15 19:33:46 +02:00
CTCaer
b6ec217484 exo: Support uart logging 
This can be enabled via compile time flags or exosphere.ini.
Compile time flags override exosphere.ini
 2020-12-11 18:14:00 +02:00
CTCaer
ad560b650e nyx: di: Set display id we got from bootloader 2020-12-11 17:49:06 +02:00
CTCaer
14a048a496 nyx: Add SD init info from bootloader 
This shows info about the sd initialization process that happened on hekate main
 2020-12-11 17:46:44 +02:00
CTCaer
ba984d02eb sdmmc: Mitigate some Phison SDs which think they are SDSC 2020-12-11 17:43:01 +02:00
CTCaer
fce59fba43 nyx: Add SD card AU info 2020-12-11 17:41:09 +02:00
CTCaer
5b8fb9fb6b Various refactoring and addition of comments 2020-12-11 17:25:59 +02:00
CTCaer
8249d9e1a2 se: Ensure aligned key/iv/ctr/hash copy 2020-12-05 20:39:17 +02:00
CTCaer
cf1f94662c sdram: Correct some dram names 2020-12-02 22:26:06 +02:00
CTCaer
aaaf470dcf display: Provide dsi command reading/writing to user 
These work while video stream is either disabled or enabled.
 2020-12-02 02:09:49 +02:00
CTCaer
c13eabcde8 sdmmc: Add T210B01 support 
The driver was working before this, but adding the changes provides a proper and better sdmmc controller inner state.
 2020-12-02 02:07:15 +02:00
CTCaer
d1e3a0fdff display: Add new Switch Lite panel support 2020-12-02 01:53:00 +02:00
CTCaer
0954eb2b09 nyx: Use full shutdown based reboot on T210B01 
That's because of how the system is exploited.
 2020-12-02 01:45:12 +02:00
CTCaer
0ccea3aa83 usb: Improve UMS ejection heuristic 2020-12-02 01:16:45 +02:00
CTCaer
a1188505e8 usb: Add XUSB support mainly for T210B01 2020-12-02 01:13:52 +02:00
CTCaer
202540c7f7 joycon: Disable driver for Switch Lite 2020-12-02 00:51:29 +02:00
CTCaer
da0cdf1bd0 hos: Add stock secmon support for Mariko 2020-07-04 21:58:21 +03:00
CTCaer
5ffbbf40a5 hos: Add Mariko keygen 2020-07-04 21:13:25 +03:00
CTCaer
a36fec5696 clock: Lock clock to always enabled for SE in T210B01 2020-07-04 21:07:25 +03:00
CTCaer
8d2230dc51 fuse: Correct fuse array size for T210B01 2020-07-04 21:04:20 +03:00
CTCaer
528ddbe12c minerva: Disable for T210B01 
Minerva is currently unsupported for Mariko LPDDR4X.
 2020-07-04 21:02:45 +03:00
CTCaer
fbbfeb2d1c se: Add a T210B01 only register 2020-06-26 22:31:23 +03:00
CTCaer
ccaf49bece display: Add T210B01 support 2020-06-26 22:29:52 +03:00
CTCaer
147fed39c8 ccplex: Add regulator for T210B01 2020-06-26 19:02:37 +03:00
CTCaer
d0a73bdc72 sc7: Add T210B01 SC7/LP0 (deep sleep) support 
Note to future self: Almost a month passed and nothing changed, have fun cleaning that in the end...
 2020-06-26 19:00:30 +03:00
CTCaer
29dc122dd4 sdram: Add T210B01 support & new LPDDR4X tables 2020-06-26 18:53:12 +03:00
CTCaer
293c47774d fuse: Add NX hw type getter 2020-06-26 18:45:21 +03:00
CTCaer
795ed8aadc hwinit: Add T210B01 support 2020-06-26 18:42:31 +03:00
CTCaer
377825d4fb usb gadgets: Replace error status labels with error label and color 2020-11-26 01:58:13 +02:00
CTCaer
b89bb35054 usb: Refactor some variables 2020-11-26 01:55:33 +02:00
CTCaer
caae685fab usb: Add buffer alignment checks 
EDCI/EHCI controllers only allow 0x1000 aligned buffers.
So reply with a specific error type instead of a EP xfer error.
 2020-11-26 01:54:10 +02:00
CTCaer
bd4517abab usb: Name all controller errors 2020-11-26 01:50:49 +02:00
CTCaer
095b234fce max17050: Be explicit about hardcoded calculations 2020-11-26 01:44:04 +02:00
CTCaer
b1c09f8a9c max77620: Change try set to just retry if i2c xfer failed 2020-11-26 01:43:19 +02:00
CTCaer
cabaa6cfb8 Utilize BIT macro everywhere 2020-11-26 01:41:45 +02:00
CTCaer
94486873c1 di: Skip panel deinit if DI was not properly deinit'ed 2020-11-26 01:12:44 +02:00
CTCaer
89a4eadab0 sdmmc: Refactor some names 2020-11-26 01:08:42 +02:00
CTCaer
55395ea4fd sdmmc: Correct bus speed for SDR25 
Fix bus speed on SDR25 even if all UHS cards support SDR50 and SDR104.
 2020-11-15 15:11:19 +02:00
CTCaer
4166a3c128 sdmmc: Add more debugging 2020-11-15 15:08:53 +02:00
CTCaer
ab7a81081c t210: Refactor AHB Gizmo registers 2020-11-15 14:46:42 +02:00
CTCaer
8a352bdfe2 usb: Split init into PHY init and device init 2020-11-15 14:45:48 +02:00
CTCaer
721e926a75 usb: Do proper UTMIPLL_HW_PWRDN_CFG0 config 2020-11-15 14:44:35 +02:00