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https://github.com/CTCaer/hekate
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nyx: Add DRAM names info + Mariko new ram codes
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parent
1c9efa327c
commit
e4c0756ded
1 changed files with 81 additions and 9 deletions
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@ -534,20 +534,92 @@ static lv_res_t _create_window_fuses_info_status(lv_obj_t *btn)
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char *txt_buf = (char *)malloc(0x4000);
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char *txt_buf = (char *)malloc(0x4000);
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// Decode fuses.
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// Decode fuses.
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char *sku;
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char dram_man[32];
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u32 odm4 = fuse_read_odm(4);
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u32 odm4 = fuse_read_odm(4);
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u8 dram_id = (odm4 >> 3) & 0x1F;
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u8 dram_id = (odm4 >> 3) & 0x1F;
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char dram_man[16] = {0};
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u32 hw_type3 = (odm4 & 0xF0000) >> 16;
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switch (dram_id)
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switch (hw_type3)
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{
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{
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case 0:
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case 0:
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case 4:
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sku = "Icosa (Erista)";
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s_printf(dram_man, "Samsung %s", (!dram_id) ? "4GB" : "6GB");
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break;
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break;
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case 1:
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case 1:
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strcpy(dram_man, "Hynix 4GB");
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sku = "Iowa (Mariko)";
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break;
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break;
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case 2:
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case 2:
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strcpy(dram_man, "Micron 4GB");
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sku = "Hoag (Mariko)";
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break;
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case 4:
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sku = "Calcio (Mariko)";
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break;
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default:
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sku = "Unknown";
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break;
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}
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switch (dram_id)
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{
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// LPDDR4 3200Mbps.
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case LPDDR4_ICOSA_4GB_SAMSUNG_K4F6E304HB_MGCH:
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case LPDDR4_COPPER_4GB_SAMSUNG_K4F6E304HB_MGCH:
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strcpy(dram_man, "Samsung K4F6E304HB-MGCH 4GB");
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break;
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case LPDDR4_ICOSA_4GB_HYNIX_H9HCNNNBPUMLHR_NLE:
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case LPDDR4_COPPER_4GB_HYNIX_H9HCNNNBPUMLHR_NLE:
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strcpy(dram_man, "Hynix H9HCNNNBPUMLHR-NLE 4GB");
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break;
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case LPDDR4_ICOSA_4GB_MICRON_MT53B512M32D2NP_062_WT:
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case LPDDR4_COPPER_4GB_MICRON_MT53B512M32D2NP_062_WT:
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strcpy(dram_man, "Micron MT53B512M32D2NP-062");
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break;
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case LPDDR4_ICOSA_6GB_SAMSUNG_K4FHE3D4HM_MGCH:
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strcpy(dram_man, "Samsung K4FHE3D4HM-MGCH 6GB");
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break;
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// LPDDR4X 3733Mbps.
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case LPDDR4X_IOWA_4GB_SAMSUNG_X1X2:
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strcpy(dram_man, "Samsung X1X2 4GB");
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break;
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case LPDDR4X_IOWA_4GB_SAMSUNG_K4U6E3S4AM_MGCJ:
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case LPDDR4X_HOAG_4GB_SAMSUNG_K4U6E3S4AM_MGCJ:
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strcpy(dram_man, "Samsung K4U6E3S4AM-MGCJ 4GB");
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break;
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case LPDDR4X_IOWA_8GB_SAMSUNG_K4UBE3D4AM_MGCJ:
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case LPDDR4X_HOAG_8GB_SAMSUNG_K4UBE3D4AM_MGCJ:
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strcpy(dram_man, "Samsung K4UBE3D4AM-MGCJ 8GB");
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break;
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case LPDDR4X_IOWA_4GB_HYNIX_H9HCNNNBKMMLHR_NME:
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case LPDDR4X_HOAG_4GB_HYNIX_H9HCNNNBKMMLHR_NME:
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strcpy(dram_man, "Hynix H9HCNNNBKMMLHR-NME 4GB");
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break;
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case LPDDR4X_IOWA_4GB_MICRON_MT53E512M32D2NP_046_WT: // 4266Mbps.
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case LPDDR4X_HOAG_4GB_MICRON_MT53E512M32D2NP_046_WT: // 4266Mbps.
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strcpy(dram_man, "Micron MT53E512M32D2NP-046 4GB");
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break;
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// LPDDR4X 4266Mbps?
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case LPDDR4X_IOWA_4GB_SAMSUNG_Y:
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strcpy(dram_man, "Samsung Y 4GB");
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break;
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case LPDDR4X_IOWA_4GB_SAMSUNG_1Y_X:
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case LPDDR4X_HOAG_4GB_SAMSUNG_1Y_X:
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case LPDDR4X_SDS_4GB_SAMSUNG_1Y_X:
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strcpy(dram_man, "Samsung 1y X 4GB");
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break;
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case LPDDR4X_IOWA_8GB_SAMSUNG_1Y_X:
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case LPDDR4X_SDS_8GB_SAMSUNG_1Y_X:
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strcpy(dram_man, "Samsung 1y X 8GB");
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break;
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case LPDDR4X_IOWA_4GB_SAMSUNG_1Y_Y:
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strcpy(dram_man, "Samsung 1y Y 4GB");
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break;
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case LPDDR4X_IOWA_8GB_SAMSUNG_1Y_Y:
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strcpy(dram_man, "Samsung 1y Y 8GB");
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break;
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case LPDDR4X_IOWA_4GB_SAMSUNG_1Y_A:
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strcpy(dram_man, "Samsung 1y A 4GB");
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break;
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break;
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default:
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default:
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strcpy(dram_man, "Unknown");
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strcpy(dram_man, "Unknown");
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@ -572,11 +644,11 @@ static lv_res_t _create_window_fuses_info_status(lv_obj_t *btn)
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u32 chip_id = APB_MISC(APB_MISC_GP_HIDREV);
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u32 chip_id = APB_MISC(APB_MISC_GP_HIDREV);
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// Parse fuses and display them.
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// Parse fuses and display them.
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s_printf(txt_buf,
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s_printf(txt_buf,
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"\n%X - %s - %s\n%d - %s\n%d - %d\n%08X%08X%08X%08X\n%08X\n"
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"\n%X - %s - %s\n%02d: %s\n%d - %d\n%08X%08X%08X%08X\n%08X\n"
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"%s\n%d.%02d (0x%X)\n%d.%02d (0x%X)\n%d\n%d\n%d\n%d\n%d\n0x%X\n%d\n%d\n%d\n%d\n"
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"%s\n%d.%02d (0x%X)\n%d.%02d (0x%X)\n%d\n%d\n%d\n%d\n%d\n0x%X\n%d\n%d\n%d\n%d\n"
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"%d\n%d\n%d (0x%X)\n%d\n%d\n%d\n%d\n"
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"%d\n%d\n%d (0x%X)\n%d\n%d\n%d\n%d\n"
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"ID: %02X, Major: A0%d, Minor: %d",
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"ID: %02X, Major: A0%d, Minor: %d",
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FUSE(FUSE_SKU_INFO), odm4 & 0x30000 ? "Mariko" : "Erista", (fuse_read_odm(4) & 3) ? "Dev" : "Retail",
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FUSE(FUSE_SKU_INFO), sku, (fuse_read_odm(4) & 3) ? "Dev" : "Retail",
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dram_id, dram_man, burnt_fuses_7, burnt_fuses_6,
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dram_id, dram_man, burnt_fuses_7, burnt_fuses_6,
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byte_swap_32(FUSE(FUSE_PRIVATE_KEY0)), byte_swap_32(FUSE(FUSE_PRIVATE_KEY1)),
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byte_swap_32(FUSE(FUSE_PRIVATE_KEY0)), byte_swap_32(FUSE(FUSE_PRIVATE_KEY1)),
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byte_swap_32(FUSE(FUSE_PRIVATE_KEY2)), byte_swap_32(FUSE(FUSE_PRIVATE_KEY3)),
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byte_swap_32(FUSE(FUSE_PRIVATE_KEY2)), byte_swap_32(FUSE(FUSE_PRIVATE_KEY3)),
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@ -612,7 +684,7 @@ static lv_res_t _create_window_fuses_info_status(lv_obj_t *btn)
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u32 ranks = EMC(EMC_ADR_CFG) + 1;
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u32 ranks = EMC(EMC_ADR_CFG) + 1;
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u32 channels = (EMC(EMC_FBIO_CFG7) >> 1) & 3;
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u32 channels = (EMC(EMC_FBIO_CFG7) >> 1) & 3;
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u32 die_channels = ranks * ((channels & 1) + ((channels & 2) >> 1));
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u32 die_channels = ranks * ((channels & 1) + ((channels & 2) >> 1));
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s_printf(txt_buf, "#00DDFF LPDDR4 SDRAM ##FF8000 Slot 0 | Slot 1:#\n#FF8000 Vendor:# ");
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s_printf(txt_buf, "#00DDFF %s SDRAM ##FF8000 (Ch 0 | Ch 1):#\n#FF8000 Vendor:# ", hw_type3 ? "LPDDR4X" : "LPDDR4");
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switch (ram_vendor.rank0_ch0)
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switch (ram_vendor.rank0_ch0)
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{
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{
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case 1:
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case 1:
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