From da112a0ae9f83c95c650a6336e80774c703b7aa6 Mon Sep 17 00:00:00 2001 From: CTCaer Date: Mon, 16 Dec 2019 22:12:09 +0200 Subject: [PATCH] uart: Proper uart init --- bootloader/soc/uart.c | 11 +++++++++-- nyx/nyx_gui/soc/uart.c | 11 +++++++++-- 2 files changed, 18 insertions(+), 4 deletions(-) diff --git a/bootloader/soc/uart.c b/bootloader/soc/uart.c index 63a6bcd..74f0af9 100644 --- a/bootloader/soc/uart.c +++ b/bootloader/soc/uart.c @@ -31,14 +31,21 @@ void uart_init(u32 idx, u32 baud) // Misc settings. u32 rate = (8 * baud + 408000000) / (16 * baud); uart->UART_IER_DLAB = 0; // Disable interrupts. - uart->UART_MCR = 0; // Disable hardware flow control. uart->UART_LCR = UART_LCR_DLAB | UART_LCR_WORD_LENGTH_8; // Enable DLAB & set 8n1 mode. uart->UART_THR_DLAB = (u8)rate; // Divisor latch LSB. uart->UART_IER_DLAB = (u8)(rate >> 8); // Divisor latch MSB. uart->UART_LCR = UART_LCR_WORD_LENGTH_8; // Disable DLAB. + (void)uart->UART_SPR; // Setup and flush fifo. - uart->UART_IIR_FCR = UART_IIR_FCR_EN_FIFO | UART_IIR_FCR_RX_CLR | UART_IIR_FCR_TX_CLR; + uart->UART_IIR_FCR = UART_IIR_FCR_EN_FIFO; + (void)uart->UART_SPR; + usleep(20); + uart->UART_MCR = 0; // Disable hardware flow control. + usleep(96); + uart->UART_IIR_FCR = UART_IIR_FCR_EN_FIFO | UART_IIR_FCR_TX_CLR | UART_IIR_FCR_RX_CLR; + + // Wait 3 symbols for baudrate change. usleep(3 * ((baud + 999999) / baud)); uart_wait_idle(idx, UART_TX_IDLE | UART_RX_IDLE); } diff --git a/nyx/nyx_gui/soc/uart.c b/nyx/nyx_gui/soc/uart.c index 63a6bcd..74f0af9 100644 --- a/nyx/nyx_gui/soc/uart.c +++ b/nyx/nyx_gui/soc/uart.c @@ -31,14 +31,21 @@ void uart_init(u32 idx, u32 baud) // Misc settings. u32 rate = (8 * baud + 408000000) / (16 * baud); uart->UART_IER_DLAB = 0; // Disable interrupts. - uart->UART_MCR = 0; // Disable hardware flow control. uart->UART_LCR = UART_LCR_DLAB | UART_LCR_WORD_LENGTH_8; // Enable DLAB & set 8n1 mode. uart->UART_THR_DLAB = (u8)rate; // Divisor latch LSB. uart->UART_IER_DLAB = (u8)(rate >> 8); // Divisor latch MSB. uart->UART_LCR = UART_LCR_WORD_LENGTH_8; // Disable DLAB. + (void)uart->UART_SPR; // Setup and flush fifo. - uart->UART_IIR_FCR = UART_IIR_FCR_EN_FIFO | UART_IIR_FCR_RX_CLR | UART_IIR_FCR_TX_CLR; + uart->UART_IIR_FCR = UART_IIR_FCR_EN_FIFO; + (void)uart->UART_SPR; + usleep(20); + uart->UART_MCR = 0; // Disable hardware flow control. + usleep(96); + uart->UART_IIR_FCR = UART_IIR_FCR_EN_FIFO | UART_IIR_FCR_TX_CLR | UART_IIR_FCR_RX_CLR; + + // Wait 3 symbols for baudrate change. usleep(3 * ((baud + 999999) / baud)); uart_wait_idle(idx, UART_TX_IDLE | UART_RX_IDLE); }