mirror of
https://github.com/CTCaer/hekate
synced 2024-12-22 19:31:12 +00:00
sdmmc: Add T210B01 support
The driver was working before this, but adding the changes provides a proper and better sdmmc controller inner state.
This commit is contained in:
CTCaer
parent
8e45fcc069
commit
c13eabcde8
4 changed files with 219 additions and 69 deletions
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@ -71,6 +71,18 @@
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#define PINMUX_AUX_GPIO_PH6 0x250
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#define PINMUX_AUX_GPIO_PK3 0x260
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#define PINMUX_AUX_GPIO_PZ1 0x280
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/* Only in T210B01 */
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#define PINMUX_AUX_SDMMC2_DAT0 0x294
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#define PINMUX_AUX_SDMMC2_DAT1 0x298
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#define PINMUX_AUX_SDMMC2_DAT2 0x29C
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#define PINMUX_AUX_SDMMC2_DAT3 0x2A0
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#define PINMUX_AUX_SDMMC2_DAT4 0x2A4
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#define PINMUX_AUX_SDMMC2_DAT5 0x2A8
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#define PINMUX_AUX_SDMMC2_DAT6 0x2AC
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#define PINMUX_AUX_SDMMC2_DAT7 0x2B0
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#define PINMUX_AUX_SDMMC2_CLK 0x2B4
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#define PINMUX_AUX_SDMMC2_CMD 0x2BC
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/*! 0:UART-A, 1:UART-B, 3:UART-C, 3:UART-D */
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#define PINMUX_AUX_UARTX_TX(x) (0xE4 + 0x10 * (x))
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#define PINMUX_AUX_UARTX_RX(x) (0xE8 + 0x10 * (x))
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@ -1205,9 +1205,10 @@ static bool _sdmmc_storage_get_low_voltage_support(u32 bus_width, u32 type)
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void sdmmc_storage_init_wait_sd()
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{
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// T210/T210B01 WAR: Wait exactly 239ms for IO and Controller power to discharge.
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u32 sd_poweroff_time = (u32)get_tmr_ms() - sd_power_cycle_time_start;
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if (sd_poweroff_time < 100)
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msleep(100 - sd_poweroff_time);
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if (sd_poweroff_time < 239)
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msleep(239 - sd_poweroff_time);
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}
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int sdmmc_storage_init_sd(sdmmc_storage_t *storage, sdmmc_t *sdmmc, u32 bus_width, u32 type)
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@ -24,6 +24,7 @@
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#include <soc/bpmp.h>
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#include <soc/clock.h>
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#include <soc/gpio.h>
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#include <soc/hw_init.h>
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#include <soc/pinmux.h>
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#include <soc/pmc.h>
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#include <soc/t210.h>
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@ -115,7 +116,7 @@ void sdmmc_save_tap_value(sdmmc_t *sdmmc)
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static int _sdmmc_config_tap_val(sdmmc_t *sdmmc, u32 type)
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{
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const u32 dqs_trim_val = 0x28;
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const u32 tap_values[] = { 4, 0, 3, 0 };
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const u32 tap_values_t210[] = { 4, 0, 3, 0 };
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u32 tap_val = 0;
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@ -132,9 +133,8 @@ static int _sdmmc_config_tap_val(sdmmc_t *sdmmc, u32 type)
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tap_val = sdmmc->venclkctl_tap;
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}
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else
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{
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tap_val = tap_values[sdmmc->id];
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}
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tap_val = sdmmc->t210b01 ? 11 : tap_values_t210[sdmmc->id];
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sdmmc->regs->venclkctl = (sdmmc->regs->venclkctl & 0xFF00FFFF) | (tap_val << 16);
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return 1;
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@ -154,16 +154,28 @@ static void _sdmmc_pad_config_fallback(sdmmc_t *sdmmc, u32 power)
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if (power == SDMMC_POWER_OFF)
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break;
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u32 sdmmc1_pad_cfg = APB_MISC(APB_MISC_GP_SDMMC1_PAD_CFGPADCTRL) & 0xF8080FFF;
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if (power == SDMMC_POWER_1_8)
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APB_MISC(APB_MISC_GP_SDMMC1_PAD_CFGPADCTRL) = sdmmc1_pad_cfg | (0xB0F << 12); // Up: 11, Dn: 15. For 33 ohm.
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if (sdmmc->t210b01)
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sdmmc1_pad_cfg |= (0x808 << 12); // Up: 8, Dn: 8. For 33 ohm.
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else if (power == SDMMC_POWER_1_8)
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sdmmc1_pad_cfg |= (0xB0F << 12); // Up: 11, Dn: 15. For 33 ohm.
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else if (power == SDMMC_POWER_3_3)
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APB_MISC(APB_MISC_GP_SDMMC1_PAD_CFGPADCTRL) = sdmmc1_pad_cfg | (0xC0C << 12); // Up: 12, Dn: 12. For 33 ohm.
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sdmmc1_pad_cfg |= (0xC0C << 12); // Up: 12, Dn: 12. For 33 ohm.
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APB_MISC(APB_MISC_GP_SDMMC1_PAD_CFGPADCTRL) = sdmmc1_pad_cfg;
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(void)APB_MISC(APB_MISC_GP_SDMMC1_PAD_CFGPADCTRL); // Commit write.
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break;
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case SDMMC_2:
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if (sdmmc->t210b01)
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APB_MISC(APB_MISC_GP_EMMC2_PAD_CFGPADCTRL) = (APB_MISC(APB_MISC_GP_EMMC2_PAD_CFGPADCTRL) & 0xF8080FFF) | 0xA0A000;
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else
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APB_MISC(APB_MISC_GP_EMMC2_PAD_CFGPADCTRL) = (APB_MISC(APB_MISC_GP_EMMC2_PAD_CFGPADCTRL) & 0xFFFFC003) | 0x1040; // PU:16, PD:16.
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(void)APB_MISC(APB_MISC_GP_EMMC2_PAD_CFGPADCTRL);
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break;
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case SDMMC_4: // 50 Ohm 2X Driver. PU:16, PD:16.
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APB_MISC(APB_MISC_GP_EMMC4_PAD_CFGPADCTRL) = (APB_MISC(APB_MISC_GP_EMMC4_PAD_CFGPADCTRL) & 0xFFFFC003) | 0x1040;
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case SDMMC_4: // 50 Ohm 2X Driver. PU:16, PD:16, B01: PU:10, PD:10.
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APB_MISC(APB_MISC_GP_EMMC4_PAD_CFGPADCTRL) =
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(APB_MISC(APB_MISC_GP_EMMC4_PAD_CFGPADCTRL) & 0xFFFFC003) | (sdmmc->t210b01 ? 0xA28 : 0x1040);
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(void)APB_MISC(APB_MISC_GP_EMMC4_PAD_CFGPADCTRL); // Commit write.
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break;
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}
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}
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@ -199,24 +211,18 @@ static void _sdmmc_autocal_execute(sdmmc_t *sdmmc, u32 power)
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break;
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}
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}
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/*
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// Check if PU results are inside limits.
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// SDMMC1: CZ pads - 7-bit PU. SDMMC2/4: LV_CZ pads - 5-bit PU.
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u8 autocal_pu_status = sdmmc->regs->autocalsts & 0x7F;
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switch (sdmmc->id)
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{
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case SDMMC_1:
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if (!autocal_pu_status || autocal_pu_status == 0x7F)
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timeout = 0;
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break;
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case SDMMC_2:
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case SDMMC_4:
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autocal_pu_status &= 0x1F;
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if (!autocal_pu_status || autocal_pu_status == 0x1F)
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timeout = 0;
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break;
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}
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*/
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#ifdef ERROR_EXTRA_PRINTING
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// Check if Comp pad is open or short to ground.
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// SDMMC1: CZ pads - T210/T210B01: 7-bit/5-bit. SDMMC2/4: LV_CZ pads - 5-bit.
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u8 code_mask = (sdmmc->t210b01 || sdmmc->id != SDMMC_1) ? 0x1F : 0x7F;
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u8 autocal_pu_status = sdmmc->regs->autocalsts & code_mask;
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if (!autocal_pu_status)
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EPRINTF("SDMMC: Comp Pad short to gnd!");
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else if (autocal_pu_status == code_mask)
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EPRINTF("SDMMC: Comp Pad open!");
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#endif
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// In case auto calibration fails, we load suggested standard values.
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if (!timeout)
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{
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@ -289,6 +295,15 @@ static void _sdmmc_reset(sdmmc_t *sdmmc)
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;
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}
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static void _sdmmc_reset_all(sdmmc_t *sdmmc)
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{
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sdmmc->regs->swrst |= SDHCI_RESET_ALL;
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_sdmmc_commit_changes(sdmmc);
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u32 timeout = get_tmr_ms() + 2000;//100ms
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while ((sdmmc->regs->swrst & SDHCI_RESET_ALL) && get_tmr_ms() < timeout)
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;
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}
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int sdmmc_setup_clock(sdmmc_t *sdmmc, u32 type)
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{
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// Disable the SD clock if it was enabled, and reenable it later.
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@ -384,7 +399,7 @@ int sdmmc_setup_clock(sdmmc_t *sdmmc, u32 type)
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static void _sdmmc_card_clock_enable(sdmmc_t *sdmmc)
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{
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// Recalibrate conditionally.
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if ((sdmmc->id == SDMMC_1) && !sdmmc->powersave_enabled)
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if (sdmmc->manual_cal && !sdmmc->powersave_enabled)
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_sdmmc_autocal_execute(sdmmc, sdmmc_get_io_power(sdmmc));
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if (!sdmmc->powersave_enabled)
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@ -404,7 +419,7 @@ static void _sdmmc_sd_clock_disable(sdmmc_t *sdmmc)
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void sdmmc_card_clock_powersave(sdmmc_t *sdmmc, int powersave_enable)
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{
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// Recalibrate periodically for SDMMC1.
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if ((sdmmc->id == SDMMC_1) && !powersave_enable && sdmmc->card_clock_enabled)
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if (sdmmc->manual_cal && !powersave_enable && sdmmc->card_clock_enabled)
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_sdmmc_autocal_execute(sdmmc, sdmmc_get_io_power(sdmmc));
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sdmmc->powersave_enabled = powersave_enable;
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@ -749,13 +764,24 @@ static int _sdmmc_autocal_config_offset(sdmmc_t *sdmmc, u32 power)
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case SDMMC_1:
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if (power == SDMMC_POWER_1_8)
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{
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off_pd = 123;
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off_pu = 123;
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if (!sdmmc->t210b01)
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{
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off_pd = 123;
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off_pu = 123;
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}
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else
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{
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off_pd = 6;
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off_pu = 6;
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}
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}
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else if (power == SDMMC_POWER_3_3)
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{
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off_pd = 125;
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off_pu = 0;
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if (!sdmmc->t210b01)
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{
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off_pd = 125;
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off_pu = 0;
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}
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}
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else
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return 0;
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@ -861,7 +887,7 @@ int sdmmc_stop_transmission(sdmmc_t *sdmmc, u32 *rsp)
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return 0;
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// Recalibrate periodically for SDMMC1.
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if ((sdmmc->id == SDMMC_1) && sdmmc->powersave_enabled)
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if (sdmmc->manual_cal && sdmmc->powersave_enabled)
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_sdmmc_autocal_execute(sdmmc, sdmmc_get_io_power(sdmmc));
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bool should_disable_sd_clock = false;
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@ -1079,7 +1105,46 @@ static void _sdmmc_config_sdmmc1_schmitt()
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PINMUX_AUX(PINMUX_AUX_SDMMC1_DAT0) |= PINMUX_SCHMT;
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}
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static int _sdmmc_config_sdmmc1()
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static void _sdmmc_config_sdmmc2_schmitt()
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{
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PINMUX_AUX(PINMUX_AUX_SDMMC2_CLK) |= PINMUX_SCHMT;
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PINMUX_AUX(PINMUX_AUX_SDMMC2_CMD) |= PINMUX_SCHMT;
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PINMUX_AUX(PINMUX_AUX_SDMMC2_DAT7) |= PINMUX_SCHMT;
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PINMUX_AUX(PINMUX_AUX_SDMMC2_DAT6) |= PINMUX_SCHMT;
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PINMUX_AUX(PINMUX_AUX_SDMMC2_DAT5) |= PINMUX_SCHMT;
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PINMUX_AUX(PINMUX_AUX_SDMMC2_DAT4) |= PINMUX_SCHMT;
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PINMUX_AUX(PINMUX_AUX_SDMMC2_DAT3) |= PINMUX_SCHMT;
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PINMUX_AUX(PINMUX_AUX_SDMMC2_DAT2) |= PINMUX_SCHMT;
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PINMUX_AUX(PINMUX_AUX_SDMMC2_DAT1) |= PINMUX_SCHMT;
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PINMUX_AUX(PINMUX_AUX_SDMMC2_DAT0) |= PINMUX_SCHMT;
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}
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static void _sdmmc_config_sdmmc1_pads(bool discharge)
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{
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u32 sdmmc1_pin_mask = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_3 | GPIO_PIN_4 | GPIO_PIN_5;
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// Set values for Reset state.
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u32 function = GPIO_MODE_SPIO;
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u32 level = GPIO_LOW;
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u32 output = GPIO_OUTPUT_DISABLE;
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// Set values for dicharging.
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if (discharge)
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{
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function = GPIO_MODE_GPIO;
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level = GPIO_HIGH;
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output = GPIO_OUTPUT_ENABLE;
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}
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// Set all pads function.
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gpio_config(GPIO_PORT_M, sdmmc1_pin_mask, function);
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// Set all pads output level.
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gpio_write(GPIO_PORT_M, sdmmc1_pin_mask, level);
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// Set all pads output.
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gpio_output_enable(GPIO_PORT_M, sdmmc1_pin_mask, output);
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}
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static int _sdmmc_config_sdmmc1(bool t210b01)
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{
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// Configure SD card detect.
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PINMUX_AUX(PINMUX_AUX_GPIO_PZ1) = PINMUX_INPUT_ENABLE | PINMUX_PULL_UP | 2; // GPIO control, pull up.
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@ -1104,28 +1169,35 @@ static int _sdmmc_config_sdmmc1()
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// Enable deep loopback for SDMMC1 CLK pad.
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APB_MISC(APB_MISC_GP_SDMMC1_CLK_LPBK_CONTROL) = 1;
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// Configure SDMMC1 pinmux.
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PINMUX_AUX(PINMUX_AUX_SDMMC1_CLK) = PINMUX_DRIVE_2X | PINMUX_INPUT_ENABLE | PINMUX_PARKED;
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PINMUX_AUX(PINMUX_AUX_SDMMC1_CMD) = PINMUX_DRIVE_2X | PINMUX_INPUT_ENABLE | PINMUX_PARKED | PINMUX_PULL_UP;
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PINMUX_AUX(PINMUX_AUX_SDMMC1_DAT3) = PINMUX_DRIVE_2X | PINMUX_INPUT_ENABLE | PINMUX_PARKED | PINMUX_PULL_UP;
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PINMUX_AUX(PINMUX_AUX_SDMMC1_DAT2) = PINMUX_DRIVE_2X | PINMUX_INPUT_ENABLE | PINMUX_PARKED | PINMUX_PULL_UP;
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PINMUX_AUX(PINMUX_AUX_SDMMC1_DAT1) = PINMUX_DRIVE_2X | PINMUX_INPUT_ENABLE | PINMUX_PARKED | PINMUX_PULL_UP;
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PINMUX_AUX(PINMUX_AUX_SDMMC1_DAT0) = PINMUX_DRIVE_2X | PINMUX_INPUT_ENABLE | PINMUX_PARKED | PINMUX_PULL_UP;
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// Configure SDMMC1 CLK pinmux, based on state and SoC type.
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if (PINMUX_AUX(PINMUX_AUX_SDMMC1_CLK) != (PINMUX_DRIVE_2X | PINMUX_INPUT_ENABLE | PINMUX_PULL_DOWN)) // Check if CLK pad is already configured.
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PINMUX_AUX(PINMUX_AUX_SDMMC1_CLK) = PINMUX_DRIVE_2X | PINMUX_INPUT_ENABLE | (t210b01 ? PINMUX_PULL_NONE : PINMUX_PULL_DOWN);
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// Configure reset state of SDMMC1 pins pinmux.
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PINMUX_AUX(PINMUX_AUX_SDMMC1_CMD) = PINMUX_DRIVE_2X | PINMUX_INPUT_ENABLE | PINMUX_PULL_UP;
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PINMUX_AUX(PINMUX_AUX_SDMMC1_DAT3) = PINMUX_DRIVE_2X | PINMUX_INPUT_ENABLE | PINMUX_PULL_UP;
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PINMUX_AUX(PINMUX_AUX_SDMMC1_DAT2) = PINMUX_DRIVE_2X | PINMUX_INPUT_ENABLE | PINMUX_PULL_UP;
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PINMUX_AUX(PINMUX_AUX_SDMMC1_DAT1) = PINMUX_DRIVE_2X | PINMUX_INPUT_ENABLE | PINMUX_PULL_UP;
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PINMUX_AUX(PINMUX_AUX_SDMMC1_DAT0) = PINMUX_DRIVE_2X | PINMUX_INPUT_ENABLE | PINMUX_PULL_UP;
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// Force schmitt trigger for T210B01.
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if (t210b01)
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_sdmmc_config_sdmmc1_schmitt();
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// Make sure the SDMMC1 controller is powered.
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PMC(APBDEV_PMC_NO_IOPOWER) |= PMC_NO_IOPOWER_SDMMC1_IO_EN;
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usleep(1000);
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PMC(APBDEV_PMC_NO_IOPOWER) &= ~(PMC_NO_IOPOWER_SDMMC1_IO_EN);
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(void)PMC(APBDEV_PMC_NO_IOPOWER); // Commit write.
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// Inform IO pads that voltage is gonna be 3.3V.
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PMC(APBDEV_PMC_PWR_DET_VAL) |= PMC_PWR_DET_SDMMC1_IO_EN;
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(void)PMC(APBDEV_PMC_PWR_DET_VAL); // Commit write.
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// Set enable SD card power.
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PINMUX_AUX(PINMUX_AUX_DMIC3_CLK) = PINMUX_PULL_DOWN | 2; // Pull down.
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gpio_config(GPIO_PORT_E, GPIO_PIN_4, GPIO_MODE_GPIO);
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gpio_write(GPIO_PORT_E, GPIO_PIN_4, GPIO_HIGH);
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gpio_output_enable(GPIO_PORT_E, GPIO_PIN_4, GPIO_OUTPUT_ENABLE);
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usleep(1000);
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usleep(10000);
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// Enable SD card IO power.
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max77620_regulator_set_voltage(REGULATOR_LDO2, 3300000);
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@ -1133,26 +1205,40 @@ static int _sdmmc_config_sdmmc1()
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usleep(1000);
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// Set pad slew codes to get good quality clock.
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APB_MISC(APB_MISC_GP_SDMMC1_PAD_CFGPADCTRL) = (APB_MISC(APB_MISC_GP_SDMMC1_PAD_CFGPADCTRL) & 0xFFFFFFF) | 0x50000000;
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usleep(1000);
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if (!t210b01)
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{
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APB_MISC(APB_MISC_GP_SDMMC1_PAD_CFGPADCTRL) = (APB_MISC(APB_MISC_GP_SDMMC1_PAD_CFGPADCTRL) & 0xFFFFFFF) | 0x50000000;
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(void)APB_MISC(APB_MISC_GP_SDMMC1_PAD_CFGPADCTRL); // Commit write.
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usleep(1000);
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}
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return 1;
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}
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static void _sdmmc_config_emmc(u32 id)
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static void _sdmmc_config_emmc(u32 id, bool t210b01)
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{
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switch (id)
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{
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case SDMMC_2:
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// Unset park for pads.
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APB_MISC(APB_MISC_GP_EMMC2_PAD_CFGPADCTRL) &= 0xF8003FFF;
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if (!t210b01)
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{
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// Unset park for pads.
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APB_MISC(APB_MISC_GP_EMMC2_PAD_CFGPADCTRL) &= 0xF8003FFF;
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(void)APB_MISC(APB_MISC_GP_EMMC2_PAD_CFGPADCTRL); // Commit write.
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}
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else // Enable schmitt trigger for T210B01.
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_sdmmc_config_sdmmc2_schmitt();
|
||||
break;
|
||||
|
||||
case SDMMC_4:
|
||||
// Unset park for pads.
|
||||
APB_MISC(APB_MISC_GP_EMMC4_PAD_CFGPADCTRL) &= 0xF8003FFF;
|
||||
// Set default pad cfg.
|
||||
if (t210b01)
|
||||
APB_MISC(APB_MISC_GP_EMMC4_PAD_PUPD_CFGPADCTRL) &= 0xFFBFFFF9; // Unset CMD/CLK/DQS powedown.
|
||||
// Enable schmitt trigger.
|
||||
APB_MISC(APB_MISC_GP_EMMC4_PAD_CFGPADCTRL) |= 1; // Enable Schmitt trigger.
|
||||
APB_MISC(APB_MISC_GP_EMMC4_PAD_CFGPADCTRL) |= 1;
|
||||
(void)APB_MISC(APB_MISC_GP_EMMC4_PAD_CFGPADCTRL); // Commit write.
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
|
@ -1161,8 +1247,11 @@ int sdmmc_init(sdmmc_t *sdmmc, u32 id, u32 power, u32 bus_width, u32 type, int p
|
|||
{
|
||||
u32 clock;
|
||||
u16 divisor;
|
||||
u8 vref_sel = 7;
|
||||
|
||||
const u32 trim_values[] = { 2, 8, 3, 8 };
|
||||
const u32 trim_values_t210[] = { 2, 8, 3, 8 };
|
||||
const u32 trim_values_t210b01[] = { 14, 13, 15, 13 };
|
||||
const u32 *trim_values = sdmmc->t210b01 ? trim_values_t210b01 : trim_values_t210;
|
||||
|
||||
if (id > SDMMC_4 || id == SDMMC_3)
|
||||
return 0;
|
||||
|
|
@ -1172,18 +1261,23 @@ int sdmmc_init(sdmmc_t *sdmmc, u32 id, u32 power, u32 bus_width, u32 type, int p
|
|||
sdmmc->regs = (t210_sdmmc_t *)_sdmmc_bases[id];
|
||||
sdmmc->id = id;
|
||||
sdmmc->clock_stopped = 1;
|
||||
sdmmc->t210b01 = hw_get_chip_id() == GP_HIDREV_MAJOR_T210B01;
|
||||
|
||||
// Do specific SDMMC HW configuration.
|
||||
switch (id)
|
||||
{
|
||||
case SDMMC_1:
|
||||
if (!_sdmmc_config_sdmmc1())
|
||||
if (!_sdmmc_config_sdmmc1(sdmmc->t210b01))
|
||||
return 0;
|
||||
if (sdmmc->t210b01)
|
||||
vref_sel = 0;
|
||||
else
|
||||
sdmmc->manual_cal = 1;
|
||||
break;
|
||||
|
||||
case SDMMC_2:
|
||||
case SDMMC_4:
|
||||
_sdmmc_config_emmc(id);
|
||||
_sdmmc_config_emmc(id, sdmmc->t210b01);
|
||||
break;
|
||||
}
|
||||
|
||||
|
|
@ -1198,6 +1292,9 @@ int sdmmc_init(sdmmc_t *sdmmc, u32 id, u32 power, u32 bus_width, u32 type, int p
|
|||
clock_sdmmc_get_card_clock_div(&clock, &divisor, type);
|
||||
clock_sdmmc_enable(id, clock);
|
||||
|
||||
// Make sure all sdmmc registers are reset.
|
||||
_sdmmc_reset_all(sdmmc);
|
||||
|
||||
sdmmc->clock_stopped = 0;
|
||||
|
||||
// Set default pad IO trimming configuration.
|
||||
|
|
@ -1205,7 +1302,7 @@ int sdmmc_init(sdmmc_t *sdmmc, u32 id, u32 power, u32 bus_width, u32 type, int p
|
|||
sdmmc->regs->veniotrimctl &= 0xFFFFFFFB; // Set Band Gap VREG to supply DLL.
|
||||
sdmmc->regs->venclkctl = (sdmmc->regs->venclkctl & 0xE0FFFFFB) | (trim_values[sdmmc->id] << 24);
|
||||
sdmmc->regs->sdmemcmppadctl =
|
||||
(sdmmc->regs->sdmemcmppadctl & TEGRA_MMC_SDMEMCOMPPADCTRL_COMP_VREF_SEL_MASK) | 7;
|
||||
(sdmmc->regs->sdmemcmppadctl & TEGRA_MMC_SDMEMCOMPPADCTRL_COMP_VREF_SEL_MASK) | vref_sel;
|
||||
|
||||
// Configure auto calibration values.
|
||||
if (!_sdmmc_autocal_config_offset(sdmmc, power))
|
||||
|
|
@ -1233,6 +1330,52 @@ int sdmmc_init(sdmmc_t *sdmmc, u32 id, u32 power, u32 bus_width, u32 type, int p
|
|||
return 0;
|
||||
}
|
||||
|
||||
void sdmmc1_disable_power()
|
||||
{
|
||||
// Ensure regulator is into default voltage.
|
||||
if (PMC(APBDEV_PMC_PWR_DET_VAL) & PMC_PWR_DET_SDMMC1_IO_EN)
|
||||
{
|
||||
// Switch to 1.8V and wait for regulator to stabilize.
|
||||
max77620_regulator_set_voltage(REGULATOR_LDO2, 1800000);
|
||||
usleep(150);
|
||||
|
||||
// Inform IO pads that we switched to 1.8V.
|
||||
PMC(APBDEV_PMC_PWR_DET_VAL) &= ~(PMC_PWR_DET_SDMMC1_IO_EN);
|
||||
(void)PMC(APBDEV_PMC_PWR_DET_VAL); // Commit write.
|
||||
}
|
||||
|
||||
// T210B01 WAR: Clear pull down from CLK pad.
|
||||
PINMUX_AUX(PINMUX_AUX_SDMMC1_CLK) &= ~PINMUX_PULL_MASK;
|
||||
|
||||
// T210B01 WAR: Set pads to discharge state.
|
||||
_sdmmc_config_sdmmc1_pads(true);
|
||||
|
||||
// Disable SD card IO power regulator.
|
||||
max77620_regulator_enable(REGULATOR_LDO2, 0);
|
||||
usleep(4000);
|
||||
|
||||
// Disable SD card IO power pin.
|
||||
gpio_write(GPIO_PORT_E, GPIO_PIN_4, GPIO_LOW);
|
||||
|
||||
// T210/T210B01 WAR: Set start timer for IO and Controller power discharge.
|
||||
sd_power_cycle_time_start = get_tmr_ms();
|
||||
usleep(1000); // To power cycle, min 1ms without power is needed.
|
||||
|
||||
// Disable SDMMC1 controller power.
|
||||
PMC(APBDEV_PMC_NO_IOPOWER) |= PMC_NO_IOPOWER_SDMMC1_IO_EN;
|
||||
(void)PMC(APBDEV_PMC_NO_IOPOWER); // Commit write.
|
||||
|
||||
// Inform IO pads that next voltage might be 3.3V.
|
||||
PMC(APBDEV_PMC_PWR_DET_VAL) |= PMC_PWR_DET_SDMMC1_IO_EN;
|
||||
(void)PMC(APBDEV_PMC_PWR_DET_VAL); // Commit write.
|
||||
|
||||
// T210B01 WAR: Restore pads to reset state.
|
||||
_sdmmc_config_sdmmc1_pads(false);
|
||||
|
||||
// T210B01 WAR: Restore pull down to CLK pad.
|
||||
PINMUX_AUX(PINMUX_AUX_SDMMC1_CLK) |= PINMUX_PULL_DOWN;
|
||||
}
|
||||
|
||||
void sdmmc_end(sdmmc_t *sdmmc)
|
||||
{
|
||||
if (!sdmmc->clock_stopped)
|
||||
|
|
@ -1243,16 +1386,7 @@ void sdmmc_end(sdmmc_t *sdmmc)
|
|||
|
||||
// Disable SD card power.
|
||||
if (sdmmc->id == SDMMC_1)
|
||||
{
|
||||
gpio_output_enable(GPIO_PORT_E, GPIO_PIN_4, GPIO_OUTPUT_DISABLE);
|
||||
max77620_regulator_enable(REGULATOR_LDO2, 0);
|
||||
|
||||
// Inform IO pads that next voltage might be 3.3V.
|
||||
PMC(APBDEV_PMC_PWR_DET_VAL) |= PMC_PWR_DET_SDMMC1_IO_EN;
|
||||
|
||||
sd_power_cycle_time_start = get_tmr_ms(); // Some SanDisk U1 cards need 100ms for a power cycle.
|
||||
usleep(1000); // To power cycle, min 1ms without power is needed.
|
||||
}
|
||||
sdmmc1_disable_power();
|
||||
|
||||
_sdmmc_commit_changes(sdmmc);
|
||||
clock_sdmmc_disable(sdmmc->id);
|
||||
|
|
@ -1274,7 +1408,7 @@ int sdmmc_execute_cmd(sdmmc_t *sdmmc, sdmmc_cmd_t *cmd, sdmmc_req_t *req, u32 *b
|
|||
return 0;
|
||||
|
||||
// Recalibrate periodically for SDMMC1.
|
||||
if (sdmmc->id == SDMMC_1 && sdmmc->powersave_enabled)
|
||||
if (sdmmc->manual_cal && sdmmc->powersave_enabled)
|
||||
_sdmmc_autocal_execute(sdmmc, sdmmc_get_io_power(sdmmc));
|
||||
|
||||
int should_disable_sd_clock = 0;
|
||||
|
|
@ -1307,10 +1441,11 @@ int sdmmc_enable_low_voltage(sdmmc_t *sdmmc)
|
|||
|
||||
// Switch to 1.8V and wait for regulator to stabilize. Assume max possible wait needed.
|
||||
max77620_regulator_set_voltage(REGULATOR_LDO2, 1800000);
|
||||
usleep(300);
|
||||
usleep(150);
|
||||
|
||||
// Inform IO pads that we switched to 1.8V.
|
||||
PMC(APBDEV_PMC_PWR_DET_VAL) &= ~(PMC_PWR_DET_SDMMC1_IO_EN);
|
||||
(void)PMC(APBDEV_PMC_PWR_DET_VAL); // Commit write.
|
||||
|
||||
// Enable schmitt trigger for better duty cycle and low jitter clock.
|
||||
_sdmmc_config_sdmmc1_schmitt();
|
||||
|
|
|
|||
|
|
@ -214,6 +214,7 @@ typedef struct _sdmmc_t
|
|||
u32 divisor;
|
||||
u32 clock_stopped;
|
||||
int powersave_enabled;
|
||||
int manual_cal;
|
||||
int card_clock_enabled;
|
||||
int venclkctl_set;
|
||||
u32 venclkctl_tap;
|
||||
|
|
@ -221,6 +222,7 @@ typedef struct _sdmmc_t
|
|||
u32 dma_addr_next;
|
||||
u32 rsp[4];
|
||||
u32 rsp3;
|
||||
int t210b01;
|
||||
} sdmmc_t;
|
||||
|
||||
/*! SDMMC command. */
|
||||
|
|
|
|||
Loading…
Reference in a new issue