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l4t: add bpmp-fw support for T210
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parent
496737248c
commit
b6e1e0d412
1 changed files with 33 additions and 17 deletions
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@ -71,12 +71,14 @@
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#define SC7ENTRY_HDR_SIZE 0x400
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#define SC7ENTRY_HDR_SIZE 0x400
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// Secure Elements addresses for T210.
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// Secure Elements addresses for T210.
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#define SECFW_BASE (TZDRAM_BASE - SZ_1M) // 0xFFE00000 or 0xFF700000.
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#define SECFW_BASE (TZDRAM_BASE - SZ_1M) // 0xFFE00000 or 0xFF700000.
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#define SC7ENTRY_HDR_BASE (SECFW_BASE + 0)
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#define SC7ENTRY_HDR_BASE (SECFW_BASE + 0)
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#define SC7ENTRY_BASE (SECFW_BASE + SC7ENTRY_HDR_SIZE) // After header.
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#define SC7ENTRY_BASE (SECFW_BASE + SC7ENTRY_HDR_SIZE) // After header.
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#define SC7EXIT_BASE (SECFW_BASE + SZ_64K) // 64KB after SECFW_BASE.
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#define SC7EXIT_BASE (SECFW_BASE + SZ_64K) // 64KB after SECFW_BASE.
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#define R2P_PAYLOAD_BASE (SECFW_BASE + SZ_256K) // 256KB after SECFW_BASE.
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#define R2P_PAYLOAD_BASE (SECFW_BASE + SZ_256K) // 256KB after SECFW_BASE.
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#define MTCTABLE_BASE (SECFW_BASE + SZ_512K) // 512KB after SECFW_BASE.
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#define MTCTABLE_BASE (SECFW_BASE + SZ_512K) // 512KB after SECFW_BASE.
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#define BPMPFW_BASE (SECFW_BASE + SZ_512K + SZ_256K) // 768KB after SECFW_BASE.
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#define BPMPFW_ENTRYPOINT (BPMPFW_BASE + 0x100) // Used internally also.
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// Secure Elements addresses for T210B01.
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// Secure Elements addresses for T210B01.
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#define BPMPFW_B01_BASE (SECFW_BASE) // !! DTS carveout-start must match !!
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#define BPMPFW_B01_BASE (SECFW_BASE) // !! DTS carveout-start must match !!
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@ -308,6 +310,7 @@ static const l4t_fw_t l4t_fw[] = {
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{ SC7ENTRY_BASE, "sc7entry.bin" },
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{ SC7ENTRY_BASE, "sc7entry.bin" },
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{ SC7EXIT_BASE, "sc7exit.bin" },
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{ SC7EXIT_BASE, "sc7exit.bin" },
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{ SC7EXIT_B01_BASE, "sc7exit_b01.bin" },
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{ SC7EXIT_B01_BASE, "sc7exit_b01.bin" },
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{ BPMPFW_BASE, "bpmpfw.bin" },
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{ BPMPFW_B01_BASE, "bpmpfw_b01.bin" },
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{ BPMPFW_B01_BASE, "bpmpfw_b01.bin" },
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{ BPMPFW_B01_MTC_TABLE_BASE, "mtc_tbl_b01.bin" },
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{ BPMPFW_B01_MTC_TABLE_BASE, "mtc_tbl_b01.bin" },
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};
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};
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@ -318,8 +321,9 @@ enum {
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SC7ENTRY_FW = 2,
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SC7ENTRY_FW = 2,
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SC7EXIT_FW = 3,
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SC7EXIT_FW = 3,
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SC7EXIT_B01_FW = 4,
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SC7EXIT_B01_FW = 4,
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BPMPFW_B01_FW = 5,
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BPMPFW_FW = 5,
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BPMPFW_B01_MTC_TBL = 6
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BPMPFW_B01_FW = 6,
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BPMPFW_B01_MTC_TBL = 7
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};
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};
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static void _l4t_crit_error(const char *text)
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static void _l4t_crit_error(const char *text)
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@ -1023,6 +1027,13 @@ void launch_l4t(const ini_sec_t *ini_sec, int entry_idx, int is_list, bool t210b
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_l4t_crit_error("SC7-Entry missing");
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_l4t_crit_error("SC7-Entry missing");
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return;
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return;
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}
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}
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// Load BPMP-FW. Does power management.
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if (!_l4t_sd_load(BPMPFW_FW))
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{
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_l4t_crit_error("BPMP-FW missing");
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return;
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}
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}
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}
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else
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else
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{
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{
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@ -1198,21 +1209,26 @@ void launch_l4t(const ini_sec_t *ini_sec, int entry_idx, int is_list, bool t210b
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// Do late hardware config.
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// Do late hardware config.
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_l4t_late_hw_config(t210b01);
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_l4t_late_hw_config(t210b01);
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// Launch BL31.
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ccplex_boot_cpu0(TZDRAM_COLD_ENTRY);
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// Enable Wrap burst for BPMP, GPU and PCIE.
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MSELECT(MSELECT_CONFIG) = (MSELECT(MSELECT_CONFIG) & (~(MSELECT_CFG_ERR_RESP_EN_GPU | MSELECT_CFG_ERR_RESP_EN_PCIE))) |
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(MSELECT_CFG_WRAP_TO_INCR_GPU | MSELECT_CFG_WRAP_TO_INCR_PCIE | MSELECT_CFG_WRAP_TO_INCR_BPMP);
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// If T210B01 run BPMP-FW.
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if (t210b01)
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if (t210b01)
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{
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{
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// Prep reset vector for SC7 save state and start BPMP-FW.
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// Launch BL31.
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ccplex_boot_cpu0(TZDRAM_COLD_ENTRY);
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// Enable Wrap burst for BPMP, GPU and PCIE.
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MSELECT(MSELECT_CONFIG) = (MSELECT(MSELECT_CONFIG) & (~(MSELECT_CFG_ERR_RESP_EN_GPU | MSELECT_CFG_ERR_RESP_EN_PCIE))) |
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(MSELECT_CFG_WRAP_TO_INCR_GPU | MSELECT_CFG_WRAP_TO_INCR_PCIE | MSELECT_CFG_WRAP_TO_INCR_BPMP);
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// For T210B01, prep reset vector for SC7 save state and start BPMP-FW.
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EXCP_VEC(EVP_COP_RESET_VECTOR) = BPMPFW_B01_ENTRYPOINT;
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EXCP_VEC(EVP_COP_RESET_VECTOR) = BPMPFW_B01_ENTRYPOINT;
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void (*bpmp_fw_ptr)() = (void *)BPMPFW_B01_ENTRYPOINT;
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void (*bpmp_fw_ptr)() = (void *)BPMPFW_B01_ENTRYPOINT;
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(*bpmp_fw_ptr)();
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(*bpmp_fw_ptr)();
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}
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}
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else
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{
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// If T210, BPMP-FW runs BL31.
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void (*bpmp_fw_ptr)() = (void *)BPMPFW_ENTRYPOINT;
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(*bpmp_fw_ptr)();
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}
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// Halt BPMP.
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// Halt BPMP.
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while (true)
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while (true)
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