diff --git a/bdk/soc/hw_init.c b/bdk/soc/hw_init.c
index 60cb1ce..0c374ca 100644
--- a/bdk/soc/hw_init.c
+++ b/bdk/soc/hw_init.c
@@ -85,7 +85,7 @@ static void _config_oscillators()
 	CLOCK(CLK_RST_CONTROLLER_CLK_SYSTEM_RATE) = 0x10;       // Set HCLK div to 2 and PCLK div to 1.
 	CLOCK(CLK_RST_CONTROLLER_PLLMB_BASE)     &= 0xBFFFFFFF; // PLLMB disable.
 
-	PMC(APBDEV_PMC_TSC_MULT) = (PMC(APBDEV_PMC_TSC_MULT) & 0xFFFF0000) | 0x249F; //0x249F = 19200000 * (16 / 32.768 kHz)
+	PMC(APBDEV_PMC_TSC_MULT) = (PMC(APBDEV_PMC_TSC_MULT) & 0xFFFF0000) | 0x249F; // 0x249F = 19200000 * (16 / 32.768 kHz).
 
 	CLOCK(CLK_RST_CONTROLLER_CLK_SOURCE_SYS)     = 0;          // Set BPMP/SCLK div to 1.
 	CLOCK(CLK_RST_CONTROLLER_SCLK_BURST_POLICY)  = 0x20004444; // Set BPMP/SCLK source to Run and PLLP_OUT2 (204MHz).
@@ -328,8 +328,10 @@ void hw_init()
 	// Bootrom stuff we skipped by going through rcm.
 	_config_se_brom();
 	//FUSE(FUSE_PRIVATEKEYDISABLE) = 0x11;
-	SYSREG(AHB_AHB_SPARE_REG) &= 0xFFFFFF9F; // Unset APB2JTAG_OVERRIDE_EN and OBS_OVERRIDE_EN.
-	PMC(APBDEV_PMC_SCRATCH49) = PMC(APBDEV_PMC_SCRATCH49) & 0xFFFFFFFC;
+
+	// Unset APB2JTAG_OVERRIDE_EN and OBS_OVERRIDE_EN.
+	SYSREG(AHB_AHB_SPARE_REG) &= 0xFFFFFF9F;
+	PMC(APBDEV_PMC_SCRATCH49) &= 0xFFFFFFFC;
 
 	// Perform Memory Built-In Self Test WAR if T210.
 	if (tegra_t210)
diff --git a/bdk/soc/timer.c b/bdk/soc/timer.c
index 2f25380..c6c5b83 100644
--- a/bdk/soc/timer.c
+++ b/bdk/soc/timer.c
@@ -71,6 +71,12 @@ void usleep(u32 us)
 #endif
 }
 
+// Instruction wait loop. Each loop is 3 cycles (SUBS+BGT). Usage: isleep(ILOOP(instr)). Base 408MHz: 7.35ns.
+void __attribute__((target("arm"))) isleep(u32 is)
+{
+	asm volatile( "0:" "SUBS %[is_cnt], #1;" "BGT 0b;" : [is_cnt] "+r" (is));
+}
+
 void timer_usleep(u32 us)
 {
 	TMR(TIMER_TMR8_TMR_PTV) = TIMER_EN | us;
diff --git a/bdk/soc/timer.h b/bdk/soc/timer.h
index 6fcdb36..800eaac 100644
--- a/bdk/soc/timer.h
+++ b/bdk/soc/timer.h
@@ -51,6 +51,8 @@ u32  get_tmr_ms();
 u32  get_tmr_s();
 void usleep(u32 us);
 void msleep(u32 ms);
+#define ILOOP(is) ((is) / 3)
+void isleep(u32 is);
 
 void timer_usleep(u32 us);