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max77620: Change try set to just retry if i2c xfer failed

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CTCaer 2020-11-26 01:43:19 +02:00
parent cabaa6cfb8
commit b1c09f8a9c
1 changed files with 14 additions and 12 deletions
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26
bdk/power/max7762x.c
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@ -64,14 +64,16 @@ static const max77620_regulator_t _pmic_regulators[] = {
{ REGULATOR_LDO, "ldo8", 0x00, 50000, 800000, 1050000, 2800000, MAX77620_REG_LDO8_CFG, MAX77620_REG_LDO8_CFG2, MAX77620_LDO_VOLT_MASK, MAX77620_LDO_POWER_MODE_MASK, MAX77620_LDO_POWER_MODE_SHIFT, 0x00, MAX77620_REG_FPS_LDO8, 3, 7, 0 } { REGULATOR_LDO, "ldo8", 0x00, 50000, 800000, 1050000, 2800000, MAX77620_REG_LDO8_CFG, MAX77620_REG_LDO8_CFG2, MAX77620_LDO_VOLT_MASK, MAX77620_LDO_POWER_MODE_MASK, MAX77620_LDO_POWER_MODE_SHIFT, 0x00, MAX77620_REG_FPS_LDO8, 3, 7, 0 }
}; };
static void _max77620_try_set_reg(u8 reg, u8 val) static void _max77620_set_reg(u8 reg, u8 val)
{ {
u8 tmp; u32 retries = 100;
do while (retries)
{ {
i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, reg, val); if (i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, reg, val))
tmp = i2c_recv_byte(I2C_5, MAX77620_I2C_ADDR, reg); break;
} while (val != tmp); usleep(100);
retries--;
}
} }
int max77620_regulator_get_status(u32 id) int max77620_regulator_get_status(u32 id)
@ -93,7 +95,7 @@ int max77620_regulator_config_fps(u32 id)
const max77620_regulator_t *reg = &_pmic_regulators[id]; const max77620_regulator_t *reg = &_pmic_regulators[id];
_max77620_try_set_reg(reg->fps_addr, _max77620_set_reg(reg->fps_addr,
(reg->fps_src << MAX77620_FPS_SRC_SHIFT) | (reg->pu_period << MAX77620_FPS_PU_PERIOD_SHIFT) | (reg->pd_period)); (reg->fps_src << MAX77620_FPS_SRC_SHIFT) | (reg->pu_period << MAX77620_FPS_PU_PERIOD_SHIFT) | (reg->pd_period));
return 1; return 1;
@ -112,7 +114,7 @@ int max77620_regulator_set_voltage(u32 id, u32 mv)
u32 mult = (mv + reg->mv_step - 1 - reg->mv_min) / reg->mv_step; u32 mult = (mv + reg->mv_step - 1 - reg->mv_min) / reg->mv_step;
u8 val = i2c_recv_byte(I2C_5, MAX77620_I2C_ADDR, reg->volt_addr); u8 val = i2c_recv_byte(I2C_5, MAX77620_I2C_ADDR, reg->volt_addr);
val = (val & ~reg->volt_mask) | (mult & reg->volt_mask); val = (val & ~reg->volt_mask) | (mult & reg->volt_mask);
_max77620_try_set_reg(reg->volt_addr, val); _max77620_set_reg(reg->volt_addr, val);
usleep(1000); usleep(1000);
return 1; return 1;
@ -131,7 +133,7 @@ int max77620_regulator_enable(u32 id, int enable)
val = (val & ~reg->enable_mask) | ((MAX77620_POWER_MODE_NORMAL << reg->enable_shift) & reg->enable_mask); val = (val & ~reg->enable_mask) | ((MAX77620_POWER_MODE_NORMAL << reg->enable_shift) & reg->enable_mask);
else else
val &= ~reg->enable_mask; val &= ~reg->enable_mask;
_max77620_try_set_reg(addr, val); _max77620_set_reg(addr, val);
usleep(1000); usleep(1000);
return 1; return 1;
@ -150,7 +152,7 @@ int max77620_regulator_set_volt_and_flags(u32 id, u32 mv, u8 flags)
u32 mult = (mv + reg->mv_step - 1 - reg->mv_min) / reg->mv_step; u32 mult = (mv + reg->mv_step - 1 - reg->mv_min) / reg->mv_step;
u8 val = ((flags << reg->enable_shift) & ~reg->volt_mask) | (mult & reg->volt_mask); u8 val = ((flags << reg->enable_shift) & ~reg->volt_mask) | (mult & reg->volt_mask);
_max77620_try_set_reg(reg->volt_addr, val); _max77620_set_reg(reg->volt_addr, val);
usleep(1000); usleep(1000);
return 1; return 1;
@ -166,12 +168,12 @@ void max77620_config_default()
if (_pmic_regulators[i].fps_src != MAX77620_FPS_SRC_NONE) if (_pmic_regulators[i].fps_src != MAX77620_FPS_SRC_NONE)
max77620_regulator_enable(i, 1); max77620_regulator_enable(i, 1);
} }
_max77620_try_set_reg(MAX77620_REG_SD_CFG2, 4); _max77620_set_reg(MAX77620_REG_SD_CFG2, 4);
} }
void max77620_low_battery_monitor_config(bool enable) void max77620_low_battery_monitor_config(bool enable)
{ {
_max77620_try_set_reg(MAX77620_REG_CNFGGLBL1, _max77620_set_reg(MAX77620_REG_CNFGGLBL1,
MAX77620_CNFGGLBL1_LBDAC_EN | (enable ? MAX77620_CNFGGLBL1_MPPLD : 0) | MAX77620_CNFGGLBL1_LBDAC_EN | (enable ? MAX77620_CNFGGLBL1_MPPLD : 0) |
MAX77620_CNFGGLBL1_LBHYST_200 | MAX77620_CNFGGLBL1_LBDAC_2800); MAX77620_CNFGGLBL1_LBHYST_200 | MAX77620_CNFGGLBL1_LBDAC_2800);
} }