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https://github.com/CTCaer/hekate
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bdk: irq: remove ack source
HW interrupts can't be managed by FIR. Only actual hw can clear the interrupt.
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05db43a97c
commit
b01cc2432f
1 changed files with 1 additions and 14 deletions
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@ -1,7 +1,7 @@
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/*
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/*
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* BPMP-Lite IRQ driver for Tegra X1
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* BPMP-Lite IRQ driver for Tegra X1
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*
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*
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* Copyright (c) 2019 CTCaer
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* Copyright (c) 2019-2024 CTCaer
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*
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*
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* This program is free software; you can redistribute it and/or modify it
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* under the terms and conditions of the GNU General Public License,
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@ -71,19 +71,9 @@ static void _irq_disable_and_ack_all()
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{
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{
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u32 enabled_irqs = ICTLR(ctrl_idx, PRI_ICTLR_COP_IER);
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u32 enabled_irqs = ICTLR(ctrl_idx, PRI_ICTLR_COP_IER);
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ICTLR(ctrl_idx, PRI_ICTLR_COP_IER_CLR) = enabled_irqs;
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ICTLR(ctrl_idx, PRI_ICTLR_COP_IER_CLR) = enabled_irqs;
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ICTLR(ctrl_idx, PRI_ICTLR_FIR_CLR) = enabled_irqs;
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}
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}
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}
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}
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static void _irq_ack_source(u32 irq)
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{
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u32 ctrl_idx = irq >> 5;
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u32 bit = irq % 32;
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// Force stop the interrupt as it's serviced here.
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ICTLR(ctrl_idx, PRI_ICTLR_FIR_CLR) = BIT(bit);
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}
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void irq_free(u32 irq)
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void irq_free(u32 irq)
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{
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{
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for (u32 idx = 0; idx < IRQ_MAX_HANDLERS; idx++)
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for (u32 idx = 0; idx < IRQ_MAX_HANDLERS; idx++)
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@ -121,7 +111,6 @@ static irq_status_t _irq_handle_source(u32 irq)
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int status = IRQ_NONE;
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int status = IRQ_NONE;
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_irq_disable_source(irq);
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_irq_disable_source(irq);
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_irq_ack_source(irq);
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u32 idx;
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u32 idx;
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for (idx = 0; idx < IRQ_MAX_HANDLERS; idx++)
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for (idx = 0; idx < IRQ_MAX_HANDLERS; idx++)
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@ -155,7 +144,6 @@ void irq_handler()
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if (!irq_init_done)
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if (!irq_init_done)
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{
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{
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_irq_disable_source(irq);
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_irq_disable_source(irq);
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_irq_ack_source(irq);
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return;
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return;
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}
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}
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@ -197,7 +185,6 @@ void irq_wait_event(u32 irq)
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FLOW_CTLR(FLOW_CTLR_HALT_COP_EVENTS) = HALT_MODE_STOP_UNTIL_IRQ;
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FLOW_CTLR(FLOW_CTLR_HALT_COP_EVENTS) = HALT_MODE_STOP_UNTIL_IRQ;
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_irq_disable_source(irq);
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_irq_disable_source(irq);
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_irq_ack_source(irq);
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irq_enable_cpu_irq_exceptions();
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irq_enable_cpu_irq_exceptions();
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}
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}
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