mirror of
https://github.com/CTCaer/hekate
synced 2024-11-16 00:49:27 +00:00
bis: Pull latest lockpick driver and refactor it
- Refactor various variables and functions - Flush whole cache when full - Allow cache to be disabled - Add support for raw emuMMC in nyx contenxt - Use partition names for keys (to avoid issues with different ordering) - Add deinit function that flushes the whole cache - Change bis lookup address - Halve cache size to 256MB in order to support 512MB ramdisk also. Co-Authored-By: shchmue <7903403+shchmue@users.noreply.github.com>
This commit is contained in:
CTCaer
parent
497bbdf3cd
commit
9e34c5995d
4 changed files with 293 additions and 128 deletions
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2019 CTCaer
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* Copyright (c) 2019-2021 CTCaer
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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@ -50,6 +50,13 @@
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// Virtual disk / Chainloader buffers.
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#define RAM_DISK_ADDR 0xA4000000
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#define RAM_DISK_SZ 0x41000000 // 1040MB.
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#define RAM_DISK2_SZ 0x21000000 // 528MB.
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// NX BIS driver sector cache.
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#define NX_BIS_CACHE_ADDR 0xC5000000
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#define NX_BIS_CACHE_SZ 0x10020000 // 256MB.
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#define NX_BIS_LOOKUP_ADDR 0xD6000000
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#define NX_BIS_LOOKUP_SZ 0xF000000 // 240MB.
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// L4T Kernel Panic Storage (PSTORE).
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#define PSTORE_ADDR 0xB0000000
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@ -93,10 +100,6 @@
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/* --- Hole: 129MB 0xF6A00000 - 0xFEB3FFFF --- */
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#define DRAM_START2 0xFEB40000
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// NX BIS driver sector cache.
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#define NX_BIS_CACHE_ADDR 0xFEE00000
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#define NX_BIS_CACHE_SZ 0x100000
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// USB buffers.
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#define USBD_ADDR 0xFEF00000
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#define USB_DESCRIPTOR_ADDR 0xFEF40000
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@ -413,8 +413,10 @@ t210b01:;
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LIST_INIT(gpt);
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nx_emmc_gpt_parse(&gpt, &emmc_storage);
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emmc_part_t *cal0_part = nx_emmc_part_find(&gpt, "PRODINFO"); // check if null
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nx_emmc_bis_init(cal0_part);
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nx_emmc_bis_init(cal0_part, false, 0);
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nx_emmc_bis_read(0, 0x40, cal0_buf);
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nx_emmc_bis_end();
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nx_emmc_gpt_free(&gpt);
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// Clear BIS keys slots and reinstate SBK.
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hos_bis_keys_clear();
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@ -1,8 +1,8 @@
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/*
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* eMMC BIS driver for Nintendo Switch
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*
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* Copyright (c) 2019 shchmue
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* Copyright (c) 2019-2020 CTCaer
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* Copyright (c) 2019-2020 shchmue
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* Copyright (c) 2019-2021 CTCaer
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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@ -21,48 +21,64 @@
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#include <memory_map.h>
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#include <mem/heap.h>
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#include <sec/se.h>
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#include <sec/se_t210.h>
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#include "../storage/nx_emmc.h"
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#include <storage/nx_sd.h>
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#include <storage/sdmmc.h>
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#include <utils/types.h>
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#define MAX_SEC_CACHE_ENTRIES 1500
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#define BIS_CLUSTER_SECTORS 32
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#define BIS_CLUSTER_SIZE 16384
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#define BIS_CACHE_MAX_ENTRIES 16384
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#define BIS_CACHE_LOOKUP_TBL_EMPTY_ENTRY -1
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typedef struct _sector_cache_t
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typedef struct _cluster_cache_t
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{
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u32 sector;
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u32 visit_cnt;
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u8 tweak[0x10];
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u8 data[0x200];
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u8 align[8];
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} sector_cache_t;
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u32 cluster_idx; // Index of the cluster in the partition.
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bool dirty; // Has been modified without write-back flag.
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u8 data[BIS_CLUSTER_SIZE]; // The cached cluster itself. Aligned to 8 bytes for DMA engine.
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} cluster_cache_t;
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static u8 ks_crypt = 0;
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static u8 ks_tweak = 0;
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static u32 sector_cache_cnt = 0;
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typedef struct _bis_cache_t
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{
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bool full;
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bool enabled;
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u32 dirty_cnt;
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u32 top_idx;
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u8 dma_buff[BIS_CLUSTER_SIZE]; // Aligned to 8 bytes for DMA engine.
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cluster_cache_t clusters[];
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} bis_cache_t;
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static u8 ks_crypt = 0;
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static u8 ks_tweak = 0;
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static u32 emu_offset = 0;
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static emmc_part_t *system_part = NULL;
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static sector_cache_t *sector_cache = (sector_cache_t *)NX_BIS_CACHE_ADDR;
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static u32 *cache_lookup_tbl = (u32 *)NX_BIS_LOOKUP_ADDR;
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static bis_cache_t *bis_cache = (bis_cache_t *)NX_BIS_CACHE_ADDR;
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static void _gf256_mul_x_le(u8 *block)
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static void _gf256_mul_x_le(void *block)
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{
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u8 *pdata = (u8 *)block;
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u32 *pdata = (u32 *)block;
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u32 carry = 0;
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for (u32 i = 0; i < 0x10; i++)
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for (u32 i = 0; i < 4; i++)
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{
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u8 b = pdata[i];
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u32 b = pdata[i];
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pdata[i] = (b << 1) | carry;
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carry = b >> 7;
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carry = b >> 31;
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}
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if (carry)
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pdata[0x0] ^= 0x87;
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}
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static int _nx_aes_xts_crypt_sec(u32 ks1, u32 ks2, u32 enc, u8 *tweak, bool regen_tweak, u32 tweak_exp, u64 sec, void *dst, void *src, u32 sec_size)
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static int _nx_aes_xts_crypt_sec(u32 tweak_ks, u32 crypt_ks, u32 enc, u8 *tweak, bool regen_tweak, u32 tweak_exp, u64 sec, void *dst, void *src, u32 sec_size)
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{
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u8 *pdst = (u8 *)dst;
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u8 *psrc = (u8 *)src;
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u32 *pdst = (u32 *)dst;
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u32 *psrc = (u32 *)src;
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u32 *ptweak = (u32 *)tweak;
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if (regen_tweak)
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{
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@ -71,155 +87,298 @@ static int _nx_aes_xts_crypt_sec(u32 ks1, u32 ks2, u32 enc, u8 *tweak, bool rege
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tweak[i] = sec & 0xFF;
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sec >>= 8;
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}
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if (!se_aes_crypt_block_ecb(ks1, 1, tweak, tweak))
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if (!se_aes_crypt_block_ecb(tweak_ks, 1, tweak, tweak))
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return 0;
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}
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// tweak_exp allows us to use a saved tweak to reduce _gf256_mul_x_le calls.
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for (u32 i = 0; i < (tweak_exp << 5); i++)
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_gf256_mul_x_le(tweak);
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u8 tmp_tweak[0x10];
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memcpy(tmp_tweak, tweak, 0x10);
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u8 orig_tweak[SE_KEY_128_SIZE] __attribute__((aligned(4)));
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memcpy(orig_tweak, tweak, SE_KEY_128_SIZE);
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// We are assuming a 0x10-aligned sector size in this implementation.
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// We are assuming a 16 sector aligned size in this implementation.
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for (u32 i = 0; i < (sec_size >> 4); i++)
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{
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for (u32 j = 0; j < 0x10; j++)
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pdst[j] = psrc[j] ^ tweak[j];
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for (u32 j = 0; j < 4; j++)
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pdst[j] = psrc[j] ^ ptweak[j];
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_gf256_mul_x_le(tweak);
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psrc += 0x10;
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pdst += 0x10;
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psrc += 4;
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pdst += 4;
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}
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se_aes_crypt_ecb(ks2, enc, dst, sec_size, src, sec_size);
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if (!se_aes_crypt_ecb(crypt_ks, enc, dst, sec_size, dst, sec_size))
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return 0;
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memcpy(tweak, tmp_tweak, 0x10);
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pdst = (u8 *)dst;
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pdst = (u32 *)dst;
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ptweak = (u32 *)orig_tweak;
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for (u32 i = 0; i < (sec_size >> 4); i++)
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{
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for (u32 j = 0; j < 0x10; j++)
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pdst[j] = pdst[j] ^ tweak[j];
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for (u32 j = 0; j < 4; j++)
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pdst[j] = pdst[j] ^ ptweak[j];
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_gf256_mul_x_le(tweak);
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pdst += 0x10;
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_gf256_mul_x_le(orig_tweak);
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pdst += 4;
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}
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return 1;
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}
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static int nx_emmc_bis_write_block(u32 sector, u32 count, void *buff, bool flush)
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{
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if (!system_part)
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return 3; // Not ready.
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int res;
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u8 tweak[SE_KEY_128_SIZE] __attribute__((aligned(4)));
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u32 cluster = sector / BIS_CLUSTER_SECTORS;
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u32 aligned_sector = cluster * BIS_CLUSTER_SECTORS;
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u32 sector_in_cluster = sector % BIS_CLUSTER_SECTORS;
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u32 lookup_idx = cache_lookup_tbl[cluster];
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bool is_cached = lookup_idx != BIS_CACHE_LOOKUP_TBL_EMPTY_ENTRY;
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// Write to cached cluster.
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if (is_cached)
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{
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if (buff)
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memcpy(bis_cache->clusters[lookup_idx].data + sector_in_cluster * NX_EMMC_BLOCKSIZE, buff, count * NX_EMMC_BLOCKSIZE);
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else
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buff = bis_cache->clusters[lookup_idx].data;
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if (!bis_cache->clusters[lookup_idx].dirty)
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bis_cache->dirty_cnt++;
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bis_cache->clusters[lookup_idx].dirty = true;
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if (!flush)
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return 0; // Success.
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// Reset args to trigger a full cluster flush to emmc.
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sector_in_cluster = 0;
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sector = aligned_sector;
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count = BIS_CLUSTER_SECTORS;
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}
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// Encrypt cluster.
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if (!_nx_aes_xts_crypt_sec(ks_tweak, ks_crypt, 1, tweak, true, sector_in_cluster, cluster, bis_cache->dma_buff, buff, count * NX_EMMC_BLOCKSIZE))
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return 1; // Encryption error.
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// If not reading from cache, do a regular read and decrypt.
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if (!emu_offset)
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res = nx_emmc_part_write(&emmc_storage, system_part, sector, count, bis_cache->dma_buff);
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else
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res = sdmmc_storage_read(&sd_storage, emu_offset + system_part->lba_start + sector, count, bis_cache->dma_buff);
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if (!res)
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return 1; // R/W error.
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// Mark cache entry not dirty if write succeeds.
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if (is_cached)
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{
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bis_cache->clusters[lookup_idx].dirty = false;
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bis_cache->dirty_cnt--;
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}
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return 0; // Success.
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}
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static void _nx_emmc_bis_cluster_cache_init(bool enable_cache)
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{
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u32 cache_lookup_tbl_size = (system_part->lba_end - system_part->lba_start + 1) / BIS_CLUSTER_SECTORS * sizeof(*cache_lookup_tbl);
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// Clear cache header.
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memset(bis_cache, 0, sizeof(bis_cache_t));
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// Clear cluster lookup table.
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memset(cache_lookup_tbl, BIS_CACHE_LOOKUP_TBL_EMPTY_ENTRY, cache_lookup_tbl_size);
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// Enable cache.
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bis_cache->enabled = enable_cache;
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}
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static void _nx_emmc_bis_flush_cache()
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{
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if (!bis_cache->enabled || !bis_cache->dirty_cnt)
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return;
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for (u32 i = 0; i < bis_cache->top_idx && bis_cache->dirty_cnt; i++)
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{
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if (bis_cache->clusters[i].dirty) {
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nx_emmc_bis_write_block(bis_cache->clusters[i].cluster_idx * BIS_CLUSTER_SECTORS, BIS_CLUSTER_SECTORS, NULL, true);
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bis_cache->dirty_cnt--;
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}
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}
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_nx_emmc_bis_cluster_cache_init(true);
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}
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static int nx_emmc_bis_read_block_normal(u32 sector, u32 count, void *buff)
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{
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static u32 prev_cluster = -1;
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static u32 prev_sector = 0;
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static u8 tweak[SE_KEY_128_SIZE] __attribute__((aligned(4)));
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int res;
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bool regen_tweak = true;
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u32 tweak_exp = 0;
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u32 cluster = sector / BIS_CLUSTER_SECTORS;
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u32 sector_in_cluster = sector % BIS_CLUSTER_SECTORS;
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// If not reading from cache, do a regular read and decrypt.
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if (!emu_offset)
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res = nx_emmc_part_read(&emmc_storage, system_part, sector, count, bis_cache->dma_buff);
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else
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res = sdmmc_storage_read(&sd_storage, emu_offset + system_part->lba_start + sector, count, bis_cache->dma_buff);
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if (!res)
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return 1; // R/W error.
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if (prev_cluster != cluster) // Sector in different cluster than last read.
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{
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prev_cluster = cluster;
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tweak_exp = sector_in_cluster;
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}
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else if (sector > prev_sector) // Sector in same cluster and past last sector.
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{
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// Calculates the new tweak using the saved one, reducing expensive _gf256_mul_x_le calls.
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tweak_exp = sector - prev_sector - 1;
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regen_tweak = false;
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}
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else // Sector in same cluster and before or same as last sector.
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tweak_exp = sector_in_cluster;
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// Maximum one cluster (1 XTS crypto block 16KB).
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if (!_nx_aes_xts_crypt_sec(ks_tweak, ks_crypt, 0, tweak, regen_tweak, tweak_exp, prev_cluster, buff, bis_cache->dma_buff, count * NX_EMMC_BLOCKSIZE))
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return 1; // R/W error.
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prev_sector = sector + count - 1;
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return 0; // Success.
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}
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static int nx_emmc_bis_read_block_cached(u32 sector, u32 count, void *buff)
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{
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int res;
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u8 cache_tweak[SE_KEY_128_SIZE] __attribute__((aligned(4)));
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u32 cluster = sector / BIS_CLUSTER_SECTORS;
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u32 cluster_sector = cluster * BIS_CLUSTER_SECTORS;
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u32 sector_in_cluster = sector % BIS_CLUSTER_SECTORS;
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u32 lookup_idx = cache_lookup_tbl[cluster];
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// Read from cached cluster.
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if (lookup_idx != BIS_CACHE_LOOKUP_TBL_EMPTY_ENTRY)
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{
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memcpy(buff, bis_cache->clusters[lookup_idx].data + sector_in_cluster * NX_EMMC_BLOCKSIZE, count * NX_EMMC_BLOCKSIZE);
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return 0; // Success.
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}
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// Flush cache if full.
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if (bis_cache->top_idx >= BIS_CACHE_MAX_ENTRIES)
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_nx_emmc_bis_flush_cache();
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// Set new cached cluster parameters.
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bis_cache->clusters[bis_cache->top_idx].cluster_idx = cluster;
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bis_cache->clusters[bis_cache->top_idx].dirty = false;
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cache_lookup_tbl[cluster] = bis_cache->top_idx;
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// Read the whole cluster the sector resides in.
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if (!emu_offset)
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res = nx_emmc_part_read(&emmc_storage, system_part, cluster_sector, BIS_CLUSTER_SECTORS, bis_cache->dma_buff);
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else
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res = sdmmc_storage_read(&sd_storage, emu_offset + system_part->lba_start + cluster_sector, BIS_CLUSTER_SECTORS, bis_cache->dma_buff);
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if (!res)
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return 1; // R/W error.
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// Decrypt cluster.
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if (!_nx_aes_xts_crypt_sec(ks_tweak, ks_crypt, 0, cache_tweak, true, 0, cluster, bis_cache->dma_buff, bis_cache->dma_buff, BIS_CLUSTER_SIZE))
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return 1; // Decryption error.
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// Copy to cluster cache.
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memcpy(bis_cache->clusters[bis_cache->top_idx].data, bis_cache->dma_buff, BIS_CLUSTER_SIZE);
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memcpy(buff, bis_cache->dma_buff + sector_in_cluster * NX_EMMC_BLOCKSIZE, count * NX_EMMC_BLOCKSIZE);
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// Increment cache count.
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bis_cache->top_idx++;
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return 0; // Success.
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}
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static int nx_emmc_bis_read_block(u32 sector, u32 count, void *buff)
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{
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if (!system_part)
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return 3; // Not ready.
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static u32 prev_cluster = -1;
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static u32 prev_sector = 0;
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static u8 tweak[0x10];
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u32 cache_idx = 0;
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u32 tweak_exp = 0;
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bool regen_tweak = true;
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bool cache_sector = false;
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if (count == 1)
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{
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for ( ; cache_idx < sector_cache_cnt; cache_idx++)
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{
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if (sector_cache[cache_idx].sector == sector)
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{
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sector_cache[cache_idx].visit_cnt++;
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memcpy(buff, sector_cache[cache_idx].data, 0x200);
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memcpy(tweak, sector_cache[cache_idx].tweak, 0x10);
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prev_sector = sector;
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prev_cluster = sector >> 5;
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return 0;
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}
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}
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// add to cache
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if (cache_idx == sector_cache_cnt && cache_idx < MAX_SEC_CACHE_ENTRIES)
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{
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sector_cache[cache_idx].sector = sector;
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sector_cache[cache_idx].visit_cnt++;
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cache_sector = true;
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sector_cache_cnt++;
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}
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}
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|
||||
if (nx_emmc_part_read(&emmc_storage, system_part, sector, count, buff))
|
||||
{
|
||||
if (prev_cluster != sector >> 5) // Sector in different cluster than last read.
|
||||
{
|
||||
prev_cluster = sector >> 5;
|
||||
tweak_exp = sector % 0x20;
|
||||
}
|
||||
else if (sector > prev_sector) // Sector in same cluster and past last sector.
|
||||
{
|
||||
tweak_exp = sector - prev_sector - 1;
|
||||
regen_tweak = false;
|
||||
}
|
||||
else // Sector in same cluster and before or same as last sector.
|
||||
tweak_exp = sector % 0x20;
|
||||
|
||||
// Maximum one cluster (1 XTS crypto block 16KB).
|
||||
_nx_aes_xts_crypt_sec(ks_tweak, ks_crypt, 0, tweak, regen_tweak, tweak_exp, prev_cluster, buff, buff, count << 9);
|
||||
if (cache_sector)
|
||||
{
|
||||
memcpy(sector_cache[cache_idx].data, buff, 0x200);
|
||||
memcpy(sector_cache[cache_idx].tweak, tweak, 0x10);
|
||||
}
|
||||
prev_sector = sector + count - 1;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
// Error occurred.
|
||||
return 1;
|
||||
if (bis_cache->enabled)
|
||||
return nx_emmc_bis_read_block_cached(sector, count, buff);
|
||||
else
|
||||
return nx_emmc_bis_read_block_normal(sector, count, buff);
|
||||
}
|
||||
|
||||
int nx_emmc_bis_read(u32 sector, u32 count, void *buff)
|
||||
{
|
||||
int res = 1;
|
||||
u8 *buf = (u8 *)buff;
|
||||
u32 curr_sct = sector;
|
||||
|
||||
while (count)
|
||||
{
|
||||
u32 sct_cnt = MIN(count, 0x20);
|
||||
res = nx_emmc_bis_read_block(curr_sct, sct_cnt, buf);
|
||||
if (res)
|
||||
return 1;
|
||||
u32 sct_cnt = MIN(count, BIS_CLUSTER_SECTORS);
|
||||
if (nx_emmc_bis_read_block(curr_sct, sct_cnt, buf))
|
||||
return 0;
|
||||
|
||||
count -= sct_cnt;
|
||||
count -= sct_cnt;
|
||||
curr_sct += sct_cnt;
|
||||
buf += 512 * sct_cnt;
|
||||
buf += sct_cnt * NX_EMMC_BLOCKSIZE;
|
||||
}
|
||||
|
||||
return res;
|
||||
return 1;
|
||||
}
|
||||
|
||||
void nx_emmc_bis_init(emmc_part_t *part)
|
||||
int nx_emmc_bis_write(u32 sector, u32 count, void *buff)
|
||||
{
|
||||
u8 *buf = (u8 *)buff;
|
||||
u32 curr_sct = sector;
|
||||
|
||||
while (count)
|
||||
{
|
||||
u32 sct_cnt = MIN(count, BIS_CLUSTER_SECTORS);
|
||||
if (nx_emmc_bis_write_block(curr_sct, sct_cnt, buf, false))
|
||||
return 0;
|
||||
|
||||
count -= sct_cnt;
|
||||
curr_sct += sct_cnt;
|
||||
buf += sct_cnt * NX_EMMC_BLOCKSIZE;
|
||||
}
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
void nx_emmc_bis_init(emmc_part_t *part, bool enable_cache, u32 emummc_offset)
|
||||
{
|
||||
system_part = part;
|
||||
sector_cache_cnt = 0;
|
||||
emu_offset = emummc_offset;
|
||||
|
||||
switch (part->index)
|
||||
_nx_emmc_bis_cluster_cache_init(enable_cache);
|
||||
|
||||
if (!strcmp(part->name, "PRODINFO") || !strcmp(part->name, "PRODINFOF"))
|
||||
{
|
||||
case 0: // PRODINFO.
|
||||
case 1: // PRODINFOF.
|
||||
ks_crypt = 0;
|
||||
ks_tweak = 1;
|
||||
break;
|
||||
case 8: // SAFE.
|
||||
}
|
||||
else if (!strcmp(part->name, "SAFE"))
|
||||
{
|
||||
ks_crypt = 2;
|
||||
ks_tweak = 3;
|
||||
break;
|
||||
case 9: // SYSTEM.
|
||||
case 10: // USER.
|
||||
}
|
||||
else if (!strcmp(part->name, "SYSTEM") || !strcmp(part->name, "USER"))
|
||||
{
|
||||
ks_crypt = 4;
|
||||
ks_tweak = 5;
|
||||
break;
|
||||
}
|
||||
else
|
||||
system_part = NULL;
|
||||
}
|
||||
|
||||
void nx_emmc_bis_end()
|
||||
{
|
||||
_nx_emmc_bis_flush_cache();
|
||||
system_part = NULL;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -223,7 +223,8 @@ typedef struct _nx_emmc_cal0_t
|
|||
u8 console_6axis_sensor_mount_type;
|
||||
} __attribute__((packed)) nx_emmc_cal0_t;
|
||||
|
||||
int nx_emmc_bis_read(u32 sector, u32 count, void *buff);
|
||||
void nx_emmc_bis_init(emmc_part_t *part);
|
||||
int nx_emmc_bis_read(u32 sector, u32 count, void *buff);
|
||||
void nx_emmc_bis_init(emmc_part_t *part, bool enable_cache, u32 emummc_offset);
|
||||
void nx_emmc_bis_end();
|
||||
|
||||
#endif
|
||||
Loading…
Reference in a new issue