diff --git a/bdk/mem/sdram.c b/bdk/mem/sdram.c index 5e1fa05..486e10f 100644 --- a/bdk/mem/sdram.c +++ b/bdk/mem/sdram.c @@ -76,9 +76,9 @@ static const u8 dram_encoding_t210b01[] = { /* 26 */ LPDDR4X_4GB_MICRON_MT53E512M32D2NP_046_WTF, /* 27 */ LPDDR4X_4GB_MICRON_MT53E512M32D2NP_046_WTF, /* 28 */ LPDDR4X_8GB_SAMSUNG_K4UBE3D4AA_MGCL, -/* 29 */ LPDDR4X_4GB_HYNIX_H9HCNNNBKMMLXR_NEI, -/* 30 */ LPDDR4X_4GB_HYNIX_H9HCNNNBKMMLXR_NEI, -/* 31 */ LPDDR4X_4GB_HYNIX_H9HCNNNBKMMLXR_NEI, +/* 29 */ LPDDR4X_4GB_HYNIX_H54G46CYRBX267, +/* 30 */ LPDDR4X_4GB_HYNIX_H54G46CYRBX267, +/* 31 */ LPDDR4X_4GB_HYNIX_H54G46CYRBX267, /* 32 */ LPDDR4X_4GB_MICRON_MT53E512M32D1NP_046_WTB, /* 33 */ LPDDR4X_4GB_MICRON_MT53E512M32D1NP_046_WTB, /* 34 */ LPDDR4X_4GB_MICRON_MT53E512M32D1NP_046_WTB, diff --git a/bdk/mem/sdram.h b/bdk/mem/sdram.h index fa1d468..e7832c7 100644 --- a/bdk/mem/sdram.h +++ b/bdk/mem/sdram.h @@ -54,46 +54,46 @@ enum sdram_ids_erista enum sdram_ids_mariko { // LPDDR4X 4266Mbps. - LPDDR4X_HOAG_4GB_HYNIX_H9HCNNNBKMMLXR_NEE = 3, // Replaced from Copper. Die-M. (1y-01). - LPDDR4X_AULA_4GB_HYNIX_H9HCNNNBKMMLXR_NEE = 5, // Replaced from Copper. Die-M. (1y-01). - LPDDR4X_IOWA_4GB_HYNIX_H9HCNNNBKMMLXR_NEE = 6, // Replaced from Copper. Die-M. (1y-01). + LPDDR4X_HOAG_4GB_HYNIX_H9HCNNNBKMMLXR_NEE = 3, // Die-M. (1y-01). + LPDDR4X_AULA_4GB_HYNIX_H9HCNNNBKMMLXR_NEE = 5, // Die-M. (1y-01). + LPDDR4X_IOWA_4GB_HYNIX_H9HCNNNBKMMLXR_NEE = 6, // Die-M. (1y-01). // LPDDR4X 3733Mbps. - LPDDR4X_IOWA_4GB_SAMSUNG_K4U6E3S4AM_MGCJ = 8, // Die-M. 1st gen. 3733Mbps. - LPDDR4X_IOWA_8GB_SAMSUNG_K4UBE3D4AM_MGCJ = 9, // Die-M. - LPDDR4X_IOWA_4GB_HYNIX_H9HCNNNBKMMLHR_NME = 10, // Die-M. - LPDDR4X_IOWA_4GB_MICRON_MT53E512M32D2NP_046_WTE = 11, // 4266Mbps. Die-E. D9WGB. + LPDDR4X_IOWA_4GB_SAMSUNG_K4U6E3S4AM_MGCJ = 8, // Die-M. (1x-03). 1st gen. + LPDDR4X_IOWA_8GB_SAMSUNG_K4UBE3D4AM_MGCJ = 9, // Die-M. (1x-03). 1st gen. + LPDDR4X_IOWA_4GB_HYNIX_H9HCNNNBKMMLHR_NME = 10, // Die-M. (1x-03). + LPDDR4X_IOWA_4GB_MICRON_MT53E512M32D2NP_046_WTE = 11, // Die-E. (1x-03). D9WGB. 4266Mbps. - LPDDR4X_HOAG_4GB_SAMSUNG_K4U6E3S4AM_MGCJ = 12, // Die-M. 1st gen. 3733Mbps. - LPDDR4X_HOAG_8GB_SAMSUNG_K4UBE3D4AM_MGCJ = 13, // Die-M. - LPDDR4X_HOAG_4GB_HYNIX_H9HCNNNBKMMLHR_NME = 14, // Die-M. - LPDDR4X_HOAG_4GB_MICRON_MT53E512M32D2NP_046_WTE = 15, // 4266Mbps. Die-E. D9WGB. + LPDDR4X_HOAG_4GB_SAMSUNG_K4U6E3S4AM_MGCJ = 12, // Die-M. (1x-03). 1st gen. + LPDDR4X_HOAG_8GB_SAMSUNG_K4UBE3D4AM_MGCJ = 13, // Die-M. (1x-03). 1st gen. + LPDDR4X_HOAG_4GB_HYNIX_H9HCNNNBKMMLHR_NME = 14, // Die-M. (1x-03). + LPDDR4X_HOAG_4GB_MICRON_MT53E512M32D2NP_046_WTE = 15, // Die-E. (1x-03). D9WGB. 4266Mbps. // LPDDR4X 4266Mbps. - LPDDR4X_IOWA_4GB_SAMSUNG_K4U6E3S4AA_MGCL = 17, // Die-A. (1y-X03). 2nd gen. 4266Mbps. - LPDDR4X_IOWA_8GB_SAMSUNG_K4UBE3D4AA_MGCL = 18, // Die-A. (1y-X03). - LPDDR4X_HOAG_4GB_SAMSUNG_K4U6E3S4AA_MGCL = 19, // Die-A. (1y-X03). 2nd gen. 4266Mbps. + LPDDR4X_IOWA_4GB_SAMSUNG_K4U6E3S4AA_MGCL = 17, // Die-A. (1y-X03). 2nd gen. + LPDDR4X_IOWA_8GB_SAMSUNG_K4UBE3D4AA_MGCL = 18, // Die-A. (1y-X03). 2nd gen. + LPDDR4X_HOAG_4GB_SAMSUNG_K4U6E3S4AA_MGCL = 19, // Die-A. (1y-X03). 2nd gen. - LPDDR4X_IOWA_4GB_SAMSUNG_K4U6E3S4AB_MGCL = 20, // Die-B. 1z nm. 40% lower power usage. (1z-01). - LPDDR4X_HOAG_4GB_SAMSUNG_K4U6E3S4AB_MGCL = 21, // Die-B. 1z nm. 40% lower power usage. (1z-01). - LPDDR4X_AULA_4GB_SAMSUNG_K4U6E3S4AB_MGCL = 22, // Die-B. 1z nm. 40% lower power usage. (1z-01). + LPDDR4X_IOWA_4GB_SAMSUNG_K4U6E3S4AB_MGCL = 20, // Die-B. (1z-01). 3rd gen. 40% lower power usage. + LPDDR4X_HOAG_4GB_SAMSUNG_K4U6E3S4AB_MGCL = 21, // Die-B. (1z-01). 3rd gen. 40% lower power usage. + LPDDR4X_AULA_4GB_SAMSUNG_K4U6E3S4AB_MGCL = 22, // Die-B. (1z-01). 3rd gen. 40% lower power usage. - LPDDR4X_HOAG_8GB_SAMSUNG_K4UBE3D4AA_MGCL = 23, // Die-A. (1y-X03). - LPDDR4X_AULA_4GB_SAMSUNG_K4U6E3S4AA_MGCL = 24, // Die-A. (1y-X03). 2nd gen. 4266Mbps. + LPDDR4X_HOAG_8GB_SAMSUNG_K4UBE3D4AA_MGCL = 23, // Die-A. (1y-X03). 2nd gen. + LPDDR4X_AULA_4GB_SAMSUNG_K4U6E3S4AA_MGCL = 24, // Die-A. (1y-X03). 2nd gen. - LPDDR4X_IOWA_4GB_MICRON_MT53E512M32D2NP_046_WTF = 25, // 4266Mbps. Die-F. D9XRR. 10nm-class (1y-01). - LPDDR4X_HOAG_4GB_MICRON_MT53E512M32D2NP_046_WTF = 26, // 4266Mbps. Die-F. D9XRR. 10nm-class (1y-01). - LPDDR4X_AULA_4GB_MICRON_MT53E512M32D2NP_046_WTF = 27, // 4266Mbps. Die-F. D9XRR. 10nm-class (1y-01). + LPDDR4X_IOWA_4GB_MICRON_MT53E512M32D2NP_046_WTF = 25, // Die-F. (1y-01). D9XRR. + LPDDR4X_HOAG_4GB_MICRON_MT53E512M32D2NP_046_WTF = 26, // Die-F. (1y-01). D9XRR. + LPDDR4X_AULA_4GB_MICRON_MT53E512M32D2NP_046_WTF = 27, // Die-F. (1y-01). D9XRR. - LPDDR4X_AULA_8GB_SAMSUNG_K4UBE3D4AA_MGCL = 28, // Die-A. + LPDDR4X_AULA_8GB_SAMSUNG_K4UBE3D4AA_MGCL = 28, // Die-A. (1y-X03). 2nd gen. - LPDDR4X_UNK0_4GB_HYNIX_H9HCNNNBKMMLXR_NEI = 29, // Die-M. 1a nm. 61% lower power usage. (1a-01). - LPDDR4X_UNK1_4GB_HYNIX_H9HCNNNBKMMLXR_NEI = 30, // Die-M. 1a nm. 61% lower power usage. (1a-01). - LPDDR4X_UNK2_4GB_HYNIX_H9HCNNNBKMMLXR_NEI = 31, // Die-M. 1a nm. 61% lower power usage. (1a-01). + LPDDR4X_IOWA_4GB_HYNIX_H54G46CYRBX267 = 29, // Die-C. (1a-01). 61% lower power usage. + LPDDR4X_HOAG_4GB_HYNIX_H54G46CYRBX267 = 30, // Die-C. (1a-01). 61% lower power usage. + LPDDR4X_AULA_4GB_HYNIX_H54G46CYRBX267 = 31, // Die-C. (1a-01). 61% lower power usage. - LPDDR4X_UNK0_4GB_MICRON_MT53E512M32D1NP_046_WTB = 32, // 1a nm. 61% lower power usage. (1a-01). - LPDDR4X_UNK1_4GB_MICRON_MT53E512M32D1NP_046_WTB = 33, // 1a nm. 61% lower power usage. (1a-01). - LPDDR4X_UNK2_4GB_MICRON_MT53E512M32D1NP_046_WTB = 34, // 1a nm. 61% lower power usage. (1a-01). + LPDDR4X_IOWA_4GB_MICRON_MT53E512M32D1NP_046_WTB = 32, // Die-B. (1a-01). 61% lower power usage. + LPDDR4X_HOAG_4GB_MICRON_MT53E512M32D1NP_046_WTB = 33, // Die-B. (1a-01). 61% lower power usage. + LPDDR4X_AULA_4GB_MICRON_MT53E512M32D1NP_046_WTB = 34, // Die-B. (1a-01). 61% lower power usage. }; enum sdram_codes_mariko @@ -111,7 +111,7 @@ enum sdram_codes_mariko LPDDR4X_4GB_SAMSUNG_K4U6E3S4AB_MGCL = 5, // DRAM IDs: 20, 21, 22. LPDDR4X_4GB_MICRON_MT53E512M32D2NP_046_WTF = 6, // DRAM IDs: 25, 26, 27. LPDDR4X_4GB_HYNIX_H9HCNNNBKMMLXR_NEE = 7, // DRAM IDs: 03, 05, 06. - LPDDR4X_4GB_HYNIX_H9HCNNNBKMMLXR_NEI = 8, // DRAM IDs: 29, 30, 31. + LPDDR4X_4GB_HYNIX_H54G46CYRBX267 = 8, // DRAM IDs: 29, 30, 31. LPDDR4X_4GB_MICRON_MT53E512M32D1NP_046_WTB = 9, // DRAM IDs: 32, 33, 34. }; diff --git a/bdk/mem/sdram_config.inl b/bdk/mem/sdram_config.inl index 1d107ff..78c9b94 100644 --- a/bdk/mem/sdram_config.inl +++ b/bdk/mem/sdram_config.inl @@ -499,7 +499,7 @@ static const sdram_params_t210_t _dram_cfg_0_samsung_4gb = { * Specifies the value for MC_EMEM_CFG which holds the external memory * size (in KBytes) */ - .mc_emem_cfg = 0x00001000, // 4GB total density. + .mc_emem_cfg = 0x00001000, // 4GB total density. Max 8GB. /* MC arbitration configuration */ .mc_emem_arb_cfg = 0x08000001, @@ -657,7 +657,7 @@ static const sdram_vendor_patch_t sdram_cfg_vendor_patches_t210[] = { // Samsung 6GB density config. { 0x000C0302, 0x56C / 4, DRAM_ID(4) }, // mc_emem_adr_cfg_dev0. 768MB Chip 0 density. { 0x000C0302, 0x570 / 4, DRAM_ID(4) }, // mc_emem_adr_cfg_dev1. 768MB Chip 1 density. - { 0x00001800, 0x584 / 4, DRAM_ID(4) }, // mc_emem_cfg. 6GB total density. + { 0x00001800, 0x584 / 4, DRAM_ID(4) }, // mc_emem_cfg. 6GB total density. Max 8GB. // Samsung 8GB density config. { 0x0000003A, 0xEC / 4, DRAM_ID(7) }, // emc_rfc. @@ -667,5 +667,5 @@ static const sdram_vendor_patch_t sdram_cfg_vendor_patches_t210[] = { { 0x00000713, 0x2B4 / 4, DRAM_ID(7) }, // emc_dyn_self_ref_control. { 0x00080302, 0x56C / 4, DRAM_ID(7) }, // mc_emem_adr_cfg_dev0. 1024MB Chip 0 density. { 0x00080302, 0x570 / 4, DRAM_ID(7) }, // mc_emem_adr_cfg_dev1. 1024MB Chip 1 density. - { 0x00002000, 0x584 / 4, DRAM_ID(7) }, // mc_emem_cfg. 8GB total density. + { 0x00002000, 0x584 / 4, DRAM_ID(7) }, // mc_emem_cfg. 8GB total density. Max 8GB. }; diff --git a/bdk/mem/sdram_config_t210b01.inl b/bdk/mem/sdram_config_t210b01.inl index 8e584b5..f71db10 100644 --- a/bdk/mem/sdram_config_t210b01.inl +++ b/bdk/mem/sdram_config_t210b01.inl @@ -552,7 +552,7 @@ static const sdram_params_t210b01_t _dram_cfg_08_10_12_14_samsung_hynix_4gb = { * Specifies the value for MC_EMEM_CFG which holds the external memory * size (in KBytes) */ - .mc_emem_cfg = 0x00001000, // 4GB total density. + .mc_emem_cfg = 0x00001000, // 4GB total density. Max 8GB. /* MC arbitration configuration */ .mc_emem_arb_cfg = 0x08000001, @@ -714,7 +714,7 @@ static const sdram_params_t210b01_t _dram_cfg_08_10_12_14_samsung_hynix_4gb = { DRAM_CC(LPDDR4X_8GB_SAMSUNG_K4UBE3D4AA_MGCL) | \ DRAM_CC(LPDDR4X_4GB_MICRON_MT53E512M32D2NP_046_WTF) | \ DRAM_CC(LPDDR4X_4GB_HYNIX_H9HCNNNBKMMLXR_NEE) | \ - DRAM_CC(LPDDR4X_4GB_HYNIX_H9HCNNNBKMMLXR_NEI) | \ + DRAM_CC(LPDDR4X_4GB_HYNIX_H54G46CYRBX267) | \ DRAM_CC(LPDDR4X_4GB_MICRON_MT53E512M32D1NP_046_WTB) | \ DRAM_CC(LPDDR4X_4GB_SAMSUNG_K4U6E3S4AB_MGCL)) @@ -722,7 +722,7 @@ static const sdram_params_t210b01_t _dram_cfg_08_10_12_14_samsung_hynix_4gb = { DRAM_CC(LPDDR4X_4GB_SAMSUNG_K4U6E3S4AA_MGCL) | \ DRAM_CC(LPDDR4X_4GB_MICRON_MT53E512M32D2NP_046_WTF) | \ DRAM_CC(LPDDR4X_4GB_HYNIX_H9HCNNNBKMMLXR_NEE) | \ - DRAM_CC(LPDDR4X_4GB_HYNIX_H9HCNNNBKMMLXR_NEI) | \ + DRAM_CC(LPDDR4X_4GB_HYNIX_H54G46CYRBX267) | \ DRAM_CC(LPDDR4X_4GB_MICRON_MT53E512M32D1NP_046_WTB) | \ DRAM_CC(LPDDR4X_4GB_SAMSUNG_K4U6E3S4AB_MGCL)) @@ -731,7 +731,7 @@ static const sdram_params_t210b01_t _dram_cfg_08_10_12_14_samsung_hynix_4gb = { DRAM_CC(LPDDR4X_8GB_SAMSUNG_K4UBE3D4AA_MGCL) | \ DRAM_CC(LPDDR4X_4GB_MICRON_MT53E512M32D2NP_046_WTF) | \ DRAM_CC(LPDDR4X_4GB_HYNIX_H9HCNNNBKMMLXR_NEE) | \ - DRAM_CC(LPDDR4X_4GB_HYNIX_H9HCNNNBKMMLXR_NEI) | \ + DRAM_CC(LPDDR4X_4GB_HYNIX_H54G46CYRBX267) | \ DRAM_CC(LPDDR4X_4GB_MICRON_MT53E512M32D1NP_046_WTB) | \ DRAM_CC(LPDDR4X_4GB_SAMSUNG_K4U6E3S4AB_MGCL)) @@ -741,7 +741,7 @@ static const sdram_params_t210b01_t _dram_cfg_08_10_12_14_samsung_hynix_4gb = { DRAM_CC(LPDDR4X_4GB_MICRON_MT53E512M32D1NP_046_WTB)) #define DRAM_CC_LPDDR4X_VPR (DRAM_CC(LPDDR4X_4GB_HYNIX_H9HCNNNBKMMLXR_NEE) | \ - DRAM_CC(LPDDR4X_4GB_HYNIX_H9HCNNNBKMMLXR_NEI) | \ + DRAM_CC(LPDDR4X_4GB_HYNIX_H54G46CYRBX267) | \ DRAM_CC(LPDDR4X_4GB_MICRON_MT53E512M32D1NP_046_WTB) | \ DRAM_CC(LPDDR4X_4GB_SAMSUNG_K4U6E3S4AB_MGCL)) @@ -780,7 +780,7 @@ static const sdram_vendor_patch_t sdram_cfg_vendor_patches_t210b01[] = { { 0x00000008, 0x24C / 4, DRAM_CC_LPDDR4X_FAW }, // emc_tfaw. { 0x00000001, 0x670 / 4, DRAM_CC_LPDDR4X_FAW }, // mc_emem_arb_timing_faw. - { 0xE4FACB43, 0x6D4 / 4, DRAM_CC_LPDDR4X_VPR }, // mc_video_protect_vpr_override. + TSEC, NVENC. + { 0xE4FACB43, 0x6D4 / 4, DRAM_CC_LPDDR4X_VPR }, // mc_video_protect_vpr_override. + TSEC, NVENC. { 0x0600FED3, 0x6D8 / 4, DRAM_CC_LPDDR4X_VPR }, // mc_video_protect_vpr_override1. + TSECB, TSEC1, TSECB1. { 0x00000001, 0x134 / 4, DRAM_CC_LPDDR4X_8GB }, // emc_adr_cfg. 2 Ranks. @@ -801,7 +801,7 @@ static const sdram_vendor_patch_t sdram_cfg_vendor_patches_t210b01[] = { { 0x00000000, 0x594 / 4, DRAM_CC_LPDDR4X_8GB }, // emc_pmacro_tx_pwrd4. { 0x00001000, 0x598 / 4, DRAM_CC_LPDDR4X_8GB }, // emc_pmacro_tx_pwrd5. { 0x00000001, 0x630 / 4, DRAM_CC_LPDDR4X_8GB }, // mc_emem_adr_cfg. 2 Ranks. - { 0x00002000, 0x64C / 4, DRAM_CC_LPDDR4X_8GB }, // mc_emem_cfg. 8GB total density. + { 0x00002000, 0x64C / 4, DRAM_CC_LPDDR4X_8GB }, // mc_emem_cfg. 8GB total density. Max 8GB. { 0x00000002, 0x680 / 4, DRAM_CC_LPDDR4X_8GB }, // mc_emem_arb_timing_r2r. { 0x02020001, 0x694 / 4, DRAM_CC_LPDDR4X_8GB }, // mc_emem_arb_da_turns. };