From 8bf3bee08b5cbb9872c2f0cc2a932633068316c7 Mon Sep 17 00:00:00 2001
From: CTCaer <ctcaer@gmail.com>
Date: Fri, 4 Oct 2024 21:52:24 +0300
Subject: [PATCH] bdk: uart: fix fifo clear

- Do not clear fifo for everything if not needed
- Correct fifo clear checks
---
 bdk/soc/uart.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/bdk/soc/uart.c b/bdk/soc/uart.c
index a2efaab..c76c66e 100644
--- a/bdk/soc/uart.c
+++ b/bdk/soc/uart.c
@@ -174,14 +174,14 @@ void uart_empty_fifo(u32 idx, u32 which)
 	(void)uart->UART_SPR;
 	usleep(96);
 
-	uart->UART_IIR_FCR = UART_IIR_FCR_EN_FIFO | UART_IIR_FCR_TX_CLR | UART_IIR_FCR_RX_CLR;
+	uart->UART_IIR_FCR = UART_IIR_FCR_EN_FIFO | which;
 	(void)uart->UART_SPR;
 	usleep(18);
 	u32 tries = 0;
 
 	if (UART_IIR_FCR_TX_CLR & which)
 	{
-		while (tries < 10 && uart->UART_LSR & UART_LSR_TMTY)
+		while (tries < 10 && !(uart->UART_LSR & UART_LSR_TMTY))
 		{
 			tries++;
 			usleep(100);
@@ -191,7 +191,7 @@ void uart_empty_fifo(u32 idx, u32 which)
 
 	if (UART_IIR_FCR_RX_CLR & which)
 	{
-		while (tries < 10 && !uart->UART_LSR & UART_LSR_RDR)
+		while (tries < 10 && (uart->UART_LSR & UART_LSR_RDR))
 		{
 			tries++;
 			usleep(100);