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bdk: usb: utilize apb relaxed clocks for init

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CTCaer 2024-06-02 07:01:31 +03:00
parent ddd19661bd
commit 84c5439c70
2 changed files with 14 additions and 2 deletions
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8
bdk/usb/usbd.c
View file

@ -1,7 +1,7 @@
/*
* Enhanced USB Device (EDCI) driver for Tegra X1
*
* Copyright (c) 2019-2023 CTCaer
* Copyright (c) 2019-2024 CTCaer
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
@ -355,9 +355,15 @@ int usb_device_init()
if (usb_init_done)
return USB_RES_OK;
// Ease the stress to APB.
bpmp_clk_rate_relaxed(true);
// Initialize USB2 controller PHY.
_usb_init_phy();
// Restore OC.
bpmp_clk_rate_relaxed(false);
// AHB USB performance cfg.
AHB_GIZMO(AHB_GIZMO_AHB_MEM) |= AHB_MEM_DONT_SPLIT_AHB_WR | AHB_MEM_ENB_FAST_REARBITRATE;
AHB_GIZMO(AHB_GIZMO_USB) |= AHB_GIZMO_IMMEDIATE;

8
bdk/usb/xusbd.c
View file

@ -1,7 +1,7 @@
/*
* eXtensible USB Device driver (XDCI) for Tegra X1
*
* Copyright (c) 2020-2022 CTCaer
* Copyright (c) 2020-2024 CTCaer
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
@ -883,6 +883,9 @@ static void _xusbd_init_device_clocks()
int xusb_device_init()
{
// Ease the stress to APB.
bpmp_clk_rate_relaxed(true);
// Disable USB2 device controller clocks.
CLOCK(CLK_RST_CONTROLLER_RST_DEV_L_SET) = BIT(CLK_L_USBD);
CLOCK(CLK_RST_CONTROLLER_CLK_ENB_L_CLR) = BIT(CLK_L_USBD);
@ -920,6 +923,9 @@ int xusb_device_init()
// Initialize device clocks.
_xusbd_init_device_clocks();
// Restore OC.
bpmp_clk_rate_relaxed(false);
// Enable AHB redirect for access to IRAM for Event/EP ring buffers.
mc_enable_ahb_redirect();