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l4t: allow setting dram voltage even if no OC

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Mostly for allowing undervolting.
This commit is contained in:
CTCaer 2023-10-12 07:44:00 +03:00
parent 697bde8667
commit 7040f1ada2
1 changed files with 6 additions and 6 deletions
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12
bootloader/l4t/l4t.c
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@ -798,18 +798,18 @@ static void _l4t_bpmpfw_b01_config(l4t_ctxt_t *ctxt)
} }
} }
// A frequency of lower or equal with stock max will skip ARC.
if (ram_oc_freq > DRAM_T210B01_TBL_MAX_FREQ)
{
// Final table.
const u32 tbl_idx = BPMPFW_B01_DTB_EMC_ENTRIES - 1;
// Set DRAM voltage. // Set DRAM voltage.
if (ctxt->ram_oc_vdd2) if (ctxt->ram_oc_vdd2)
max7762x_regulator_set_voltage(REGULATOR_SD1, ctxt->ram_oc_vdd2 * 1000); max7762x_regulator_set_voltage(REGULATOR_SD1, ctxt->ram_oc_vdd2 * 1000);
if (ctxt->ram_oc_vddq) if (ctxt->ram_oc_vddq)
max7762x_regulator_set_voltage(REGULATOR_RAM0, ctxt->ram_oc_vddq * 1000); max7762x_regulator_set_voltage(REGULATOR_RAM0, ctxt->ram_oc_vddq * 1000);
// A frequency of lower or equal with stock max will skip ARC.
if (ram_oc_freq > DRAM_T210B01_TBL_MAX_FREQ)
{
// Final table.
const u32 tbl_idx = BPMPFW_B01_DTB_EMC_ENTRIES - 1;
// Copy table and prep it for Arachne. // Copy table and prep it for Arachne.
memcpy(BPMPFW_B01_DTB_EMC_TBL_OFFSET(tbl_idx), BPMPFW_B01_MTC_TABLE_OFFSET(mtc_idx, 2), BPMPFW_B01_MTC_FREQ_TABLE_SIZE); memcpy(BPMPFW_B01_DTB_EMC_TBL_OFFSET(tbl_idx), BPMPFW_B01_MTC_TABLE_OFFSET(mtc_idx, 2), BPMPFW_B01_MTC_FREQ_TABLE_SIZE);