mirror of
https://github.com/CTCaer/hekate
synced 2024-07-03 15:03:29 +00:00
Move display_end before secmon + add boolean supp.
Currently bpmp loses access to the relevant registers when secmon or exosphere is launched. This change provides support for all firmwares and properly sanitizes the display.
This commit is contained in:
Kostas Missos
parent
e5abdd938e
commit
6b8887b5d8
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@ -133,7 +133,7 @@ void config_autoboot()
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LIST_INIT(ini_sections);
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u8 max_entries = 29;
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int ini_freed = 1;
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bool ini_freed = true;
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ment_t *ments = (ment_t *)malloc(sizeof(ment_t) * (max_entries + 3));
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u32 *boot_values = (u32 *)malloc(sizeof(u32) * max_entries);
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@ -146,7 +146,7 @@ void config_autoboot()
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{
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if (ini_parse(&ini_sections, "hekate_ipl.ini"))
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{
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ini_freed = 0;
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ini_freed = false;
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// Build configuration menu.
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ments[0].type = MENT_BACK;
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@ -137,18 +137,16 @@ void display_init()
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exec_cfg((u32 *)DISPLAY_A_BASE, _display_config_11, 113);
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}
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void display_backlight(u8 enable)
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void display_backlight(bool enable)
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{
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gpio_write(GPIO_PORT_V, GPIO_PIN_0, enable ? GPIO_HIGH : GPIO_LOW); // Backlight PWM.
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}
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void display_end()
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{
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display_backlight(0);
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display_backlight(false);
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//TODO: figure out why this freezes.
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/*DSI(_DSIREG(DSI_VIDEO_MODE_CONTROL)) = 1;
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DSI(_DSIREG(DSI_VIDEO_MODE_CONTROL)) = 1;
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DSI(_DSIREG(DSI_WR_DATA)) = 0x2805;
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u32 end = HOST1X(0x30A4) + 5;
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@ -171,17 +169,17 @@ void display_end()
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usleep(50000);
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//gpio_write(GPIO_PORT_V, GPIO_PIN_2, GPIO_LOW); //Backlight Reset disable.
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gpio_write(GPIO_PORT_V, GPIO_PIN_2, GPIO_LOW); //Backlight Reset disable.
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//usleep(10000);
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usleep(10000);
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//gpio_write(GPIO_PORT_I, GPIO_PIN_1, GPIO_LOW); //Backlight -5V disable.
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gpio_write(GPIO_PORT_I, GPIO_PIN_1, GPIO_LOW); //Backlight -5V disable.
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//usleep(10000);
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usleep(10000);
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//gpio_write(GPIO_PORT_I, GPIO_PIN_0, GPIO_LOW); //Backlight +5V disable.
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gpio_write(GPIO_PORT_I, GPIO_PIN_0, GPIO_LOW); //Backlight +5V disable.
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//usleep(10000);
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usleep(10000);
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//Disable clocks.
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CLOCK(CLK_RST_CONTROLLER_RST_DEV_H_SET) = 0x1010000;
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@ -190,7 +188,7 @@ void display_end()
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CLOCK(CLK_RST_CONTROLLER_CLK_ENB_L_CLR) = 0x18000000;
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DSI(_DSIREG(DSI_PAD_CONTROL_0)) = DSI_PAD_CONTROL_VS1_PULLDN_CLK | DSI_PAD_CONTROL_VS1_PULLDN(0xF) | DSI_PAD_CONTROL_VS1_PDIO_CLK | DSI_PAD_CONTROL_VS1_PDIO(0xF);
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DSI(_DSIREG(DSI_POWER_CONTROL)) = 0;*/
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DSI(_DSIREG(DSI_POWER_CONTROL)) = 0;
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gpio_config(GPIO_PORT_V, GPIO_PIN_0, GPIO_MODE_SPIO); // Backlight PWM.
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@ -211,7 +209,7 @@ void display_color_screen(u32 color)
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usleep(35000);
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display_backlight(1);
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display_backlight(true);
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}
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u32 *display_init_framebuffer()
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@ -345,7 +345,7 @@ void display_end();
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void display_color_screen(u32 color);
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/*! Switches screen backlight ON/OFF. */
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void display_backlight(u8 enable);
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void display_backlight(bool enable);
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/*! Init display in full 1280x720 resolution (B8G8R8A8, line stride 768, framebuffer size = 1280*768*4 bytes). */
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u32 *display_init_framebuffer();
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@ -31,7 +31,7 @@ extern u8 *Kc_MENU_LOGO;
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extern hekate_config h_cfg;
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void tui_sbar(gfx_con_t *con, int force_update)
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void tui_sbar(gfx_con_t *con, bool force_update)
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{
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u32 timePassed = get_tmr_s() - h_cfg.sbar_time_keeping;
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if (!force_update)
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@ -90,7 +90,7 @@ void tui_pbar(gfx_con_t *con, int x, int y, u32 val, u32 fgcol, u32 bgcol)
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gfx_con_setpos(con, cx, cy);
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// Update status bar.
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tui_sbar(con, 0);
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tui_sbar(con, false);
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}
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void *tui_do_menu(gfx_con_t *con, menu_t *menu)
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@ -98,7 +98,7 @@ void *tui_do_menu(gfx_con_t *con, menu_t *menu)
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int idx = 0, prev_idx = 0, cnt = 0x7FFFFFFF;
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gfx_clear_partial_grey(con->gfx_ctxt, 0x1B, 0, 1256);
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tui_sbar(con, 1);
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tui_sbar(con, true);
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#ifdef MENU_LOGO_ENABLE
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gfx_set_rect_rgb(con->gfx_ctxt, Kc_MENU_LOGO,
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@ -197,7 +197,7 @@ void *tui_do_menu(gfx_con_t *con, menu_t *menu)
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X_MENU_LOGO, Y_MENU_LOGO, X_POS_MENU_LOGO, Y_POS_MENU_LOGO);
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#endif //MENU_LOGO_ENABLE
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}
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tui_sbar(con, 0);
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tui_sbar(con, false);
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}
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return NULL;
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@ -58,7 +58,7 @@ typedef struct _menu_t
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#define MDEF_CAPTION(caption, color) { MENT_CAPTION, caption, color }
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#define MDEF_CHGLINE() {MENT_CHGLINE}
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void tui_sbar(gfx_con_t *con, int force_update);
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void tui_sbar(gfx_con_t *con, bool force_update);
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void tui_pbar(gfx_con_t *con, int x, int y, u32 val, u32 fgcol, u32 bgcol);
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void *tui_do_menu(gfx_con_t *con, menu_t *menu);
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@ -67,9 +67,9 @@ typedef struct _launch_ctxt_t
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link_t kip1_list;
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char* kip1_patches;
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int svcperm;
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int debugmode;
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int atmosphere;
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bool svcperm;
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bool debugmode;
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bool atmosphere;
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} launch_ctxt_t;
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typedef struct _merge_kip_t
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@ -358,7 +358,7 @@ static int _config_svcperm(launch_ctxt_t *ctxt, const char *value)
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if (*value == '1')
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{
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DPRINTF("Disabled SVC verification\n");
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ctxt->svcperm = 1;
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ctxt->svcperm = true;
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}
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return 1;
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}
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@ -368,7 +368,7 @@ static int _config_debugmode(launch_ctxt_t *ctxt, const char *value)
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if (*value == '1')
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{
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DPRINTF("Enabled Debug mode\n");
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ctxt->debugmode = 1;
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ctxt->debugmode = true;
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}
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return 1;
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}
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@ -378,7 +378,7 @@ static int _config_atmosphere(launch_ctxt_t *ctxt, const char *value)
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if (*value == '1')
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{
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DPRINTF("Enabled atmosphere patching\n");
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ctxt->atmosphere = 1;
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ctxt->atmosphere = true;
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}
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return 1;
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}
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@ -457,7 +457,6 @@ int hos_launch(ini_sec_t *cfg)
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int bootStateDramPkg2 = 0;
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int bootStatePkg2Continue = 0;
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int exoFwNumber = 0;
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int end_di = 0;
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launch_ctxt_t ctxt;
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memset(&ctxt, 0, sizeof(launch_ctxt_t));
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@ -611,7 +610,6 @@ int hos_launch(ini_sec_t *cfg)
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se_key_acc_ctrl(13, 0xFF);
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bootStateDramPkg2 = 2;
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bootStatePkg2Continue = 3;
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end_di = 1;
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if (!exoFwNumber)
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exoFwNumber = 3;
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break;
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@ -662,7 +660,8 @@ int hos_launch(ini_sec_t *cfg)
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*mb_in = bootStateDramPkg2;
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*mb_out = 0;
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display_backlight(0);
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// Disable display. This must be executed before secmon to provide support for all fw versions.
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display_end();
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// Wait for secmon to get ready.
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cluster_boot_cpu0(ctxt.pkg1_id->secmon_base);
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@ -679,10 +678,6 @@ int hos_launch(ini_sec_t *cfg)
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PMC(0x5BC) = 0xFFFFFFFF;
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PMC(0x5C0) = 0xFFAAFFFF;*/
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// Disable display.
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if (end_di)
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display_end();
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// Signal pkg2 ready and continue boot.
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*mb_in = bootStatePkg2Continue;
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@ -75,12 +75,12 @@ PATCHSET_DEF(_secmon_5_patchset,
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*/
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static const pkg1_id_t _pkg1_ids[] = {
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{ "20161121183008", 0, 0x1900, 0x3FE0, { 2, 1, 0 }, SM_100_ADR, 0x8000D000, 1, _secmon_1_patchset }, //1.0.0 (Patched relocator)
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{ "20170210155124", 0, 0x1900, 0x3FE0, { 0, 1, 2 }, 0x4002D000, 0x8000D000, 1, _secmon_2_patchset }, //2.0.0 - 2.3.0
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{ "20170519101410", 1, 0x1A00, 0x3FE0, { 0, 1, 2 }, 0x4002D000, 0x8000D000, 1, _secmon_3_patchset }, //3.0.0
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{ "20170710161758", 2, 0x1A00, 0x3FE0, { 0, 1, 2 }, 0x4002D000, 0x8000D000, 1, _secmon_3_patchset }, //3.0.1 - 3.0.2
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{ "20170921172629", 3, 0x1800, 0x3FE0, { 1, 2, 0 }, 0x4002B000, 0x4003B000, 0, _secmon_4_patchset }, //4.0.0 - 4.1.0
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{ "20180220163747", 4, 0x1900, 0x3FE0, { 1, 2, 0 }, 0x4002B000, 0x4003B000, 0, _secmon_5_patchset }, //5.0.0 - 5.1.0
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{ "20161121183008", 0, 0x1900, 0x3FE0, { 2, 1, 0 }, SM_100_ADR, 0x8000D000, true, _secmon_1_patchset }, //1.0.0 (Patched relocator)
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{ "20170210155124", 0, 0x1900, 0x3FE0, { 0, 1, 2 }, 0x4002D000, 0x8000D000, true, _secmon_2_patchset }, //2.0.0 - 2.3.0
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{ "20170519101410", 1, 0x1A00, 0x3FE0, { 0, 1, 2 }, 0x4002D000, 0x8000D000, true, _secmon_3_patchset }, //3.0.0
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{ "20170710161758", 2, 0x1A00, 0x3FE0, { 0, 1, 2 }, 0x4002D000, 0x8000D000, true, _secmon_3_patchset }, //3.0.1 - 3.0.2
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{ "20170921172629", 3, 0x1800, 0x3FE0, { 1, 2, 0 }, 0x4002B000, 0x4003B000, false, _secmon_4_patchset }, //4.0.0 - 4.1.0
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{ "20180220163747", 4, 0x1900, 0x3FE0, { 1, 2, 0 }, 0x4002B000, 0x4003B000, false, _secmon_5_patchset }, //5.0.0 - 5.1.0
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{ NULL } //End.
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};
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@ -40,7 +40,7 @@ typedef struct _pkg1_id_t
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u32 sec_map[3];
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u32 secmon_base;
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u32 warmboot_base;
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int set_warmboot;
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bool set_warmboot;
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patch_t *secmon_patchset;
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} pkg1_id_t;
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@ -79,7 +79,7 @@ gfx_con_t gfx_con;
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sdmmc_t sd_sdmmc;
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sdmmc_storage_t sd_storage;
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FATFS sd_fs;
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int sd_mounted;
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bool sd_mounted;
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#ifdef MENU_LOGO_ENABLE
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u8 *Kc_MENU_LOGO;
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@ -87,10 +87,10 @@ u8 *Kc_MENU_LOGO;
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hekate_config h_cfg;
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int sd_mount()
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bool sd_mount()
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{
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if (sd_mounted)
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return 1;
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return true;
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if (!sdmmc_storage_init_sd(&sd_storage, &sd_sdmmc, SDMMC_1, SDMMC_BUS_WIDTH_4, 11))
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{
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@ -103,7 +103,7 @@ int sd_mount()
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if (res == FR_OK)
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{
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sd_mounted = 1;
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return 1;
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return true;
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}
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else
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{
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@ -111,7 +111,7 @@ int sd_mount()
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}
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}
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return 0;
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return false;
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}
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void sd_unmount()
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@ -120,7 +120,7 @@ void sd_unmount()
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{
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f_mount(NULL, "", 1);
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sdmmc_storage_end(&sd_storage);
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sd_mounted = 0;
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sd_mounted = false;
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}
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}
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@ -175,7 +175,7 @@ void emmcsn_path_impl(char *path, char *sub_dir, char *filename, sdmmc_storage_t
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sdmmc_storage_t storage2;
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sdmmc_t sdmmc;
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char emmcSN[9];
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int init_done = 0;
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bool init_done = false;
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memcpy(path, "Backup", 7);
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f_mkdir(path);
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@ -186,7 +186,7 @@ void emmcsn_path_impl(char *path, char *sub_dir, char *filename, sdmmc_storage_t
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memcpy(emmcSN, "00000000", 9);
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else
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{
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init_done = 1;
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init_done = true;
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itoa(storage2.cid.serial, emmcSN, 16);
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}
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}
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@ -401,7 +401,7 @@ void config_hw()
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sdram_lp0_save_params(sdram_get_params());
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}
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void reconfig_hw_workaround(int extra_reconfig)
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void reconfig_hw_workaround(bool extra_reconfig)
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{
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// Re-enable clocks to Audio Processing Engine as a workaround to hanging.
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CLOCK(CLK_RST_CONTROLLER_CLK_OUT_ENB_V) |= 0x400; // Enable AHUB clock.
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@ -789,7 +789,7 @@ void reboot_rcm()
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#endif //MENU_LOGO_ENABLE
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PMC(APBDEV_PMC_SCRATCH0) = 2; // Reboot into rcm.
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PMC(0) |= 0x10;
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while (1)
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while (true)
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usleep(1);
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}
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@ -914,8 +914,8 @@ int dump_emmc_part(char *sd_path, sdmmc_storage_t *storage, emmc_part_t *part)
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u32 currPartIdx = 0;
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u32 numSplitParts = 0;
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u32 maxSplitParts = 0;
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int isSmallSdCard = 0;
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int partialDumpInProgress = 0;
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bool isSmallSdCard = false;
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bool partialDumpInProgress = false;
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int res = 0;
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char *outFilename = sd_path;
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u32 sdPathLen = strlen(sd_path);
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@ -938,7 +938,7 @@ int dump_emmc_part(char *sd_path, sdmmc_storage_t *storage, emmc_part_t *part)
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// Check if the USER partition or the RAW eMMC fits the sd card free space.
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if (totalSectors > (sd_fs.free_clst * sd_fs.csize))
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{
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isSmallSdCard = 1;
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isSmallSdCard = true;
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gfx_printf(&gfx_con, "%k\nSD card free space is smaller than total backup size.%k\n", 0xFFFFBA00, 0xFFCCCCCC);
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@ -955,9 +955,9 @@ int dump_emmc_part(char *sd_path, sdmmc_storage_t *storage, emmc_part_t *part)
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{
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gfx_printf(&gfx_con, "%kFound Partial Backup in progress. Continuing...%k\n\n", 0xFFAEFD14, 0xFFCCCCCC);
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partialDumpInProgress = 1;
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partialDumpInProgress = true;
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// Force partial dumping, even if the card is larger.
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isSmallSdCard = 1;
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isSmallSdCard = true;
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f_read(&partialIdxFp, &currPartIdx, 4, NULL);
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f_close(&partialIdxFp);
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@ -1215,7 +1215,7 @@ static void dump_emmc_selected(emmcPartType_t dumpType)
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int res = 0;
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u32 timer = 0;
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gfx_clear_partial_grey(&gfx_ctxt, 0x1B, 0, 1256);
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tui_sbar(&gfx_con, 1);
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tui_sbar(&gfx_con, true);
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gfx_con_setpos(&gfx_con, 0, 0);
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if (!sd_mount())
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@ -1455,7 +1455,7 @@ static void restore_emmc_selected(emmcPartType_t restoreType)
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int res = 0;
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u32 timer = 0;
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gfx_clear_partial_grey(&gfx_ctxt, 0x1B, 0, 1256);
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tui_sbar(&gfx_con, 1);
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tui_sbar(&gfx_con, true);
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gfx_con_setpos(&gfx_con, 0, 0);
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||||
gfx_printf(&gfx_con, "%kThis is a dangerous operation\nand may render your device inoperative!\n\n", 0xFFFFDD00);
|
||||
|
|
@ -1936,14 +1936,14 @@ void auto_launch_firmware()
|
|||
};
|
||||
|
||||
struct _bmp_data bmpData;
|
||||
int backlightEnabled = 0;
|
||||
int bootlogoFound = 0;
|
||||
bool backlightEnabled = false;
|
||||
bool bootlogoFound = false;
|
||||
char *bootlogoCustomEntry = NULL;
|
||||
|
||||
ini_sec_t *cfg_sec = NULL;
|
||||
LIST_INIT(ini_sections);
|
||||
|
||||
gfx_con.mute = 1;
|
||||
gfx_con.mute = true;
|
||||
|
||||
if (sd_mount())
|
||||
{
|
||||
|
|
@ -2049,7 +2049,7 @@ void auto_launch_firmware()
|
|||
if (bmpData.size_x < 720 || bmpData.size_y < 1280)
|
||||
gfx_clear_color(&gfx_ctxt, *(u32 *)BOOTLOGO);
|
||||
|
||||
bootlogoFound = 1;
|
||||
bootlogoFound = true;
|
||||
}
|
||||
}
|
||||
else
|
||||
|
|
@ -2072,7 +2072,7 @@ void auto_launch_firmware()
|
|||
}
|
||||
free(BOOTLOGO);
|
||||
|
||||
display_backlight(1);
|
||||
display_backlight(true);
|
||||
backlightEnabled = 1;
|
||||
|
||||
// Wait before booting. If VOL- is pressed go into bootloader menu.
|
||||
|
|
@ -2101,10 +2101,10 @@ out:
|
|||
ini_free_section(cfg_sec);
|
||||
|
||||
sd_unmount();
|
||||
gfx_con.mute = 0;
|
||||
gfx_con.mute = false;
|
||||
|
||||
if (!backlightEnabled)
|
||||
display_backlight(1);
|
||||
display_backlight(true);
|
||||
}
|
||||
|
||||
void toggle_autorcm()
|
||||
|
|
@ -2741,7 +2741,7 @@ void ipl_main()
|
|||
gfx_con_init(&gfx_con, &gfx_ctxt);
|
||||
|
||||
// Enable backlight after initializing gfx
|
||||
//display_backlight(1);
|
||||
//display_backlight(true);
|
||||
set_default_configuration();
|
||||
// Load saved configuration and auto boot if enabled.
|
||||
auto_launch_firmware();
|
||||
|
|
|
|||
|
|
@ -3,7 +3,7 @@
|
|||
#include "../soc/clock.h"
|
||||
#include "../utils/util.h"
|
||||
|
||||
void mc_config_tsec_carveout(u32 bom, u32 size1mb, int lock)
|
||||
void mc_config_tsec_carveout(u32 bom, u32 size1mb, bool lock)
|
||||
{
|
||||
MC(MC_SEC_CARVEOUT_BOM) = bom;
|
||||
MC(MC_SEC_CARVEOUT_SIZE_MB) = size1mb;
|
||||
|
|
@ -21,8 +21,8 @@ void mc_config_carveout()
|
|||
MC(MC_VIDEO_PROTECT_REG_CTRL) = 1;
|
||||
|
||||
// Configure TSEC carveout @ 0x90000000, 1MB.
|
||||
//mc_config_tsec_carveout(0x90000000, 1, 0);
|
||||
mc_config_tsec_carveout(0, 0, 1);
|
||||
//mc_config_tsec_carveout(0x90000000, 1, false);
|
||||
mc_config_tsec_carveout(0, 0, true);
|
||||
|
||||
MC(MC_MTS_CARVEOUT_BOM) = 0;
|
||||
MC(MC_MTS_CARVEOUT_SIZE_MB) = 0;
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
#include "../utils/types.h"
|
||||
#include "../mem/mc_t210.h"
|
||||
|
||||
void mc_config_tsec_carveout(u32 bom, u32 size1mb, int lock);
|
||||
void mc_config_tsec_carveout(u32 bom, u32 size1mb, bool lock);
|
||||
void mc_config_carveout();
|
||||
void mc_config_carveout_finalize();
|
||||
void mc_enable_ahb_redirect();
|
||||
|
|
|
|||
|
|
@ -190,10 +190,10 @@ out:;
|
|||
int sdmmc_setup_clock(sdmmc_t *sdmmc, u32 type)
|
||||
{
|
||||
//Disable the SD clock if it was enabled, and reenable it later.
|
||||
int should_enable_sd_clock = 0;
|
||||
bool should_enable_sd_clock = false;
|
||||
if (sdmmc->regs->clkcon & TEGRA_MMC_CLKCON_SD_CLOCK_ENABLE)
|
||||
{
|
||||
should_enable_sd_clock = 1;
|
||||
should_enable_sd_clock = true;
|
||||
sdmmc->regs->clkcon &= ~TEGRA_MMC_CLKCON_SD_CLOCK_ENABLE;
|
||||
}
|
||||
|
||||
|
|
@ -441,7 +441,7 @@ static int _sdmmc_setup_read_small_block(sdmmc_t *sdmmc)
|
|||
return 1;
|
||||
}
|
||||
|
||||
static int _sdmmc_parse_cmdbuf(sdmmc_t *sdmmc, sdmmc_cmd_t *cmd, int is_data_present)
|
||||
static int _sdmmc_parse_cmdbuf(sdmmc_t *sdmmc, sdmmc_cmd_t *cmd, bool is_data_present)
|
||||
{
|
||||
u16 cmdflags = 0;
|
||||
|
||||
|
|
@ -488,7 +488,7 @@ static void _sdmmc_parse_cmd_48(sdmmc_t *sdmmc, u32 cmd)
|
|||
cmdbuf.arg = 0;
|
||||
cmdbuf.rsp_type = SDMMC_RSP_TYPE_1;
|
||||
cmdbuf.check_busy = 0;
|
||||
_sdmmc_parse_cmdbuf(sdmmc, &cmdbuf, 1);
|
||||
_sdmmc_parse_cmdbuf(sdmmc, &cmdbuf, true);
|
||||
}
|
||||
|
||||
static int _sdmmc_config_tuning_once(sdmmc_t *sdmmc, u32 cmd)
|
||||
|
|
@ -631,10 +631,10 @@ static int _sdmmc_autocal_config_offset(sdmmc_t *sdmmc, u32 power)
|
|||
|
||||
static void _sdmmc_autocal_execute(sdmmc_t *sdmmc, u32 power)
|
||||
{
|
||||
int should_enable_sd_clock = 0;
|
||||
bool should_enable_sd_clock = false;
|
||||
if (sdmmc->regs->clkcon & TEGRA_MMC_CLKCON_SD_CLOCK_ENABLE)
|
||||
{
|
||||
should_enable_sd_clock = 1;
|
||||
should_enable_sd_clock = true;
|
||||
sdmmc->regs->clkcon &= ~TEGRA_MMC_CLKCON_SD_CLOCK_ENABLE;
|
||||
}
|
||||
|
||||
|
|
@ -738,7 +738,7 @@ static int _sdmmc_stop_transmission_inner(sdmmc_t *sdmmc, u32 *rsp)
|
|||
cmd.arg = 0;
|
||||
cmd.rsp_type = SDMMC_RSP_TYPE_1;
|
||||
cmd.check_busy = 1;
|
||||
_sdmmc_parse_cmdbuf(sdmmc, &cmd, 0);
|
||||
_sdmmc_parse_cmdbuf(sdmmc, &cmd, false);
|
||||
int res = _sdmmc_wait_request(sdmmc);
|
||||
_sdmmc_mask_interrupts(sdmmc);
|
||||
|
||||
|
|
@ -754,10 +754,10 @@ int sdmmc_stop_transmission(sdmmc_t *sdmmc, u32 *rsp)
|
|||
if (!sdmmc->sd_clock_enabled)
|
||||
return 0;
|
||||
|
||||
int should_disable_sd_clock = 0;
|
||||
bool should_disable_sd_clock = false;
|
||||
if (!(sdmmc->regs->clkcon & TEGRA_MMC_CLKCON_SD_CLOCK_ENABLE))
|
||||
{
|
||||
should_disable_sd_clock = 1;
|
||||
should_disable_sd_clock = true;
|
||||
sdmmc->regs->clkcon |= TEGRA_MMC_CLKCON_SD_CLOCK_ENABLE;
|
||||
_sdmmc_get_clkcon(sdmmc);
|
||||
usleep((8000 + sdmmc->divisor - 1) / sdmmc->divisor);
|
||||
|
|
@ -857,17 +857,17 @@ static int _sdmmc_execute_cmd_inner(sdmmc_t *sdmmc, sdmmc_cmd_t *cmd, sdmmc_req_
|
|||
return 0;
|
||||
|
||||
u32 blkcnt = 0;
|
||||
int is_data_present = 0;
|
||||
bool is_data_present = false;
|
||||
if (req)
|
||||
{
|
||||
_sdmmc_config_dma(sdmmc, &blkcnt, req);
|
||||
_sdmmc_enable_interrupts(sdmmc);
|
||||
is_data_present = 1;
|
||||
is_data_present = true;
|
||||
}
|
||||
else
|
||||
{
|
||||
_sdmmc_enable_interrupts(sdmmc);
|
||||
is_data_present = 0;
|
||||
is_data_present = false;
|
||||
}
|
||||
|
||||
_sdmmc_parse_cmdbuf(sdmmc, cmd, is_data_present);
|
||||
|
|
|
|||
|
|
@ -36,12 +36,12 @@ u32 btn_read()
|
|||
u32 btn_wait()
|
||||
{
|
||||
u32 res = 0, btn = btn_read();
|
||||
int pwr = 0;
|
||||
bool pwr = false;
|
||||
|
||||
//Power button down, raise a filter.
|
||||
if (btn & BTN_POWER)
|
||||
{
|
||||
pwr = 1;
|
||||
pwr = true;
|
||||
btn &= ~BTN_POWER;
|
||||
}
|
||||
|
||||
|
|
@ -50,7 +50,7 @@ u32 btn_wait()
|
|||
res = btn_read();
|
||||
//Power button up, remove filter.
|
||||
if (!(res & BTN_POWER) && pwr)
|
||||
pwr = 0;
|
||||
pwr = false;
|
||||
else if (pwr) //Power button still down.
|
||||
res &= ~BTN_POWER;
|
||||
} while (btn == res);
|
||||
|
|
|
|||
|
|
@ -47,4 +47,8 @@ typedef volatile unsigned char vu8;
|
|||
typedef volatile unsigned short vu16;
|
||||
typedef volatile unsigned int vu32;
|
||||
|
||||
typedef int bool;
|
||||
#define true 1
|
||||
#define false 0
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -40,5 +40,5 @@ typedef struct _gfx_con_t
|
|||
u32 fgcol;
|
||||
int fillbg;
|
||||
u32 bgcol;
|
||||
int mute;
|
||||
bool mute;
|
||||
} gfx_con_t;
|
||||
|
|
|
|||
Loading…
Reference in a new issue