mirror of
https://github.com/CTCaer/hekate
synced 2024-07-03 15:03:29 +00:00
Fixed screen brightness problems (tested on 1.0.0 and 2.0.0). Some refactoring.
This commit is contained in:
nwert
parent
b2dd070d10
commit
694a8b5395
35
ipl/arm64.h
Executable file
35
ipl/arm64.h
Executable file
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@ -0,0 +1,35 @@
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/*
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* Copyright (c) 2018 naehrwert
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef _ARM64_H_
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#define _ARM64_H_
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#include "types.h"
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#define LSL0 0
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#define LSL16 16
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#define LSL32 32
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#define _PAGEOFF(x) ((x) & 0xFFFFF000)
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#define _ADRP(r, o) 0x90000000 | ((((o) >> 12) & 0x3) << 29) | ((((o) >> 12) & 0x1FFFFC) << 3) | ((r) & 0x1F)
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#define _BL(a, o) 0x94000000 | ((((o) - (a)) >> 2) & 0x3FFFFFF)
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#define _B(a, o) 0x94000000 | ((((o) - (a)) >> 2) & 0x3FFFFFF)
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#define _MOVKX(r, i, s) 0xF2800000 | (((s) & 0x30) << 17) | (((i) & 0xFFFF) << 5) | ((r) & 0x1F)
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#define _MOVZX(r, i, s) 0xD2800000 | (((s) & 0x30) << 17) | (((i) & 0xFFFF) << 5) | ((r) & 0x1F)
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#define _NOP() 0xD503201F
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#endif
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11
ipl/btn.c
11
ipl/btn.c
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@ -37,22 +37,21 @@ u32 btn_wait()
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u32 res = 0, btn = btn_read();
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int pwr = 0;
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// Power button down, raise a filter.
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//Power button down, raise a filter.
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if (btn & BTN_POWER)
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{
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pwr = 1;
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btn &= 0xFFFFFFFE;
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btn &= ~BTN_POWER;
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}
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do
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{
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res = btn_read();
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// Power button up, remove filter.
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//Power button up, remove filter.
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if (!(res & BTN_POWER) && pwr)
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pwr = 0;
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// Power button still down.
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else if (pwr)
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res &= 0xFFFFFFFE;
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else if (pwr) //Power button still down.
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res &= ~BTN_POWER;
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} while (btn == res);
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return res;
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61
ipl/di.c
61
ipl/di.c
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@ -22,6 +22,8 @@
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#include "i2c.h"
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#include "pmc.h"
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#include "max77620.h"
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#include "gpio.h"
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#include "pinmux.h"
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#include "di.inl"
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@ -56,25 +58,25 @@ void display_init()
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PMC(APBDEV_PMC_IO_DPD2_REQ) = 0x40000000;
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//Config pins.
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PINMUX_AUX(0x1D0) &= 0xFFFFFFEF;
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PINMUX_AUX(0x1D4) &= 0xFFFFFFEF;
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PINMUX_AUX(0x1FC) &= 0xFFFFFFEF;
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PINMUX_AUX(0x200) &= 0xFFFFFFEF;
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PINMUX_AUX(0x204) &= 0xFFFFFFEF;
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PINMUX_AUX(PINMUX_AUX_NFC_EN) &= 0xFFFFFFEF;
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PINMUX_AUX(PINMUX_AUX_NFC_INT) &= 0xFFFFFFEF;
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PINMUX_AUX(PINMUX_AUX_LCD_BL_PWM) &= 0xFFFFFFEF;
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PINMUX_AUX(PINMUX_AUX_LCD_BL_EN) &= 0xFFFFFFEF;
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PINMUX_AUX(PINMUX_AUX_LCD_RST) &= 0xFFFFFFEF;
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GPIO_3(0x00) = (GPIO_3(0x00) & 0xFFFFFFFC) | 0x3;
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GPIO_3(0x10) = (GPIO_3(0x10) & 0xFFFFFFFC) | 0x3;
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GPIO_3(0x20) = (GPIO_3(0x20) & 0xFFFFFFFE) | 0x1;
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sleep(10000u);
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GPIO_3(0x20) = (GPIO_3(0x20) & 0xFFFFFFFD) | 0x2;
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gpio_config(GPIO_PORT_I, GPIO_PIN_0 | GPIO_PIN_1, GPIO_MODE_GPIO); //Backlight +-5V.
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gpio_output_enable(GPIO_PORT_I, GPIO_PIN_0 | GPIO_PIN_1, GPIO_OUTPUT_ENABLE); //Backlight +-5V.
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gpio_write(GPIO_PORT_I, GPIO_PIN_0, GPIO_HIGH); //Backlight +5V enable.
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sleep(10000);
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GPIO_6(0x04) = (GPIO_6(0x04) & 0xFFFFFFF8) | 0x7;
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GPIO_6(0x14) = (GPIO_6(0x14) & 0xFFFFFFF8) | 0x7;
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GPIO_6(0x24) = (GPIO_6(0x24) & 0xFFFFFFFD) | 0x2;
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gpio_write(GPIO_PORT_I, GPIO_PIN_1, GPIO_HIGH); //Backlight -5V enable.
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sleep(10000);
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gpio_config(GPIO_PORT_V, GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2, GPIO_MODE_GPIO); //Backlight PWM, Enable, Reset.
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gpio_output_enable(GPIO_PORT_V, GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2, GPIO_OUTPUT_ENABLE);
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gpio_write(GPIO_PORT_V, GPIO_PIN_1, GPIO_HIGH); //Backlight Enable enable.
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//Config display interface and display.
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MIPI_CAL(0x60) = 0;
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@ -85,7 +87,7 @@ void display_init()
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sleep(10000);
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GPIO_6(0x24) = (GPIO_6(0x24) & 0xFFFFFFFB) | 0x4;
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gpio_write(GPIO_PORT_V, GPIO_PIN_2, GPIO_HIGH); //Backlight Reset enable.
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sleep(60000);
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@ -135,13 +137,16 @@ void display_init()
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void display_backlight(u8 enable)
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{
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GPIO_6(0x24) = (GPIO_6(0x24) & 0xFFFFFFFE) | (enable & 1);
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gpio_write(GPIO_PORT_V, GPIO_PIN_0, enable ? GPIO_HIGH : GPIO_LOW); //Backlight PWM.
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}
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void display_end()
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{
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display_backlight(0);
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DSI(_DSIREG(DSI_VIDEO_MODE_CONTROL)) = 1;
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//TODO: figure out why this freezes.
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/*DSI(_DSIREG(DSI_VIDEO_MODE_CONTROL)) = 1;
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DSI(_DSIREG(DSI_WR_DATA)) = 0x2805;
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u32 end = HOST1X(0x30A4) + 5;
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@ -164,17 +169,17 @@ void display_end()
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sleep(50000);
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GPIO_6(0x24) &= 0xFFFFFFFB;
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//gpio_write(GPIO_PORT_V, GPIO_PIN_2, GPIO_LOW); //Backlight Reset disable.
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sleep(10000);
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//sleep(10000);
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GPIO_3(0x20) &= 0xFFFFFFFD;
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//gpio_write(GPIO_PORT_I, GPIO_PIN_1, GPIO_LOW); //Backlight -5V disable.
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sleep(10000);
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//sleep(10000);
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GPIO_3(0x20) = (GPIO_3(0x20) >> 1) << 1;
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//gpio_write(GPIO_PORT_I, GPIO_PIN_0, GPIO_LOW); //Backlight +5V disable.
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sleep(10000);
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//sleep(10000);
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//Disable clocks.
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CLOCK(0x308) = 0x1010000;
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@ -183,12 +188,12 @@ void display_end()
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CLOCK(0x324) = 0x18000000;
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DSI(_DSIREG(DSI_PAD_CONTROL_0)) = DSI_PAD_CONTROL_VS1_PULLDN_CLK | DSI_PAD_CONTROL_VS1_PULLDN(0xF) | DSI_PAD_CONTROL_VS1_PDIO_CLK | DSI_PAD_CONTROL_VS1_PDIO(0xF);
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DSI(_DSIREG(DSI_POWER_CONTROL)) = 0;
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DSI(_DSIREG(DSI_POWER_CONTROL)) = 0;*/
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GPIO_6(0x04) &= 0xFFFFFFFE;
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gpio_config(GPIO_PORT_V, GPIO_PIN_0, GPIO_MODE_SPIO); //Backlight PWM.
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PINMUX_AUX(0x1FC) = (PINMUX_AUX(0x1FC) & 0xFFFFFFEF) | 0x10;
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PINMUX_AUX(0x1FC) = (PINMUX_AUX(0x1FC) >> 2) << 2 | 1;
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PINMUX_AUX(PINMUX_AUX_LCD_BL_PWM) = (PINMUX_AUX(PINMUX_AUX_LCD_BL_PWM) & 0xFFFFFFEF) | 0x10;
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PINMUX_AUX(PINMUX_AUX_LCD_BL_PWM) = (PINMUX_AUX(PINMUX_AUX_LCD_BL_PWM) >> 2) << 2 | 1;
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}
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void display_color_screen(u32 color)
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16
ipl/gfx.c
16
ipl/gfx.c
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@ -320,8 +320,8 @@ void gfx_set_pixel(gfx_ctxt_t *ctxt, u32 x, u32 y, u32 color)
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void gfx_line(gfx_ctxt_t *ctxt, int x0, int y0, int x1, int y1, u32 color)
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{
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int dx = abs(x1-x0), sx = x0 < x1 ? 1 : -1;
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int dy = abs(y1-y0), sy = y0 < y1 ? 1 : -1;
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int dx = abs(x1 - x0), sx = x0 < x1 ? 1 : -1;
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int dy = abs(y1 - y0), sy = y0 < y1 ? 1 : -1;
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int err = (dx > dy ? dx : -dy) / 2, e2;
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while (1)
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@ -330,7 +330,15 @@ void gfx_line(gfx_ctxt_t *ctxt, int x0, int y0, int x1, int y1, u32 color)
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if (x0 == x1 && y0 == y1)
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break;
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e2 = err;
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if (e2 >-dx) { err -= dy; x0 += sx; }
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if (e2 < dy) { err += dx; y0 += sy; }
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if (e2 >-dx)
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{
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err -= dy;
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x0 += sx;
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}
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if (e2 < dy)
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{
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err += dx;
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y0 += sy;
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}
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}
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}
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102
ipl/hos.c
102
ipl/hos.c
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@ -31,6 +31,7 @@
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#include "pkg1.h"
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#include "pkg2.h"
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#include "ff.h"
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#include "di.h"
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#include "gfx.h"
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extern gfx_ctxt_t gfx_ctxt;
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@ -73,9 +74,9 @@ typedef struct _merge_kip_t
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#define KB_FIRMWARE_VERSION_301 2
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#define KB_FIRMWARE_VERSION_400 3
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#define KB_FIRMWARE_VERSION_500 4
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#define KB_FIRMWARE_VERSION_MAX KB_FIRMWARE_VERSION_500
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#define NUM_KEYBLOB_KEYS 5
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static const u8 keyblob_keyseeds[NUM_KEYBLOB_KEYS][0x10] = {
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static const u8 keyblob_keyseeds[][0x10] = {
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{ 0xDF, 0x20, 0x6F, 0x59, 0x44, 0x54, 0xEF, 0xDC, 0x70, 0x74, 0x48, 0x3B, 0x0D, 0xED, 0x9F, 0xD3 }, //1.0.0
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{ 0x0C, 0x25, 0x61, 0x5D, 0x68, 0x4C, 0xEB, 0x42, 0x1C, 0x23, 0x79, 0xEA, 0x82, 0x25, 0x12, 0xAC }, //3.0.0
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{ 0x33, 0x76, 0x85, 0xEE, 0x88, 0x4A, 0xAE, 0x0A, 0xC2, 0x8A, 0xFD, 0x7D, 0x63, 0xC0, 0x43, 0x3B }, //3.0.1
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@ -95,24 +96,12 @@ static const u8 console_keyseed[0x10] =
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static const u8 key8_keyseed[] =
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{ 0xFB, 0x8B, 0x6A, 0x9C, 0x79, 0x00, 0xC8, 0x49, 0xEF, 0xD2, 0x4D, 0x85, 0x4D, 0x30, 0xA0, 0xC7 };
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static const u8 master_keyseed_4xx[0x10] =
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static const u8 master_keyseed_4xx_5xx[0x10] =
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{ 0x2D, 0xC1, 0xF4, 0x8D, 0xF3, 0x5B, 0x69, 0x33, 0x42, 0x10, 0xAC, 0x65, 0xDA, 0x90, 0x46, 0x66 };
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static const u8 console_keyseed_4xx[0x10] =
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static const u8 console_keyseed_4xx_5xx[0x10] =
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{ 0x0C, 0x91, 0x09, 0xDB, 0x93, 0x93, 0x07, 0x81, 0x07, 0x3C, 0xC4, 0x16, 0x22, 0x7C, 0x6C, 0x28 };
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#define CRC32C_POLY 0x82F63B78
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u32 crc32c(const u8 *buf, u32 len)
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{
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u32 crc = 0xFFFFFFFF;
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while (len--)
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{
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crc ^= *buf++;
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for (int i = 0; i < 8; i++)
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crc = (crc & 1) ? (crc >> 1) ^ CRC32C_POLY : crc >> 1;
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}
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return ~crc;
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}
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static void _se_lock()
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{
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@ -145,23 +134,26 @@ int keygen(u8 *keyblob, u32 kb, void *tsec_fw)
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{
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u8 tmp[0x10];
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se_key_acc_ctrl(0x0D, 0x15);
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se_key_acc_ctrl(0x0E, 0x15);
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if (kb > KB_FIRMWARE_VERSION_MAX)
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return 0;
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se_key_acc_ctrl(13, 0x15);
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se_key_acc_ctrl(14, 0x15);
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//Get TSEC key.
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if (tsec_query(tmp, 1, tsec_fw) < 0)
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return 0;
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se_aes_key_set(0x0D, tmp, 0x10);
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se_aes_key_set(13, tmp, 0x10);
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//Derive keyblob keys from TSEC+SBK.
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se_aes_crypt_block_ecb(0x0D, 0x00, tmp, keyblob_keyseeds[0]);
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se_aes_unwrap_key(0x0F, 0x0E, tmp);
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se_aes_crypt_block_ecb(0xD, 0x00, tmp, keyblob_keyseeds[kb]);
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se_aes_unwrap_key(0x0D, 0x0E, tmp);
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se_aes_crypt_block_ecb(13, 0, tmp, keyblob_keyseeds[0]);
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se_aes_unwrap_key(15, 14, tmp);
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se_aes_crypt_block_ecb(13, 0, tmp, keyblob_keyseeds[kb]);
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se_aes_unwrap_key(13, 14, tmp);
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// Clear SBK
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se_aes_key_clear(0x0E);
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//Clear SBK.
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se_aes_key_clear(14);
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//TODO: verify keyblob CMAC.
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//se_aes_unwrap_key(11, 13, cmac_keyseed);
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@ -169,45 +161,42 @@ int keygen(u8 *keyblob, u32 kb, void *tsec_fw)
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//if (!memcmp(keyblob, tmp, 0x10))
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// return 0;
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se_aes_crypt_block_ecb(0x0D, 0, tmp, cmac_keyseed);
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se_aes_unwrap_key(0x0B, 0x0D, cmac_keyseed);
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se_aes_crypt_block_ecb(13, 0, tmp, cmac_keyseed);
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se_aes_unwrap_key(11, 13, cmac_keyseed);
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//Decrypt keyblob and set keyslots.
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se_aes_crypt_ctr(0x0D, keyblob + 0x20, 0x90, keyblob + 0x20, 0x90, keyblob + 0x10);
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se_aes_key_set(0x0B, keyblob + 0x20 + 0x80, 0x10); // package1 key
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se_aes_key_set(0x0C, keyblob + 0x20, 0x10);
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se_aes_key_set(0x0D, keyblob + 0x20, 0x10);
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se_aes_crypt_ctr(13, keyblob + 0x20, 0x90, keyblob + 0x20, 0x90, keyblob + 0x10);
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se_aes_key_set(11, keyblob + 0x20 + 0x80, 0x10); //Package1 key.
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se_aes_key_set(12, keyblob + 0x20, 0x10);
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se_aes_key_set(13, keyblob + 0x20, 0x10);
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se_aes_crypt_block_ecb(0x0C, 0, tmp, master_keyseed_retail);
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se_aes_crypt_block_ecb(12, 0, tmp, master_keyseed_retail);
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switch (kb)
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{
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case KB_FIRMWARE_VERSION_100_200:
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case KB_FIRMWARE_VERSION_300:
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case KB_FIRMWARE_VERSION_301:
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se_aes_unwrap_key(0x0D, 0x0F, console_keyseed);
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se_aes_unwrap_key(0x0C, 0x0C, master_keyseed_retail);
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se_aes_unwrap_key(13, 15, console_keyseed);
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se_aes_unwrap_key(12, 12, master_keyseed_retail);
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break;
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case KB_FIRMWARE_VERSION_400:
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se_aes_unwrap_key(0x0D, 0x0F, console_keyseed_4xx);
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se_aes_unwrap_key(0x0F, 0x0F, console_keyseed);
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se_aes_unwrap_key(0x0E, 0x0C, master_keyseed_4xx);
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se_aes_unwrap_key(0x0C, 0x0C, master_keyseed_retail);
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se_aes_unwrap_key(13, 15, console_keyseed_4xx_5xx);
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se_aes_unwrap_key(15, 15, console_keyseed);
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se_aes_unwrap_key(14, 12, master_keyseed_4xx_5xx);
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se_aes_unwrap_key(12, 12, master_keyseed_retail);
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break;
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case KB_FIRMWARE_VERSION_500:
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default:
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se_aes_unwrap_key(0x0A, 0x0F, console_keyseed_4xx);
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se_aes_unwrap_key(0x0F, 0x0F, console_keyseed);
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se_aes_unwrap_key(0x0E, 0x0C, master_keyseed_4xx);
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se_aes_unwrap_key(0x0C, 0x0C, master_keyseed_retail);
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se_aes_unwrap_key(10, 15, console_keyseed_4xx_5xx);
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||||
se_aes_unwrap_key(15, 15, console_keyseed);
|
||||
se_aes_unwrap_key(14, 12, master_keyseed_4xx_5xx);
|
||||
se_aes_unwrap_key(12, 12, master_keyseed_retail);
|
||||
break;
|
||||
}
|
||||
|
||||
//Package2 key.
|
||||
se_key_acc_ctrl(0x08, 0x15);
|
||||
se_aes_unwrap_key(0x08, 0x0C, key8_keyseed);
|
||||
se_key_acc_ctrl(8, 0x15);
|
||||
se_aes_unwrap_key(8, 12, key8_keyseed);
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
|
@ -385,6 +374,7 @@ int hos_launch(ini_sec_t *cfg)
|
|||
{
|
||||
int bootStateDramPkg2;
|
||||
int bootStatePkg2Continue;
|
||||
int end_di = 0;
|
||||
launch_ctxt_t ctxt;
|
||||
|
||||
memset(&ctxt, 0, sizeof(launch_ctxt_t));
|
||||
|
|
@ -491,24 +481,25 @@ int hos_launch(ini_sec_t *cfg)
|
|||
|
||||
gfx_printf(&gfx_con, "\n%kBooting...%k\n", 0xFF00FF96, 0xFFCCCCCC);
|
||||
|
||||
se_aes_key_clear(0x8);
|
||||
se_aes_key_clear(0xB);
|
||||
se_aes_key_clear(8);
|
||||
se_aes_key_clear(11);
|
||||
|
||||
switch (ctxt.pkg1_id->kb)
|
||||
{
|
||||
case KB_FIRMWARE_VERSION_100_200:
|
||||
case KB_FIRMWARE_VERSION_300:
|
||||
case KB_FIRMWARE_VERSION_301:
|
||||
se_key_acc_ctrl(0xC, 0xFF);
|
||||
se_key_acc_ctrl(0xD, 0xFF);
|
||||
se_key_acc_ctrl(12, 0xFF);
|
||||
se_key_acc_ctrl(13, 0xFF);
|
||||
bootStateDramPkg2 = 2;
|
||||
bootStatePkg2Continue = 3;
|
||||
end_di = 1;
|
||||
break;
|
||||
default:
|
||||
case KB_FIRMWARE_VERSION_400:
|
||||
case KB_FIRMWARE_VERSION_500:
|
||||
se_key_acc_ctrl(0xC, 0xFF);
|
||||
se_key_acc_ctrl(0xF, 0xFF);
|
||||
se_key_acc_ctrl(12, 0xFF);
|
||||
se_key_acc_ctrl(15, 0xFF);
|
||||
bootStateDramPkg2 = 2;
|
||||
bootStatePkg2Continue = 4;
|
||||
break;
|
||||
|
|
@ -545,8 +536,9 @@ int hos_launch(ini_sec_t *cfg)
|
|||
PMC(0x5BC) = 0xFFFFFFFF;
|
||||
PMC(0x5C0) = 0xFFAAFFFF;*/
|
||||
|
||||
//TODO: Cleanup.
|
||||
//display_end();
|
||||
//Disable display.
|
||||
if (end_di)
|
||||
display_end();
|
||||
|
||||
//Signal to pkg2 ready and continue boot.
|
||||
*mb_in = bootStatePkg2Continue;
|
||||
|
|
|
|||
|
|
@ -41,6 +41,11 @@
|
|||
#define PINMUX_AUX_DMIC3_CLK 0xB4
|
||||
#define PINMUX_AUX_UART2_TX 0xF4
|
||||
#define PINMUX_AUX_UART3_TX 0x104
|
||||
#define PINMUX_AUX_NFC_EN 0x1D0
|
||||
#define PINMUX_AUX_NFC_INT 0x1D4
|
||||
#define PINMUX_AUX_LCD_BL_PWM 0x1FC
|
||||
#define PINMUX_AUX_LCD_BL_EN 0x200
|
||||
#define PINMUX_AUX_LCD_RST 0x204
|
||||
#define PINMUX_AUX_GPIO_PE6 0x248
|
||||
#define PINMUX_AUX_GPIO_PH6 0x250
|
||||
#define PINMUX_AUX_GPIO_PZ1 0x280
|
||||
|
|
|
|||
10
ipl/pkg1.c
10
ipl/pkg1.c
|
|
@ -16,19 +16,13 @@
|
|||
|
||||
#include <string.h>
|
||||
#include "pkg1.h"
|
||||
#include "arm64.h"
|
||||
#include "se.h"
|
||||
|
||||
#define _ADRP(r, o) 0x90000000 | ((((o) >> 12) & 0x3) << 29) | ((((o) >> 12) & 0x1FFFFC) << 3) | ((r) & 0x1F)
|
||||
#define _MOVZX(r, i, s) 0xD2800000 | (((s) & 0x30) << 17) | (((i) & 0xFFFF) << 5) | ((r) & 0x1F)
|
||||
#define _MOVKX(r, i, s) 0xF2800000 | (((s) & 0x30) << 17) | (((i) & 0xFFFF) << 5) | ((r) & 0x1F)
|
||||
#define _BL(a, o) 0x94000000 | (((o) - (a)) >> 2) & 0x3FFFFFF
|
||||
#define _NOP() 0xD503201F
|
||||
|
||||
#define SM_100_ADR 0x4002B020
|
||||
|
||||
PATCHSET_DEF(_secmon_1_patchset,
|
||||
//Patch the relocator to be able to run from SM_100_ADR.
|
||||
{ 0x1E0, _ADRP(0, 0x7C013000 - (SM_100_ADR - 0x40)) },
|
||||
{ 0x1E0, _ADRP(0, 0x7C013000 - _PAGEOFF(SM_100_ADR)) },
|
||||
//Patch package2 decryption and signature/hash checks.
|
||||
{ 0x9F0 + 0xADC, _NOP() }, //Header signature.
|
||||
{ 0x9F0 + 0xB8C, _NOP() }, //Version.
|
||||
|
|
|
|||
|
|
@ -16,6 +16,7 @@
|
|||
|
||||
#include <string.h>
|
||||
#include "pkg2.h"
|
||||
#include "arm64.h"
|
||||
#include "heap.h"
|
||||
#include "se.h"
|
||||
|
||||
|
|
@ -25,9 +26,6 @@ extern gfx_con_t gfx_con;
|
|||
#define DPRINTF(...) gfx_printf(&gfx_con, __VA_ARGS__)*/
|
||||
#define DPRINTF(...)
|
||||
|
||||
#define _MOVZX(r, i, s) 0xD2800000 | (((s) & 0x30) << 17) | (((i) & 0xFFFF) << 5) | ((r) & 0x1F)
|
||||
#define _NOP() 0xD503201F
|
||||
|
||||
// Include kernel patches here, so we can utilize pkg1 id
|
||||
PATCHSET_DEF(_kernel_1_patchset,
|
||||
{ 0x3764C, _NOP() }, // Disable SVC verifications
|
||||
|
|
|
|||
|
|
@ -50,11 +50,11 @@ void *tui_do_menu(gfx_con_t *con, menu_t *menu)
|
|||
gfx_con_setpos(con, menu->x, menu->y);
|
||||
gfx_printf(con, "[%s]\n\n", menu->caption);
|
||||
|
||||
// Skip caption or seperator lines selection
|
||||
// Skip caption or seperator lines selection.
|
||||
while (menu->ents[idx].type == MENT_CAPTION ||
|
||||
menu->ents[idx].type == MENT_CHGLINE)
|
||||
{
|
||||
if (prev_idx <= idx || (!idx && prev_idx == cnt - 1))
|
||||
if (prev_idx <= idx || (!idx && prev_idx == cnt - 1))
|
||||
{
|
||||
idx++;
|
||||
if (idx > (cnt - 1))
|
||||
|
|
@ -75,7 +75,7 @@ void *tui_do_menu(gfx_con_t *con, menu_t *menu)
|
|||
}
|
||||
prev_idx = idx;
|
||||
|
||||
// Draw the menu
|
||||
//Draw the menu.
|
||||
for (cnt = 0; menu->ents[cnt].type != MENT_END; cnt++)
|
||||
{
|
||||
if (cnt == idx)
|
||||
|
|
|
|||
13
ipl/util.c
13
ipl/util.c
|
|
@ -35,3 +35,16 @@ void exec_cfg(u32 *base, const cfg_op_t *ops, u32 num_ops)
|
|||
base[ops[i].off] = ops[i].val;
|
||||
}
|
||||
|
||||
#define CRC32C_POLY 0x82F63B78
|
||||
u32 crc32c(const void *buf, u32 len)
|
||||
{
|
||||
const u8 *cbuf = (const u8 *)buf;
|
||||
u32 crc = 0xFFFFFFFF;
|
||||
while (len--)
|
||||
{
|
||||
crc ^= *cbuf++;
|
||||
for (int i = 0; i < 8; i++)
|
||||
crc = crc & 1 ? (crc >> 1) ^ CRC32C_POLY : crc >> 1;
|
||||
}
|
||||
return ~crc;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -28,5 +28,6 @@ typedef struct _cfg_op_t
|
|||
u32 get_tmr();
|
||||
void sleep(u32 ticks);
|
||||
void exec_cfg(u32 *base, const cfg_op_t *ops, u32 num_ops);
|
||||
u32 crc32c(const void *buf, u32 len);
|
||||
|
||||
#endif
|
||||
|
|
|
|||
Loading…
Reference in a new issue